tcg/mips: Fix regression caused by typo (copy + paste bug)
cppcheck reports an error:qemu/tcg/mips/tcg-target.c:1487: error: Invalid number of character (()
The unpatched code won't compile on mips hosts starting with commitcea5f9a28faa528b6b1b117c9ab2d8828f473fef....
tcg/README: Expand advice on number of TCG ops per target insn
Expand the note on the number of TCG ops generated per target insn,to be clearer about the range of applicability of the 20 op ruleof thumb. Also add a note about the hard MAX_OP_PER_INSTR limit....
TCG/PPC: use stack for TCG temps
Use stack instead of temp_buf array in CPUState for TCG temps.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg-hppa: Support deposit opcode.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
TCG/HPPA: use stack for TCG temps
TCG/HPPA: use TCG_REG_CALL_STACK instead of TCG_REG_SP
Use TCG_REG_CALL_STACK instead of TCG_REG_SP for consistency.
Acked-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg/ppc64: Remove tcg_out_addi
The only user (within tcg.c) was removed
Signed-off-by: malc <av1474@comtv.ru>
tcg/ppc: Remove tcg_out_addi
TCG/Sparc64: use stack for TCG temps
On Sparc64, stack pointer is not aligned but there is a fixed bias of 2047,so don't try to enforce alignment.
TCG/x86: use stack for TCG temps
Use stack instead of temp_buf array in CPUState for TCGtemps.
TCG/x86: use TCG_REG_CALL_STACK instead of TCG_REG_ESP
Except for specific cases where the use of %esp changes the encoding ofthe instruction, it's cleaner to use TCG_REG_CALL_STACK instead ofTCG_REG_ESP.
TCG: remove broken stack allocation for call arguments
The code for stack allocation for call arguments is way too simplisticto actually work on targets with non-trivial stack allocation policies,e.g. ppc64. We've also already allocated TCG_STATIC_CALL_ARGS_SIZE worth...
TCG: fix negative frame offset calculations
size_t is unsigned, so the frame offset calculations can be incorrect fornegative offsets.
Delegate setup of TCG temporaries to targets
Delegate TCG temp_buf setup to targets, so that they can use a stackframe later instead.
cpu-exec.c: avoid AREG0 use
Make functions take a parameter for CPUState instead of relyingon global env. Pass CPUState pointer to TCG prologue, which movesit to AREG0.
Thanks to Peter Maydell and Laurent Desnogues for the ARM prologuechange.
Revert the hacks to avoid AREG0 use on Sparc hosts....
Remove exec-all.h include directives
Most exec-all.h include directives are now useless, remove them.
tcg: Fix unused-but-set-variable warning
Based on a patch from Hans de Goede <hdegoede@redhat.com>
This warning is new in gcc 4.6.
Acked-by: Amit Shah <amit.shah@redhat.com>Signed-off-by: Christophe Fergeau <cfergeau@redhat.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg: If DEBUG_TCGV, distinguish TCGv_ptr from TCGv_i32/TCGv_i64
When compiling with DEBUG_TCGV enabled, make the TCGv_ptr type distinctfrom TCGv_i32/TCGv_i64. This means that using an i32 or i64 TCG op tomanipulate a TCGv_ptr will always be detected at compile time, rather...
tcg/tcg-op.h: Fix prototypes for ld/st functions on 64 bit hosts
The prototypes for the ld/st functions on a 64 bit host declaredthe address parameter as a TCGv_i64 rather than a TCGv_ptr. Thisworked OK (since the two are aliases), but needs to be fixed to...
Use the correct header in the TCG MIPS code to find cacheflush() on OpenBSD.
Use the correct header in the TCG MIPS code to find cacheflush() on OpenBSDto fix compilation of the MIPS host support for OpenBSD/mips64 based architecures.
Signed-off-by: Brad Smith <brad@comstyle.com>...
Fix spelling in comment (additon -> addition)
Signed-off-by: Stefan Weil <weil@mail.berlios.de>Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
tcg: don't keep dead outputs in registers
If an op with dead outputs is not removed, because it has side effectsor has multiple output and only one dead, mark the registers as deadinstead of saving them. This avoid a few register spills on TCG targetswith low register count, especially with div2 and mul2 ops, or when a...
tcg: mark dead output argument in op_dead_args
If an op is not removed and has dead output arguments, mark itin op_dead_args similarly to what is done for input arguments.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg: replace op_dead_iargs by op_dead_args
Allow all args to be dead by replacing the input specific op_dead_iargsvariable by op_dead_args. Note this is a purely mechanical change.
Fix typos in comments (accross -> across)
tcg/arm: Support host code being compiled for Thumb
Although the TCG generated code is always in ARM mode, it is possiblethat the host code was compiled by gcc in Thumb mode (this is often thedefault for Linux distributions targeting ARM v7 only). Handle this...
tcg: Add support for debugging leakage of temporaries
Add support (if CONFIG_DEBUG_TCG is defined) for debugging leakageof temporary variables. Generally any temporaries created bya target while it is translating an instruction should be freedby the end of that instruction; otherwise carefully crafted...
tcg: README, name deposit second argument len/LEN
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
tcg: Define "deposit" as an optional operation.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
tcg arm/mips/ia64: add a comment about retranslation and caches
Add a comment about cache coherency and retranslation, so that peopledevelopping new targets based on existing ones are warned of the issue.
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>...
tcg/arm: improve constant loading
Improve constant loading in two ways:- On all ARM versions, it's possible to load 0xffffff00 = 0x100 using the mvn rd, #0. Fix the conditions. On <= ARMv6 versions, where movw and movt are not available, load the constants using mov and orr with rotations depending on the constant...
tcg/ia64: remove an unnecessary stop bit
Spotted by Richard Henderson.
tcg: fix typo in readme
Signed-off-by: Mike Frysinger <vapier@gentoo.org>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg/README: Spelling fixes
Signed-off-by: Stefan Weil <weil@mail.berlios.de>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg/mips: fix branch target change during code retranslation
TCG on MIPS was trying to avoid changing the branch offset, but didn'tdue to a stupid typo. Fix it.
tcg/arm: fix qemu_st64 for big endian targets
Due to a typo, qemu_st64 doesn't properly byteswap the 32-bit low word ofa 64 bit word before saving it. This patch fixes that.
Acked-by: Andrzej Zaborowski <balrogg@gmail.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg/arm: fix branch target change during code retranslation
QEMU uses code retranslation to restore the CPU state when an exceptionhappens. For it to work the retranslation must not modify the generatedcode. This is what is currently implemented in ARM TCG....
tcg-ia64: Provide default GUEST_BASE.
Fix compilation error when GUEST_BASE is not defined.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
tcg-ia64: Implement qemu_ld32.
The port was not properly merged following86feb1c860dc38e9c89e787c5210e8191800385e
tcg-ia64: Fix tlb read error for 32-bit targets.
Use ld4 not ld8 for reading the tlb of 32-bit targets.
tcg-ia64: Fix address compilation in qemu_st.
A typo in the usermode address calculation path; R3 used where R2 needed.
tcg-ia64: Fix warning in qemu_ld.
The usermode version of qemu_ld doesn't used mem_index,leading to set-but-not-used warnings.
tcg: Fix default definition of divu_i32 and remu_i32.
The arguments to tcg_gen_helper32 for these functions were notupdated correctly in rev 2bece2c88331f024a46527634e3dd91c71d22141.
tcg: Use fprintf_function (format checking)
fprintf_function uses format checking with GCC_FMT_ATTR.
Cc: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Stefan Weil <weil@mail.berlios.de>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg: Fix compiler error (comparison of unsigned expression)
When qemu is configured with --enable-debug-tcg,gcc throws this warning (or error with -Werror):
tcg/tcg.c:1030: error: comparison of unsigned expression >= 0 is always true
Fix it by removing the >= 0 part....
TCG: Revert ppc64 tcg_out_movi32 change
3b6dac34161bc0a342336072643c2f6d17e0ec45 apparently broke the ppc64 TCG targetcompilation in the code path without guest base.
Reverting this line fixes the build.
Signed-off-by: Andreas F?rber <andreas.faerber@web.de>...
TCG: Fix Darwin/ppc calling convention recognition
5da79c86a3744e3a901c7986c109dd06951befd2 broke compilation on Mac OS X v10.5 ppc.Apple's GCC 4.0.1 does not define _CALL_DARWIN. Recognize APPLE again as well.
tcg-s390: new TCG Target
Original patch from Ulrich Hecht, further work from Alexander Grafand Richard Henderson.
Cc: Ulrich Hecht <uli@suse.de>Cc: Alexander Graf <agraf@suse.de>Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg-ppc: Conditionally reserve TCG_GUEST_BASE_REG.
We need not reserve the register unless we're going to use it.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: malc <av1474@comtv.ru>
tcg: Optionally sign-extend 32-bit arguments for 64-bit hosts.
Some hosts (amd64, ia64) have an ABI that ignores the high bitsof the 64-bit register when passing 32-bit arguments. Othersrequire the value to be properly sign-extended for the type.I.e. "int32_t" must be sign-extended and "uint32_t" must be...
tcg: fix DEF macro after commit c61aaf7a388c4ad95d8b546fdb9267dc01183317
tcg-s390: Icache flush is a no-op.
Before gcc 4.2, builtin_clear_cache doesn't exist, andafterward the gcc s390 backend implements it as nothing.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg-i386: fix andi r, r, 0xff
tcg-i386: remove use of _Bool that slipped code review
tcg-i386: Merge 64-bit generation.
tcg: get rid of copy_size in TCGOpDef
copy_size is a left-over from the dyngen era, remove it.
tcg: get rid of DEF2 in tcg-opc.h
Now that tcg-opc.h is only used in TCG code, get rid of DEF2 intcg-opc.h.
tcg: Make some tcg-target.c routines static.
Both tcg_target_init and tcg_target_qemu_prologueare unused outside of tcg.c.
tcg: Add TYPE parameter to tcg_out_mov.
Mirror tcg_out_movi in having a TYPE parameter. This allows x86_64to perform the move at the proper width, which may elide a REX prefix.
Introduce a TCG_TYPE_REG enumerator to represent the "native width" of the host register, and to distinguish the usage from "pointer data"...
tcg-i386: fix a typo
Fix a typo introduced by c28b14c694d759f39fe3ae4f8d03b567da5b93f8.
tcg-i386: declare tcg_out_tlb_load() inline
Declare tcg_out_tlb_load() inline so that we don't loose optimisationswith commit 8516a04467cb7954cdc32e8b79b4b7df56dccb16.
tcg-i386: Remove some ifdefs in qemu_ld/st.
Tidy some code by replacing ifdefs by C ifs.
tcg-i386: Tidy data16 prefixes.
Include it in the opcode as an extension, as with P_EXTor the REX bits in the x86-64 port.
tcg-i386: Split out TLB Hit path from qemu_ld/st.
Splitting out these functions will allow further cleanups.
tcg-i386: Swap order of TLB hit and miss paths.
Make fallthru be TLB hit and branch be TLB miss. Doing thisboth improves branch prediction and will allow further cleanup.
tcg-i386: Split out tlb load function.
Share some code between qemu_ld and qemu_st.
tcg: Use INDEX_op_qemu_ld32 for 32-bit results.
tcg: Initialize the prologue after GUEST_BASE is fixed.
This will allow backends to make intelligent choices about howto implement GUEST_BASE.
tcg-hppa: Load GUEST_BASE as an immediate.
Now that the prologue is generated after GUEST_BASE is fixed,we can load it as an immediate, and also avoid reserving theregister if it isn't necessary.
tcg-ia64: Fix some register usage issues.
(1) The output registers were not marked call-clobbered, even though they can be modified by called functions.(2) The thread pointer was not marked reserved.(3) R4-R6 are call-saved, but not saved by the prologue. Rather than...
tcg-ia64: Load GUEST_BASE into a register.
Saves one bundle per memory operation.
tcg-i386: Use lea for three-operand add.
The result is shorter than the mov+add that TCG wouldotherwise generate for us.
tcg-i386: Nuke trailing whitespace.
tcg-i386: Tidy ext8u and ext16u operations.
Define OPC_MOVZBL and OPC_MOVZWL. Factor opcode emission toseparate functions.
tcg-i386: Tidy ext8s and ext16s operations.
Define OPC_MOVSBL and OPC_MOVSWL. Factor opcode emission toseparate functions.
tcg-i386: Tidy immediate arithmetic operations.
Define OPC_ARITH_EvI[bz]; use throughout. Use tcg_out_ext8udirectly in setcond. Use tgen_arithi in qemu_ld/st.
tcg-i386: Tidy non-immediate arithmetic operations.
Add more OPC values, and tgen_arithr. Use the later throughout.
Note that normal reg/reg arithmetic now uses the Gv,Ev opcode forminstead of the Ev,Gv opcode form used previously. Both formsdisassemble properly, and so there's no visible change when diffing...
tcg-i386: Tidy movi.
Define and use OPC_MOVL_Iv.
tcg-i386: Tidy push/pop.
Move tcg_out_push/pop up in the file so that they can be usedby qemu_ld/st. Define a tcg_out_pushi to be used as well.
tcg-i386: Tidy calls.
Define OPC_CALL_Jz, generated by tcg_out_calli; use the laterthroughout. Unify the calls within qemu_st; adjust the stackwith a single pop if applicable.
Define and use EXT_CALLN_Ev for indirect calls.
Signed-off-by: Richard Henderson <rth@twiddle.net>...
tcg-i386: Tidy ret.
Define and use OPC_RET.
tcg-i386: Tidy setcc.
Define and use OPC_SETCC.
tcg-i386: Tidy unary arithmetic.
Define OPC_GRP3 and EXT3_FOO to match. Use them instead ofbare constants.
Define OPC_GRP5 and rename the existing EXT_BAR to EXT5_BAR tomake it clear which extension should be used with which opcode.
tcg-i386: Tidy multiply.
Define and use OPC_IMUL_GvEv{,Ib,Iz}.
tcg-i386: Tidy xchg.
Define and use OPC_XCHG_ax_r32.
tcg-i386: Tidy lea.
Implement full modrm+sib addressing mode processing.Use that in qemu_ld/st to output the LEA.
tcg-i386: Tidy jumps.
Define OPC_JCC*, OC_JMP*, and EXT_JMPN_Ev. Use them throughout.
tcg-i386: Eliminate extra move from qemu_ld64.
If the address register overlaps one of the output registerssimply issue the clobbering load last, rather than emittingan extra move of the address register.
tcg-i386: Tidy move operations.
Define OPC_MOVB* and OPC_MOVL*; use them throughout.Use tcg_out_ld/st instead of bare tcg_out_modrm_offsetwhen it makes sense.
tcg-i386: Tidy shift operations.
Define OPC_SHIFT_{1,Ib,cl}. Factor opcode emission to a function.
tcg-i386: Tidy bswap operations.
Define OPC_BSWAP. Factor opcode emission to separate functions.
tcg-i386: Allocate call-saved registers first.
tcg-i386: Tidy initialization of tcg_target_call_clobber_regs.
Setting the registers one by one is easier to read, and getsoptimized by the compiler just the same.
tcg: Add missing 'static' attribute
tcg_out_reloc is only used locally (in */target.c which isincluded in tcg.c).
tcg-hppa: Remove automatically implemented opcodes.
Remove neg, ext8u, ext16u, as requested.
tcg-hppa: Constrain immediate inputs to and_i32, or_i32, andc_i32.
Define "M" constraint for and_mask_p and "O" constraint for or_mask_p.Assume that inputs are correct in tcg_out_ori and tcg_out_andi.
tcg-hppa: Fix GUEST_BASE initialization in prologue.
Load from the guest_base variable rather than embed a constant.Always reserve TCG_GUEST_BASE_REG if guest base support enabled.
tcg-hppa: Fix softmmu loads and stores.
Along the tlb hit path, we were modifying the variables holding the inputregister numbers, which lead to incorrect expansion of the tlb miss path.Fix this by extracting the tlb hit path to separate functions with their...
tcg-hppa: Schedule the address masking after the TLB load.
Issue the tlb load as early as possible and perform the addressmasking while the load is completing.
tcg-hppa: Fix branch offset during retranslation.
Branch offsets should only be overwritten during relocation,to support partial retranslation.