Revision cf9314cd

b/target-ppc/translate_init.c
7037 7037 
    CPU_POWERPC_G2LEgp3            = 0x80822013,
7038 7038 
    /* MPC52xx microcontrollers  */
7039 7039 
    /* XXX: MPC 5121 ? */
7040 
#define CPU_POWERPC_MPC52xx          CPU_POWERPC_MPC5200
7041 7040 
#define CPU_POWERPC_MPC5200          CPU_POWERPC_MPC5200_v12
7042 7041 
#define CPU_POWERPC_MPC5200_v10      CPU_POWERPC_G2LEgp1
7043 7042 
#define CPU_POWERPC_MPC5200_v11      CPU_POWERPC_G2LEgp1
......
7364 7363 
/* System version register (used on MPC 8xxx)                                */
7365 7364 
enum {
7366 7365 
    POWERPC_SVR_NONE               = 0x00000000,
7367 
#define POWERPC_SVR_52xx             POWERPC_SVR_5200
7368 7366 
#define POWERPC_SVR_5200             POWERPC_SVR_5200_v12
7369 7367 
    POWERPC_SVR_5200_v10           = 0x80110010,
7370 7368 
    POWERPC_SVR_5200_v11           = 0x80110011,
......
7881 7879 
    POWERPC_DEF("MPC8xx",        CPU_POWERPC_MPC8xx,                 MPC8xx)
7882 7880 
#endif
7883 7881 
    /* MPC82xx family (aka PowerQUICC-II)                                    */
7884 
    /* Generic MPC52xx core                                                  */
7885 
    POWERPC_DEF_SVR("MPC52xx",
7886 
                    CPU_POWERPC_MPC52xx,      POWERPC_SVR_52xx,      G2LE)
7887 7882 
    /* PowerPC G2 core                                                       */
7888 7883 
    POWERPC_DEF("G2",            CPU_POWERPC_G2,                     G2)
7889 7884 
    /* PowerPC G2 H4 core                                                    */
......
8867 8862 
    { "MPC880", "MPC8xx" },
8868 8863 
    { "MPC885", "MPC8xx" },
8869 8864 

  		





  
  8865
  
    
    { "MPC52xx", "MPC5200" },


  		





  
  8866
  
    

  		





  8870
  8867
  
    
    { "MPC82xx", "MPC8280" },


  		





  8871
  8868
  
    
    { "PowerQUICC-II", "MPC82xx" },


  		





  8872
  8869
  
    
    { "MPC8241", "G2HiP4" },


  		












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