Revision cfe5f011 hw/flash.h
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/* NOR flash devices */ |
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#include "memory.h" |
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typedef struct pflash_t pflash_t; |
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/* pflash_cfi01.c */ |
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pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off, |
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pflash_t *pflash_cfi01_register(target_phys_addr_t base, |
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DeviceState *qdev, const char *name, |
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target_phys_addr_t size, |
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BlockDriverState *bs, |
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uint32_t sector_len, int nb_blocs, int width, |
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uint16_t id0, uint16_t id1, |
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uint16_t id2, uint16_t id3, int be); |
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/* pflash_cfi02.c */ |
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pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off, |
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pflash_t *pflash_cfi02_register(target_phys_addr_t base, |
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DeviceState *qdev, const char *name, |
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target_phys_addr_t size, |
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BlockDriverState *bs, uint32_t sector_len, |
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int nb_blocs, int nb_mappings, int width, |
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uint16_t id0, uint16_t id1, |
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uint16_t unlock_addr0, uint16_t unlock_addr1, |
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int be); |
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MemoryRegion *pflash_cfi01_get_memory(pflash_t *fl); |
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/* nand.c */ |
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DeviceState *nand_init(BlockDriverState *bdrv, int manf_id, int chip_id); |
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void nand_setpins(DeviceState *dev, uint8_t cle, uint8_t ale, |
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