Revision cff0cfbe hw/omap.h
b/hw/omap.h | ||
---|---|---|
998 | 998 |
#define OMAP_GPIOSW_OUTPUT 0x0002 |
999 | 999 |
|
1000 | 1000 |
# define TCMI_VERBOSE 1 |
1001 |
//# define MEM_VERBOSE 1 |
|
1002 | 1001 |
|
1003 | 1002 |
# ifdef TCMI_VERBOSE |
1004 | 1003 |
# define OMAP_8B_REG(paddr) \ |
... | ... | |
1018 | 1017 |
|
1019 | 1018 |
# define OMAP_MPUI_REG_MASK 0x000007ff |
1020 | 1019 |
|
1021 |
# ifdef MEM_VERBOSE |
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1022 |
struct io_fn { |
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1023 |
CPUReadMemoryFunc * const *mem_read; |
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1024 |
CPUWriteMemoryFunc * const *mem_write; |
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1025 |
void *opaque; |
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1026 |
int in; |
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1027 |
}; |
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1028 |
|
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1029 |
static uint32_t io_readb(void *opaque, target_phys_addr_t addr) |
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1030 |
{ |
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1031 |
struct io_fn *s = opaque; |
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1032 |
uint32_t ret; |
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1033 |
|
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1034 |
s->in ++; |
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1035 |
ret = s->mem_read[0](s->opaque, addr); |
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1036 |
s->in --; |
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1037 |
if (!s->in) |
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1038 |
fprintf(stderr, "%08x ---> %02x\n", (uint32_t) addr, ret); |
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1039 |
return ret; |
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1040 |
} |
|
1041 |
static uint32_t io_readh(void *opaque, target_phys_addr_t addr) |
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1042 |
{ |
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1043 |
struct io_fn *s = opaque; |
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1044 |
uint32_t ret; |
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1045 |
|
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1046 |
s->in ++; |
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1047 |
ret = s->mem_read[1](s->opaque, addr); |
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1048 |
s->in --; |
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1049 |
if (!s->in) |
|
1050 |
fprintf(stderr, "%08x ---> %04x\n", (uint32_t) addr, ret); |
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1051 |
return ret; |
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1052 |
} |
|
1053 |
static uint32_t io_readw(void *opaque, target_phys_addr_t addr) |
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1054 |
{ |
|
1055 |
struct io_fn *s = opaque; |
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1056 |
uint32_t ret; |
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1057 |
|
|
1058 |
s->in ++; |
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1059 |
ret = s->mem_read[2](s->opaque, addr); |
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1060 |
s->in --; |
|
1061 |
if (!s->in) |
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1062 |
fprintf(stderr, "%08x ---> %08x\n", (uint32_t) addr, ret); |
|
1063 |
return ret; |
|
1064 |
} |
|
1065 |
static void io_writeb(void *opaque, target_phys_addr_t addr, uint32_t value) |
|
1066 |
{ |
|
1067 |
struct io_fn *s = opaque; |
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1068 |
|
|
1069 |
if (!s->in) |
|
1070 |
fprintf(stderr, "%08x <--- %02x\n", (uint32_t) addr, value); |
|
1071 |
s->in ++; |
|
1072 |
s->mem_write[0](s->opaque, addr, value); |
|
1073 |
s->in --; |
|
1074 |
} |
|
1075 |
static void io_writeh(void *opaque, target_phys_addr_t addr, uint32_t value) |
|
1076 |
{ |
|
1077 |
struct io_fn *s = opaque; |
|
1078 |
|
|
1079 |
if (!s->in) |
|
1080 |
fprintf(stderr, "%08x <--- %04x\n", (uint32_t) addr, value); |
|
1081 |
s->in ++; |
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1082 |
s->mem_write[1](s->opaque, addr, value); |
|
1083 |
s->in --; |
|
1084 |
} |
|
1085 |
static void io_writew(void *opaque, target_phys_addr_t addr, uint32_t value) |
|
1086 |
{ |
|
1087 |
struct io_fn *s = opaque; |
|
1088 |
|
|
1089 |
if (!s->in) |
|
1090 |
fprintf(stderr, "%08x <--- %08x\n", (uint32_t) addr, value); |
|
1091 |
s->in ++; |
|
1092 |
s->mem_write[2](s->opaque, addr, value); |
|
1093 |
s->in --; |
|
1094 |
} |
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1095 |
|
|
1096 |
static CPUReadMemoryFunc * const io_readfn[] = { io_readb, io_readh, io_readw, }; |
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1097 |
static CPUWriteMemoryFunc * const io_writefn[] = { io_writeb, io_writeh, io_writew, }; |
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1098 |
|
|
1099 |
inline static int debug_register_io_memory(CPUReadMemoryFunc * const *mem_read, |
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1100 |
CPUWriteMemoryFunc * const *mem_write, |
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1101 |
void *opaque) |
|
1102 |
{ |
|
1103 |
struct io_fn *s = g_malloc(sizeof(struct io_fn)); |
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1104 |
|
|
1105 |
s->mem_read = mem_read; |
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1106 |
s->mem_write = mem_write; |
|
1107 |
s->opaque = opaque; |
|
1108 |
s->in = 0; |
|
1109 |
return cpu_register_io_memory(io_readfn, io_writefn, s, |
|
1110 |
DEVICE_NATIVE_ENDIAN); |
|
1111 |
} |
|
1112 |
# define cpu_register_io_memory debug_register_io_memory |
|
1113 |
# endif |
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1114 |
|
|
1115 | 1020 |
#endif /* hw_omap_h */ |
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