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1 | ad96090a | Blue Swirl | /*
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2 | ad96090a | Blue Swirl | * QEMU System Emulator
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3 | ad96090a | Blue Swirl | *
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4 | ad96090a | Blue Swirl | * Copyright (c) 2003-2008 Fabrice Bellard
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5 | ad96090a | Blue Swirl | *
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6 | ad96090a | Blue Swirl | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | ad96090a | Blue Swirl | * of this software and associated documentation files (the "Software"), to deal
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8 | ad96090a | Blue Swirl | * in the Software without restriction, including without limitation the rights
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9 | ad96090a | Blue Swirl | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | ad96090a | Blue Swirl | * copies of the Software, and to permit persons to whom the Software is
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11 | ad96090a | Blue Swirl | * furnished to do so, subject to the following conditions:
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12 | ad96090a | Blue Swirl | *
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13 | ad96090a | Blue Swirl | * The above copyright notice and this permission notice shall be included in
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14 | ad96090a | Blue Swirl | * all copies or substantial portions of the Software.
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15 | ad96090a | Blue Swirl | *
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16 | ad96090a | Blue Swirl | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | ad96090a | Blue Swirl | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | ad96090a | Blue Swirl | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | ad96090a | Blue Swirl | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | ad96090a | Blue Swirl | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | ad96090a | Blue Swirl | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | ad96090a | Blue Swirl | * THE SOFTWARE.
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23 | ad96090a | Blue Swirl | */
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24 | ad96090a | Blue Swirl | #include <stdint.h> |
25 | ad96090a | Blue Swirl | #include <stdarg.h> |
26 | ad96090a | Blue Swirl | #ifndef _WIN32
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27 | 1c47cb16 | Blue Swirl | #include <sys/types.h> |
28 | ad96090a | Blue Swirl | #include <sys/mman.h> |
29 | ad96090a | Blue Swirl | #endif
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30 | ad96090a | Blue Swirl | #include "config.h" |
31 | ad96090a | Blue Swirl | #include "monitor.h" |
32 | ad96090a | Blue Swirl | #include "sysemu.h" |
33 | ad96090a | Blue Swirl | #include "arch_init.h" |
34 | ad96090a | Blue Swirl | #include "audio/audio.h" |
35 | ad96090a | Blue Swirl | #include "hw/pc.h" |
36 | ad96090a | Blue Swirl | #include "hw/pci.h" |
37 | ad96090a | Blue Swirl | #include "hw/audiodev.h" |
38 | ad96090a | Blue Swirl | #include "kvm.h" |
39 | ad96090a | Blue Swirl | #include "migration.h" |
40 | ad96090a | Blue Swirl | #include "net.h" |
41 | ad96090a | Blue Swirl | #include "gdbstub.h" |
42 | ad96090a | Blue Swirl | #include "hw/smbios.h" |
43 | ad96090a | Blue Swirl | |
44 | ad96090a | Blue Swirl | #ifdef TARGET_SPARC
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45 | ad96090a | Blue Swirl | int graphic_width = 1024; |
46 | ad96090a | Blue Swirl | int graphic_height = 768; |
47 | ad96090a | Blue Swirl | int graphic_depth = 8; |
48 | ad96090a | Blue Swirl | #else
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49 | ad96090a | Blue Swirl | int graphic_width = 800; |
50 | ad96090a | Blue Swirl | int graphic_height = 600; |
51 | ad96090a | Blue Swirl | int graphic_depth = 15; |
52 | ad96090a | Blue Swirl | #endif
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53 | ad96090a | Blue Swirl | |
54 | ad96090a | Blue Swirl | const char arch_config_name[] = CONFIG_QEMU_CONFDIR "/target-" TARGET_ARCH ".conf"; |
55 | ad96090a | Blue Swirl | |
56 | ad96090a | Blue Swirl | #if defined(TARGET_ALPHA)
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57 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_ALPHA
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58 | ad96090a | Blue Swirl | #elif defined(TARGET_ARM)
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59 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_ARM
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60 | ad96090a | Blue Swirl | #elif defined(TARGET_CRIS)
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61 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_CRIS
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62 | ad96090a | Blue Swirl | #elif defined(TARGET_I386)
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63 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_I386
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64 | ad96090a | Blue Swirl | #elif defined(TARGET_M68K)
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65 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_M68K
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66 | ad96090a | Blue Swirl | #elif defined(TARGET_MICROBLAZE)
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67 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_MICROBLAZE
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68 | ad96090a | Blue Swirl | #elif defined(TARGET_MIPS)
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69 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_MIPS
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70 | ad96090a | Blue Swirl | #elif defined(TARGET_PPC)
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71 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_PPC
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72 | ad96090a | Blue Swirl | #elif defined(TARGET_S390X)
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73 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_S390X
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74 | ad96090a | Blue Swirl | #elif defined(TARGET_SH4)
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75 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_SH4
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76 | ad96090a | Blue Swirl | #elif defined(TARGET_SPARC)
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77 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_SPARC
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78 | ad96090a | Blue Swirl | #endif
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79 | ad96090a | Blue Swirl | |
80 | ad96090a | Blue Swirl | const uint32_t arch_type = QEMU_ARCH;
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81 | ad96090a | Blue Swirl | |
82 | ad96090a | Blue Swirl | /***********************************************************/
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83 | ad96090a | Blue Swirl | /* ram save/restore */
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84 | ad96090a | Blue Swirl | |
85 | ad96090a | Blue Swirl | #define RAM_SAVE_FLAG_FULL 0x01 /* Obsolete, not used anymore */ |
86 | ad96090a | Blue Swirl | #define RAM_SAVE_FLAG_COMPRESS 0x02 |
87 | ad96090a | Blue Swirl | #define RAM_SAVE_FLAG_MEM_SIZE 0x04 |
88 | ad96090a | Blue Swirl | #define RAM_SAVE_FLAG_PAGE 0x08 |
89 | ad96090a | Blue Swirl | #define RAM_SAVE_FLAG_EOS 0x10 |
90 | ad96090a | Blue Swirl | |
91 | ad96090a | Blue Swirl | static int is_dup_page(uint8_t *page, uint8_t ch) |
92 | ad96090a | Blue Swirl | { |
93 | ad96090a | Blue Swirl | uint32_t val = ch << 24 | ch << 16 | ch << 8 | ch; |
94 | ad96090a | Blue Swirl | uint32_t *array = (uint32_t *)page; |
95 | ad96090a | Blue Swirl | int i;
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96 | ad96090a | Blue Swirl | |
97 | ad96090a | Blue Swirl | for (i = 0; i < (TARGET_PAGE_SIZE / 4); i++) { |
98 | ad96090a | Blue Swirl | if (array[i] != val) {
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99 | ad96090a | Blue Swirl | return 0; |
100 | ad96090a | Blue Swirl | } |
101 | ad96090a | Blue Swirl | } |
102 | ad96090a | Blue Swirl | |
103 | ad96090a | Blue Swirl | return 1; |
104 | ad96090a | Blue Swirl | } |
105 | ad96090a | Blue Swirl | |
106 | ad96090a | Blue Swirl | static int ram_save_block(QEMUFile *f) |
107 | ad96090a | Blue Swirl | { |
108 | ad96090a | Blue Swirl | static ram_addr_t current_addr = 0; |
109 | ad96090a | Blue Swirl | ram_addr_t saved_addr = current_addr; |
110 | ad96090a | Blue Swirl | ram_addr_t addr = 0;
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111 | d17b5288 | Alex Williamson | uint64_t total_ram = ram_bytes_total(); |
112 | 3fc250b4 | Pierre Riteau | int bytes_sent = 0; |
113 | ad96090a | Blue Swirl | |
114 | d17b5288 | Alex Williamson | while (addr < total_ram) {
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115 | ad96090a | Blue Swirl | if (cpu_physical_memory_get_dirty(current_addr, MIGRATION_DIRTY_FLAG)) {
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116 | ad96090a | Blue Swirl | uint8_t *p; |
117 | ad96090a | Blue Swirl | |
118 | ad96090a | Blue Swirl | cpu_physical_memory_reset_dirty(current_addr, |
119 | ad96090a | Blue Swirl | current_addr + TARGET_PAGE_SIZE, |
120 | ad96090a | Blue Swirl | MIGRATION_DIRTY_FLAG); |
121 | ad96090a | Blue Swirl | |
122 | ad96090a | Blue Swirl | p = qemu_get_ram_ptr(current_addr); |
123 | ad96090a | Blue Swirl | |
124 | ad96090a | Blue Swirl | if (is_dup_page(p, *p)) {
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125 | ad96090a | Blue Swirl | qemu_put_be64(f, current_addr | RAM_SAVE_FLAG_COMPRESS); |
126 | ad96090a | Blue Swirl | qemu_put_byte(f, *p); |
127 | 3fc250b4 | Pierre Riteau | bytes_sent = 1;
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128 | ad96090a | Blue Swirl | } else {
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129 | ad96090a | Blue Swirl | qemu_put_be64(f, current_addr | RAM_SAVE_FLAG_PAGE); |
130 | ad96090a | Blue Swirl | qemu_put_buffer(f, p, TARGET_PAGE_SIZE); |
131 | 3fc250b4 | Pierre Riteau | bytes_sent = TARGET_PAGE_SIZE; |
132 | ad96090a | Blue Swirl | } |
133 | ad96090a | Blue Swirl | |
134 | ad96090a | Blue Swirl | break;
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135 | ad96090a | Blue Swirl | } |
136 | ad96090a | Blue Swirl | addr += TARGET_PAGE_SIZE; |
137 | d17b5288 | Alex Williamson | current_addr = (saved_addr + addr) % total_ram; |
138 | ad96090a | Blue Swirl | } |
139 | ad96090a | Blue Swirl | |
140 | 3fc250b4 | Pierre Riteau | return bytes_sent;
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141 | ad96090a | Blue Swirl | } |
142 | ad96090a | Blue Swirl | |
143 | ad96090a | Blue Swirl | static uint64_t bytes_transferred;
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144 | ad96090a | Blue Swirl | |
145 | ad96090a | Blue Swirl | static ram_addr_t ram_save_remaining(void) |
146 | ad96090a | Blue Swirl | { |
147 | ad96090a | Blue Swirl | ram_addr_t addr; |
148 | ad96090a | Blue Swirl | ram_addr_t count = 0;
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149 | d17b5288 | Alex Williamson | uint64_t total_ram = ram_bytes_total(); |
150 | ad96090a | Blue Swirl | |
151 | d17b5288 | Alex Williamson | for (addr = 0; addr < total_ram; addr += TARGET_PAGE_SIZE) { |
152 | ad96090a | Blue Swirl | if (cpu_physical_memory_get_dirty(addr, MIGRATION_DIRTY_FLAG)) {
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153 | ad96090a | Blue Swirl | count++; |
154 | ad96090a | Blue Swirl | } |
155 | ad96090a | Blue Swirl | } |
156 | ad96090a | Blue Swirl | |
157 | ad96090a | Blue Swirl | return count;
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158 | ad96090a | Blue Swirl | } |
159 | ad96090a | Blue Swirl | |
160 | ad96090a | Blue Swirl | uint64_t ram_bytes_remaining(void)
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161 | ad96090a | Blue Swirl | { |
162 | ad96090a | Blue Swirl | return ram_save_remaining() * TARGET_PAGE_SIZE;
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163 | ad96090a | Blue Swirl | } |
164 | ad96090a | Blue Swirl | |
165 | ad96090a | Blue Swirl | uint64_t ram_bytes_transferred(void)
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166 | ad96090a | Blue Swirl | { |
167 | ad96090a | Blue Swirl | return bytes_transferred;
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168 | ad96090a | Blue Swirl | } |
169 | ad96090a | Blue Swirl | |
170 | ad96090a | Blue Swirl | uint64_t ram_bytes_total(void)
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171 | ad96090a | Blue Swirl | { |
172 | d17b5288 | Alex Williamson | RAMBlock *block; |
173 | d17b5288 | Alex Williamson | uint64_t total = 0;
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174 | d17b5288 | Alex Williamson | |
175 | d17b5288 | Alex Williamson | QLIST_FOREACH(block, &ram_list.blocks, next) |
176 | d17b5288 | Alex Williamson | total += block->length; |
177 | d17b5288 | Alex Williamson | |
178 | d17b5288 | Alex Williamson | return total;
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179 | ad96090a | Blue Swirl | } |
180 | ad96090a | Blue Swirl | |
181 | ad96090a | Blue Swirl | int ram_save_live(Monitor *mon, QEMUFile *f, int stage, void *opaque) |
182 | ad96090a | Blue Swirl | { |
183 | ad96090a | Blue Swirl | ram_addr_t addr; |
184 | ad96090a | Blue Swirl | uint64_t bytes_transferred_last; |
185 | ad96090a | Blue Swirl | double bwidth = 0; |
186 | ad96090a | Blue Swirl | uint64_t expected_time = 0;
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187 | ad96090a | Blue Swirl | |
188 | ad96090a | Blue Swirl | if (stage < 0) { |
189 | ad96090a | Blue Swirl | cpu_physical_memory_set_dirty_tracking(0);
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190 | ad96090a | Blue Swirl | return 0; |
191 | ad96090a | Blue Swirl | } |
192 | ad96090a | Blue Swirl | |
193 | ad96090a | Blue Swirl | if (cpu_physical_sync_dirty_bitmap(0, TARGET_PHYS_ADDR_MAX) != 0) { |
194 | ad96090a | Blue Swirl | qemu_file_set_error(f); |
195 | ad96090a | Blue Swirl | return 0; |
196 | ad96090a | Blue Swirl | } |
197 | ad96090a | Blue Swirl | |
198 | ad96090a | Blue Swirl | if (stage == 1) { |
199 | d17b5288 | Alex Williamson | uint64_t total_ram = ram_bytes_total(); |
200 | ad96090a | Blue Swirl | bytes_transferred = 0;
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201 | ad96090a | Blue Swirl | |
202 | ad96090a | Blue Swirl | /* Make sure all dirty bits are set */
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203 | d17b5288 | Alex Williamson | for (addr = 0; addr < total_ram; addr += TARGET_PAGE_SIZE) { |
204 | ad96090a | Blue Swirl | if (!cpu_physical_memory_get_dirty(addr, MIGRATION_DIRTY_FLAG)) {
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205 | ad96090a | Blue Swirl | cpu_physical_memory_set_dirty(addr); |
206 | ad96090a | Blue Swirl | } |
207 | ad96090a | Blue Swirl | } |
208 | ad96090a | Blue Swirl | |
209 | ad96090a | Blue Swirl | /* Enable dirty memory tracking */
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210 | ad96090a | Blue Swirl | cpu_physical_memory_set_dirty_tracking(1);
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211 | ad96090a | Blue Swirl | |
212 | d17b5288 | Alex Williamson | qemu_put_be64(f, total_ram | RAM_SAVE_FLAG_MEM_SIZE); |
213 | ad96090a | Blue Swirl | } |
214 | ad96090a | Blue Swirl | |
215 | ad96090a | Blue Swirl | bytes_transferred_last = bytes_transferred; |
216 | ad96090a | Blue Swirl | bwidth = qemu_get_clock_ns(rt_clock); |
217 | ad96090a | Blue Swirl | |
218 | ad96090a | Blue Swirl | while (!qemu_file_rate_limit(f)) {
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219 | 3fc250b4 | Pierre Riteau | int bytes_sent;
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220 | ad96090a | Blue Swirl | |
221 | 3fc250b4 | Pierre Riteau | bytes_sent = ram_save_block(f); |
222 | 3fc250b4 | Pierre Riteau | bytes_transferred += bytes_sent; |
223 | 3fc250b4 | Pierre Riteau | if (bytes_sent == 0) { /* no more blocks */ |
224 | ad96090a | Blue Swirl | break;
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225 | ad96090a | Blue Swirl | } |
226 | ad96090a | Blue Swirl | } |
227 | ad96090a | Blue Swirl | |
228 | ad96090a | Blue Swirl | bwidth = qemu_get_clock_ns(rt_clock) - bwidth; |
229 | ad96090a | Blue Swirl | bwidth = (bytes_transferred - bytes_transferred_last) / bwidth; |
230 | ad96090a | Blue Swirl | |
231 | ad96090a | Blue Swirl | /* if we haven't transferred anything this round, force expected_time to a
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232 | ad96090a | Blue Swirl | * a very high value, but without crashing */
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233 | ad96090a | Blue Swirl | if (bwidth == 0) { |
234 | ad96090a | Blue Swirl | bwidth = 0.000001; |
235 | ad96090a | Blue Swirl | } |
236 | ad96090a | Blue Swirl | |
237 | ad96090a | Blue Swirl | /* try transferring iterative blocks of memory */
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238 | ad96090a | Blue Swirl | if (stage == 3) { |
239 | 3fc250b4 | Pierre Riteau | int bytes_sent;
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240 | 3fc250b4 | Pierre Riteau | |
241 | ad96090a | Blue Swirl | /* flush all remaining blocks regardless of rate limiting */
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242 | 3fc250b4 | Pierre Riteau | while ((bytes_sent = ram_save_block(f)) != 0) { |
243 | 3fc250b4 | Pierre Riteau | bytes_transferred += bytes_sent; |
244 | ad96090a | Blue Swirl | } |
245 | ad96090a | Blue Swirl | cpu_physical_memory_set_dirty_tracking(0);
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246 | ad96090a | Blue Swirl | } |
247 | ad96090a | Blue Swirl | |
248 | ad96090a | Blue Swirl | qemu_put_be64(f, RAM_SAVE_FLAG_EOS); |
249 | ad96090a | Blue Swirl | |
250 | ad96090a | Blue Swirl | expected_time = ram_save_remaining() * TARGET_PAGE_SIZE / bwidth; |
251 | ad96090a | Blue Swirl | |
252 | ad96090a | Blue Swirl | return (stage == 2) && (expected_time <= migrate_max_downtime()); |
253 | ad96090a | Blue Swirl | } |
254 | ad96090a | Blue Swirl | |
255 | ad96090a | Blue Swirl | int ram_load(QEMUFile *f, void *opaque, int version_id) |
256 | ad96090a | Blue Swirl | { |
257 | ad96090a | Blue Swirl | ram_addr_t addr; |
258 | ad96090a | Blue Swirl | int flags;
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259 | ad96090a | Blue Swirl | |
260 | ad96090a | Blue Swirl | if (version_id != 3) { |
261 | ad96090a | Blue Swirl | return -EINVAL;
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262 | ad96090a | Blue Swirl | } |
263 | ad96090a | Blue Swirl | |
264 | ad96090a | Blue Swirl | do {
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265 | ad96090a | Blue Swirl | addr = qemu_get_be64(f); |
266 | ad96090a | Blue Swirl | |
267 | ad96090a | Blue Swirl | flags = addr & ~TARGET_PAGE_MASK; |
268 | ad96090a | Blue Swirl | addr &= TARGET_PAGE_MASK; |
269 | ad96090a | Blue Swirl | |
270 | ad96090a | Blue Swirl | if (flags & RAM_SAVE_FLAG_MEM_SIZE) {
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271 | d17b5288 | Alex Williamson | if (addr != ram_bytes_total()) {
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272 | ad96090a | Blue Swirl | return -EINVAL;
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273 | ad96090a | Blue Swirl | } |
274 | ad96090a | Blue Swirl | } |
275 | ad96090a | Blue Swirl | |
276 | ad96090a | Blue Swirl | if (flags & RAM_SAVE_FLAG_COMPRESS) {
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277 | ad96090a | Blue Swirl | uint8_t ch = qemu_get_byte(f); |
278 | ad96090a | Blue Swirl | memset(qemu_get_ram_ptr(addr), ch, TARGET_PAGE_SIZE); |
279 | ad96090a | Blue Swirl | #ifndef _WIN32
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280 | ad96090a | Blue Swirl | if (ch == 0 && |
281 | ad96090a | Blue Swirl | (!kvm_enabled() || kvm_has_sync_mmu())) { |
282 | ad96090a | Blue Swirl | madvise(qemu_get_ram_ptr(addr), TARGET_PAGE_SIZE, |
283 | ad96090a | Blue Swirl | MADV_DONTNEED); |
284 | ad96090a | Blue Swirl | } |
285 | ad96090a | Blue Swirl | #endif
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286 | ad96090a | Blue Swirl | } else if (flags & RAM_SAVE_FLAG_PAGE) { |
287 | ad96090a | Blue Swirl | qemu_get_buffer(f, qemu_get_ram_ptr(addr), TARGET_PAGE_SIZE); |
288 | ad96090a | Blue Swirl | } |
289 | ad96090a | Blue Swirl | if (qemu_file_has_error(f)) {
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290 | ad96090a | Blue Swirl | return -EIO;
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291 | ad96090a | Blue Swirl | } |
292 | ad96090a | Blue Swirl | } while (!(flags & RAM_SAVE_FLAG_EOS));
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293 | ad96090a | Blue Swirl | |
294 | ad96090a | Blue Swirl | return 0; |
295 | ad96090a | Blue Swirl | } |
296 | ad96090a | Blue Swirl | |
297 | ad96090a | Blue Swirl | void qemu_service_io(void) |
298 | ad96090a | Blue Swirl | { |
299 | ad96090a | Blue Swirl | qemu_notify_event(); |
300 | ad96090a | Blue Swirl | } |
301 | ad96090a | Blue Swirl | |
302 | ad96090a | Blue Swirl | #ifdef HAS_AUDIO
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303 | ad96090a | Blue Swirl | struct soundhw soundhw[] = {
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304 | ad96090a | Blue Swirl | #ifdef HAS_AUDIO_CHOICE
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305 | ad96090a | Blue Swirl | #if defined(TARGET_I386) || defined(TARGET_MIPS)
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306 | ad96090a | Blue Swirl | { |
307 | ad96090a | Blue Swirl | "pcspk",
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308 | ad96090a | Blue Swirl | "PC speaker",
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309 | ad96090a | Blue Swirl | 0,
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310 | ad96090a | Blue Swirl | 1,
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311 | ad96090a | Blue Swirl | { .init_isa = pcspk_audio_init } |
312 | ad96090a | Blue Swirl | }, |
313 | ad96090a | Blue Swirl | #endif
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314 | ad96090a | Blue Swirl | |
315 | ad96090a | Blue Swirl | #ifdef CONFIG_SB16
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316 | ad96090a | Blue Swirl | { |
317 | ad96090a | Blue Swirl | "sb16",
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318 | ad96090a | Blue Swirl | "Creative Sound Blaster 16",
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319 | ad96090a | Blue Swirl | 0,
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320 | ad96090a | Blue Swirl | 1,
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321 | ad96090a | Blue Swirl | { .init_isa = SB16_init } |
322 | ad96090a | Blue Swirl | }, |
323 | ad96090a | Blue Swirl | #endif
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324 | ad96090a | Blue Swirl | |
325 | ad96090a | Blue Swirl | #ifdef CONFIG_CS4231A
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326 | ad96090a | Blue Swirl | { |
327 | ad96090a | Blue Swirl | "cs4231a",
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328 | ad96090a | Blue Swirl | "CS4231A",
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329 | ad96090a | Blue Swirl | 0,
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330 | ad96090a | Blue Swirl | 1,
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331 | ad96090a | Blue Swirl | { .init_isa = cs4231a_init } |
332 | ad96090a | Blue Swirl | }, |
333 | ad96090a | Blue Swirl | #endif
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334 | ad96090a | Blue Swirl | |
335 | ad96090a | Blue Swirl | #ifdef CONFIG_ADLIB
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336 | ad96090a | Blue Swirl | { |
337 | ad96090a | Blue Swirl | "adlib",
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338 | ad96090a | Blue Swirl | #ifdef HAS_YMF262
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339 | ad96090a | Blue Swirl | "Yamaha YMF262 (OPL3)",
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340 | ad96090a | Blue Swirl | #else
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341 | ad96090a | Blue Swirl | "Yamaha YM3812 (OPL2)",
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342 | ad96090a | Blue Swirl | #endif
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343 | ad96090a | Blue Swirl | 0,
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344 | ad96090a | Blue Swirl | 1,
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345 | ad96090a | Blue Swirl | { .init_isa = Adlib_init } |
346 | ad96090a | Blue Swirl | }, |
347 | ad96090a | Blue Swirl | #endif
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348 | ad96090a | Blue Swirl | |
349 | ad96090a | Blue Swirl | #ifdef CONFIG_GUS
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350 | ad96090a | Blue Swirl | { |
351 | ad96090a | Blue Swirl | "gus",
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352 | ad96090a | Blue Swirl | "Gravis Ultrasound GF1",
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353 | ad96090a | Blue Swirl | 0,
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354 | ad96090a | Blue Swirl | 1,
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355 | ad96090a | Blue Swirl | { .init_isa = GUS_init } |
356 | ad96090a | Blue Swirl | }, |
357 | ad96090a | Blue Swirl | #endif
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358 | ad96090a | Blue Swirl | |
359 | ad96090a | Blue Swirl | #ifdef CONFIG_AC97
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360 | ad96090a | Blue Swirl | { |
361 | ad96090a | Blue Swirl | "ac97",
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362 | ad96090a | Blue Swirl | "Intel 82801AA AC97 Audio",
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363 | ad96090a | Blue Swirl | 0,
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364 | ad96090a | Blue Swirl | 0,
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365 | ad96090a | Blue Swirl | { .init_pci = ac97_init } |
366 | ad96090a | Blue Swirl | }, |
367 | ad96090a | Blue Swirl | #endif
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368 | ad96090a | Blue Swirl | |
369 | ad96090a | Blue Swirl | #ifdef CONFIG_ES1370
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370 | ad96090a | Blue Swirl | { |
371 | ad96090a | Blue Swirl | "es1370",
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372 | ad96090a | Blue Swirl | "ENSONIQ AudioPCI ES1370",
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373 | ad96090a | Blue Swirl | 0,
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374 | ad96090a | Blue Swirl | 0,
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375 | ad96090a | Blue Swirl | { .init_pci = es1370_init } |
376 | ad96090a | Blue Swirl | }, |
377 | ad96090a | Blue Swirl | #endif
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378 | ad96090a | Blue Swirl | |
379 | ad96090a | Blue Swirl | #endif /* HAS_AUDIO_CHOICE */ |
380 | ad96090a | Blue Swirl | |
381 | ad96090a | Blue Swirl | { NULL, NULL, 0, 0, { NULL } } |
382 | ad96090a | Blue Swirl | }; |
383 | ad96090a | Blue Swirl | |
384 | ad96090a | Blue Swirl | void select_soundhw(const char *optarg) |
385 | ad96090a | Blue Swirl | { |
386 | ad96090a | Blue Swirl | struct soundhw *c;
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387 | ad96090a | Blue Swirl | |
388 | ad96090a | Blue Swirl | if (*optarg == '?') { |
389 | ad96090a | Blue Swirl | show_valid_cards:
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390 | ad96090a | Blue Swirl | |
391 | ad96090a | Blue Swirl | printf("Valid sound card names (comma separated):\n");
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392 | ad96090a | Blue Swirl | for (c = soundhw; c->name; ++c) {
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393 | ad96090a | Blue Swirl | printf ("%-11s %s\n", c->name, c->descr);
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394 | ad96090a | Blue Swirl | } |
395 | ad96090a | Blue Swirl | printf("\n-soundhw all will enable all of the above\n");
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396 | ad96090a | Blue Swirl | exit(*optarg != '?');
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397 | ad96090a | Blue Swirl | } |
398 | ad96090a | Blue Swirl | else {
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399 | ad96090a | Blue Swirl | size_t l; |
400 | ad96090a | Blue Swirl | const char *p; |
401 | ad96090a | Blue Swirl | char *e;
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402 | ad96090a | Blue Swirl | int bad_card = 0; |
403 | ad96090a | Blue Swirl | |
404 | ad96090a | Blue Swirl | if (!strcmp(optarg, "all")) { |
405 | ad96090a | Blue Swirl | for (c = soundhw; c->name; ++c) {
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406 | ad96090a | Blue Swirl | c->enabled = 1;
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407 | ad96090a | Blue Swirl | } |
408 | ad96090a | Blue Swirl | return;
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409 | ad96090a | Blue Swirl | } |
410 | ad96090a | Blue Swirl | |
411 | ad96090a | Blue Swirl | p = optarg; |
412 | ad96090a | Blue Swirl | while (*p) {
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413 | ad96090a | Blue Swirl | e = strchr(p, ',');
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414 | ad96090a | Blue Swirl | l = !e ? strlen(p) : (size_t) (e - p); |
415 | ad96090a | Blue Swirl | |
416 | ad96090a | Blue Swirl | for (c = soundhw; c->name; ++c) {
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417 | ad96090a | Blue Swirl | if (!strncmp(c->name, p, l) && !c->name[l]) {
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418 | ad96090a | Blue Swirl | c->enabled = 1;
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419 | ad96090a | Blue Swirl | break;
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420 | ad96090a | Blue Swirl | } |
421 | ad96090a | Blue Swirl | } |
422 | ad96090a | Blue Swirl | |
423 | ad96090a | Blue Swirl | if (!c->name) {
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424 | ad96090a | Blue Swirl | if (l > 80) { |
425 | ad96090a | Blue Swirl | fprintf(stderr, |
426 | ad96090a | Blue Swirl | "Unknown sound card name (too big to show)\n");
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427 | ad96090a | Blue Swirl | } |
428 | ad96090a | Blue Swirl | else {
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429 | ad96090a | Blue Swirl | fprintf(stderr, "Unknown sound card name `%.*s'\n",
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430 | ad96090a | Blue Swirl | (int) l, p);
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431 | ad96090a | Blue Swirl | } |
432 | ad96090a | Blue Swirl | bad_card = 1;
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433 | ad96090a | Blue Swirl | } |
434 | ad96090a | Blue Swirl | p += l + (e != NULL);
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435 | ad96090a | Blue Swirl | } |
436 | ad96090a | Blue Swirl | |
437 | ad96090a | Blue Swirl | if (bad_card) {
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438 | ad96090a | Blue Swirl | goto show_valid_cards;
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439 | ad96090a | Blue Swirl | } |
440 | ad96090a | Blue Swirl | } |
441 | ad96090a | Blue Swirl | } |
442 | ad96090a | Blue Swirl | #else
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443 | ad96090a | Blue Swirl | void select_soundhw(const char *optarg) |
444 | ad96090a | Blue Swirl | { |
445 | ad96090a | Blue Swirl | } |
446 | ad96090a | Blue Swirl | #endif
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447 | ad96090a | Blue Swirl | |
448 | ad96090a | Blue Swirl | int qemu_uuid_parse(const char *str, uint8_t *uuid) |
449 | ad96090a | Blue Swirl | { |
450 | ad96090a | Blue Swirl | int ret;
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451 | ad96090a | Blue Swirl | |
452 | ad96090a | Blue Swirl | if (strlen(str) != 36) { |
453 | ad96090a | Blue Swirl | return -1; |
454 | ad96090a | Blue Swirl | } |
455 | ad96090a | Blue Swirl | |
456 | ad96090a | Blue Swirl | ret = sscanf(str, UUID_FMT, &uuid[0], &uuid[1], &uuid[2], &uuid[3], |
457 | ad96090a | Blue Swirl | &uuid[4], &uuid[5], &uuid[6], &uuid[7], &uuid[8], &uuid[9], |
458 | ad96090a | Blue Swirl | &uuid[10], &uuid[11], &uuid[12], &uuid[13], &uuid[14], |
459 | ad96090a | Blue Swirl | &uuid[15]);
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460 | ad96090a | Blue Swirl | |
461 | ad96090a | Blue Swirl | if (ret != 16) { |
462 | ad96090a | Blue Swirl | return -1; |
463 | ad96090a | Blue Swirl | } |
464 | ad96090a | Blue Swirl | #ifdef TARGET_I386
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465 | ad96090a | Blue Swirl | smbios_add_field(1, offsetof(struct smbios_type_1, uuid), 16, uuid); |
466 | ad96090a | Blue Swirl | #endif
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467 | ad96090a | Blue Swirl | return 0; |
468 | ad96090a | Blue Swirl | } |
469 | ad96090a | Blue Swirl | |
470 | ad96090a | Blue Swirl | void do_acpitable_option(const char *optarg) |
471 | ad96090a | Blue Swirl | { |
472 | ad96090a | Blue Swirl | #ifdef TARGET_I386
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473 | ad96090a | Blue Swirl | if (acpi_table_add(optarg) < 0) { |
474 | ad96090a | Blue Swirl | fprintf(stderr, "Wrong acpi table provided\n");
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475 | ad96090a | Blue Swirl | exit(1);
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476 | ad96090a | Blue Swirl | } |
477 | ad96090a | Blue Swirl | #endif
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478 | ad96090a | Blue Swirl | } |
479 | ad96090a | Blue Swirl | |
480 | ad96090a | Blue Swirl | void do_smbios_option(const char *optarg) |
481 | ad96090a | Blue Swirl | { |
482 | ad96090a | Blue Swirl | #ifdef TARGET_I386
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483 | ad96090a | Blue Swirl | if (smbios_entry_add(optarg) < 0) { |
484 | ad96090a | Blue Swirl | fprintf(stderr, "Wrong smbios provided\n");
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485 | ad96090a | Blue Swirl | exit(1);
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486 | ad96090a | Blue Swirl | } |
487 | ad96090a | Blue Swirl | #endif
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488 | ad96090a | Blue Swirl | } |
489 | ad96090a | Blue Swirl | |
490 | ad96090a | Blue Swirl | void cpudef_init(void) |
491 | ad96090a | Blue Swirl | { |
492 | ad96090a | Blue Swirl | #if defined(cpudef_setup)
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493 | ad96090a | Blue Swirl | cpudef_setup(); /* parse cpu definitions in target config file */
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494 | ad96090a | Blue Swirl | #endif
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495 | ad96090a | Blue Swirl | } |
496 | ad96090a | Blue Swirl | |
497 | ad96090a | Blue Swirl | int audio_available(void) |
498 | ad96090a | Blue Swirl | { |
499 | ad96090a | Blue Swirl | #ifdef HAS_AUDIO
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500 | ad96090a | Blue Swirl | return 1; |
501 | ad96090a | Blue Swirl | #else
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502 | ad96090a | Blue Swirl | return 0; |
503 | ad96090a | Blue Swirl | #endif
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504 | ad96090a | Blue Swirl | } |
505 | ad96090a | Blue Swirl | |
506 | ad96090a | Blue Swirl | int kvm_available(void) |
507 | ad96090a | Blue Swirl | { |
508 | ad96090a | Blue Swirl | #ifdef CONFIG_KVM
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509 | ad96090a | Blue Swirl | return 1; |
510 | ad96090a | Blue Swirl | #else
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511 | ad96090a | Blue Swirl | return 0; |
512 | ad96090a | Blue Swirl | #endif
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513 | ad96090a | Blue Swirl | } |
514 | ad96090a | Blue Swirl | |
515 | ad96090a | Blue Swirl | int xen_available(void) |
516 | ad96090a | Blue Swirl | { |
517 | ad96090a | Blue Swirl | #ifdef CONFIG_XEN
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518 | ad96090a | Blue Swirl | return 1; |
519 | ad96090a | Blue Swirl | #else
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520 | ad96090a | Blue Swirl | return 0; |
521 | ad96090a | Blue Swirl | #endif
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522 | ad96090a | Blue Swirl | } |