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1 | fc01f7e7 | bellard | /*
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2 | fc01f7e7 | bellard | * QEMU System Emulator header
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3 | fc01f7e7 | bellard | *
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4 | fc01f7e7 | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | fc01f7e7 | bellard | *
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6 | fc01f7e7 | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | fc01f7e7 | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | fc01f7e7 | bellard | * in the Software without restriction, including without limitation the rights
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9 | fc01f7e7 | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | fc01f7e7 | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | fc01f7e7 | bellard | * furnished to do so, subject to the following conditions:
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12 | fc01f7e7 | bellard | *
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13 | fc01f7e7 | bellard | * The above copyright notice and this permission notice shall be included in
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14 | fc01f7e7 | bellard | * all copies or substantial portions of the Software.
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15 | fc01f7e7 | bellard | *
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16 | fc01f7e7 | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | fc01f7e7 | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | fc01f7e7 | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | fc01f7e7 | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | fc01f7e7 | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | fc01f7e7 | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | fc01f7e7 | bellard | * THE SOFTWARE.
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23 | fc01f7e7 | bellard | */
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24 | fc01f7e7 | bellard | #ifndef VL_H
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25 | fc01f7e7 | bellard | #define VL_H
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26 | fc01f7e7 | bellard | |
27 | 67b915a5 | bellard | /* we put basic includes here to avoid repeating them in device drivers */
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28 | 67b915a5 | bellard | #include <stdlib.h> |
29 | 67b915a5 | bellard | #include <stdio.h> |
30 | 67b915a5 | bellard | #include <stdarg.h> |
31 | 67b915a5 | bellard | #include <string.h> |
32 | 67b915a5 | bellard | #include <inttypes.h> |
33 | 8a7ddc38 | bellard | #include <time.h> |
34 | 67b915a5 | bellard | #include <ctype.h> |
35 | 67b915a5 | bellard | #include <errno.h> |
36 | 67b915a5 | bellard | #include <unistd.h> |
37 | 67b915a5 | bellard | #include <fcntl.h> |
38 | 7d3505c5 | bellard | #include <sys/stat.h> |
39 | 67b915a5 | bellard | |
40 | 67b915a5 | bellard | #ifndef O_LARGEFILE
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41 | 67b915a5 | bellard | #define O_LARGEFILE 0 |
42 | 67b915a5 | bellard | #endif
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43 | 40c3bac3 | bellard | #ifndef O_BINARY
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44 | 40c3bac3 | bellard | #define O_BINARY 0 |
45 | 40c3bac3 | bellard | #endif
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46 | 67b915a5 | bellard | |
47 | 67b915a5 | bellard | #ifdef _WIN32
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48 | bfbc9133 | bellard | #define lseek64 _lseeki64
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49 | 67b915a5 | bellard | #endif
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50 | 8a7ddc38 | bellard | |
51 | 16f62432 | bellard | #include "cpu.h" |
52 | 16f62432 | bellard | |
53 | 67b915a5 | bellard | #ifndef glue
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54 | 67b915a5 | bellard | #define xglue(x, y) x ## y |
55 | 67b915a5 | bellard | #define glue(x, y) xglue(x, y)
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56 | 67b915a5 | bellard | #define stringify(s) tostring(s)
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57 | 67b915a5 | bellard | #define tostring(s) #s |
58 | 67b915a5 | bellard | #endif
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59 | 67b915a5 | bellard | |
60 | 67b915a5 | bellard | #if defined(WORDS_BIGENDIAN)
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61 | 67b915a5 | bellard | static inline uint32_t be32_to_cpu(uint32_t v) |
62 | 67b915a5 | bellard | { |
63 | 67b915a5 | bellard | return v;
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64 | 67b915a5 | bellard | } |
65 | 67b915a5 | bellard | |
66 | 67b915a5 | bellard | static inline uint16_t be16_to_cpu(uint16_t v) |
67 | 67b915a5 | bellard | { |
68 | 67b915a5 | bellard | return v;
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69 | 67b915a5 | bellard | } |
70 | 67b915a5 | bellard | |
71 | 165c6fc8 | bellard | static inline uint32_t cpu_to_be32(uint32_t v) |
72 | 165c6fc8 | bellard | { |
73 | 165c6fc8 | bellard | return v;
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74 | 165c6fc8 | bellard | } |
75 | 165c6fc8 | bellard | |
76 | 165c6fc8 | bellard | static inline uint16_t cpu_to_be16(uint16_t v) |
77 | 165c6fc8 | bellard | { |
78 | 165c6fc8 | bellard | return v;
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79 | 165c6fc8 | bellard | } |
80 | 165c6fc8 | bellard | |
81 | 67b915a5 | bellard | static inline uint32_t le32_to_cpu(uint32_t v) |
82 | 67b915a5 | bellard | { |
83 | 67b915a5 | bellard | return bswap32(v);
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84 | 67b915a5 | bellard | } |
85 | 67b915a5 | bellard | |
86 | 67b915a5 | bellard | static inline uint16_t le16_to_cpu(uint16_t v) |
87 | 67b915a5 | bellard | { |
88 | 67b915a5 | bellard | return bswap16(v);
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89 | 67b915a5 | bellard | } |
90 | 67b915a5 | bellard | |
91 | 165c6fc8 | bellard | static inline uint32_t cpu_to_le32(uint32_t v) |
92 | 165c6fc8 | bellard | { |
93 | 165c6fc8 | bellard | return bswap32(v);
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94 | 165c6fc8 | bellard | } |
95 | 165c6fc8 | bellard | |
96 | 165c6fc8 | bellard | static inline uint16_t cpu_to_le16(uint16_t v) |
97 | 165c6fc8 | bellard | { |
98 | 165c6fc8 | bellard | return bswap16(v);
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99 | 165c6fc8 | bellard | } |
100 | 165c6fc8 | bellard | |
101 | 67b915a5 | bellard | #else
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102 | 165c6fc8 | bellard | |
103 | 67b915a5 | bellard | static inline uint32_t be32_to_cpu(uint32_t v) |
104 | 67b915a5 | bellard | { |
105 | 67b915a5 | bellard | return bswap32(v);
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106 | 67b915a5 | bellard | } |
107 | 67b915a5 | bellard | |
108 | 67b915a5 | bellard | static inline uint16_t be16_to_cpu(uint16_t v) |
109 | 67b915a5 | bellard | { |
110 | 67b915a5 | bellard | return bswap16(v);
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111 | 67b915a5 | bellard | } |
112 | 67b915a5 | bellard | |
113 | 165c6fc8 | bellard | static inline uint32_t cpu_to_be32(uint32_t v) |
114 | 165c6fc8 | bellard | { |
115 | 165c6fc8 | bellard | return bswap32(v);
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116 | 165c6fc8 | bellard | } |
117 | 165c6fc8 | bellard | |
118 | 165c6fc8 | bellard | static inline uint16_t cpu_to_be16(uint16_t v) |
119 | 165c6fc8 | bellard | { |
120 | 165c6fc8 | bellard | return bswap16(v);
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121 | 165c6fc8 | bellard | } |
122 | 165c6fc8 | bellard | |
123 | 67b915a5 | bellard | static inline uint32_t le32_to_cpu(uint32_t v) |
124 | 67b915a5 | bellard | { |
125 | 67b915a5 | bellard | return v;
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126 | 67b915a5 | bellard | } |
127 | 67b915a5 | bellard | |
128 | 67b915a5 | bellard | static inline uint16_t le16_to_cpu(uint16_t v) |
129 | 67b915a5 | bellard | { |
130 | 67b915a5 | bellard | return v;
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131 | 67b915a5 | bellard | } |
132 | 165c6fc8 | bellard | |
133 | 165c6fc8 | bellard | static inline uint32_t cpu_to_le32(uint32_t v) |
134 | 165c6fc8 | bellard | { |
135 | 165c6fc8 | bellard | return v;
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136 | 165c6fc8 | bellard | } |
137 | 165c6fc8 | bellard | |
138 | 165c6fc8 | bellard | static inline uint16_t cpu_to_le16(uint16_t v) |
139 | 165c6fc8 | bellard | { |
140 | 165c6fc8 | bellard | return v;
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141 | 165c6fc8 | bellard | } |
142 | 67b915a5 | bellard | #endif
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143 | 67b915a5 | bellard | |
144 | eb26db16 | bellard | static inline void cpu_to_le16w(uint16_t *p, uint16_t v) |
145 | eb26db16 | bellard | { |
146 | eb26db16 | bellard | *p = cpu_to_le16(v); |
147 | eb26db16 | bellard | } |
148 | eb26db16 | bellard | |
149 | eb26db16 | bellard | static inline void cpu_to_le32w(uint32_t *p, uint32_t v) |
150 | eb26db16 | bellard | { |
151 | eb26db16 | bellard | *p = cpu_to_le32(v); |
152 | eb26db16 | bellard | } |
153 | eb26db16 | bellard | |
154 | eb26db16 | bellard | static inline uint16_t le16_to_cpup(const uint16_t *p) |
155 | eb26db16 | bellard | { |
156 | eb26db16 | bellard | return le16_to_cpu(*p);
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157 | eb26db16 | bellard | } |
158 | eb26db16 | bellard | |
159 | eb26db16 | bellard | static inline uint32_t le32_to_cpup(const uint32_t *p) |
160 | eb26db16 | bellard | { |
161 | eb26db16 | bellard | return le32_to_cpu(*p);
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162 | eb26db16 | bellard | } |
163 | eb26db16 | bellard | |
164 | eb26db16 | bellard | /* unaligned versions (optimized for frequent unaligned accesses)*/
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165 | eb26db16 | bellard | |
166 | eb26db16 | bellard | #if defined(__i386__) || defined(__powerpc__)
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167 | eb26db16 | bellard | |
168 | eb26db16 | bellard | #define cpu_to_le16wu(p, v) cpu_to_le16w(p, v)
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169 | eb26db16 | bellard | #define cpu_to_le32wu(p, v) cpu_to_le32w(p, v)
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170 | eb26db16 | bellard | #define le16_to_cpupu(p) le16_to_cpup(p)
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171 | eb26db16 | bellard | #define le32_to_cpupu(p) le32_to_cpup(p)
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172 | eb26db16 | bellard | |
173 | eb26db16 | bellard | #else
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174 | eb26db16 | bellard | |
175 | eb26db16 | bellard | static inline void cpu_to_le16wu(uint16_t *p, uint16_t v) |
176 | eb26db16 | bellard | { |
177 | eb26db16 | bellard | uint8_t *p1 = (uint8_t *)p; |
178 | eb26db16 | bellard | |
179 | eb26db16 | bellard | p1[0] = v;
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180 | eb26db16 | bellard | p1[1] = v >> 8; |
181 | eb26db16 | bellard | } |
182 | eb26db16 | bellard | |
183 | eb26db16 | bellard | static inline void cpu_to_le32wu(uint32_t *p, uint32_t v) |
184 | eb26db16 | bellard | { |
185 | eb26db16 | bellard | uint8_t *p1 = (uint8_t *)p; |
186 | eb26db16 | bellard | |
187 | eb26db16 | bellard | p1[0] = v;
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188 | eb26db16 | bellard | p1[1] = v >> 8; |
189 | eb26db16 | bellard | p1[2] = v >> 16; |
190 | eb26db16 | bellard | p1[3] = v >> 24; |
191 | eb26db16 | bellard | } |
192 | eb26db16 | bellard | |
193 | eb26db16 | bellard | static inline uint16_t le16_to_cpupu(const uint16_t *p) |
194 | eb26db16 | bellard | { |
195 | eb26db16 | bellard | const uint8_t *p1 = (const uint8_t *)p; |
196 | eb26db16 | bellard | return p1[0] | (p1[1] << 8); |
197 | eb26db16 | bellard | } |
198 | eb26db16 | bellard | |
199 | eb26db16 | bellard | static inline uint32_t le32_to_cpupu(const uint32_t *p) |
200 | eb26db16 | bellard | { |
201 | eb26db16 | bellard | const uint8_t *p1 = (const uint8_t *)p; |
202 | eb26db16 | bellard | return p1[0] | (p1[1] << 8) | (p1[2] << 16) | (p1[3] << 24); |
203 | eb26db16 | bellard | } |
204 | eb26db16 | bellard | |
205 | eb26db16 | bellard | #endif
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206 | 67b915a5 | bellard | |
207 | 33e3963e | bellard | /* vl.c */
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208 | 80cabfad | bellard | uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c); |
209 | 313aa567 | bellard | |
210 | 80cabfad | bellard | void hw_error(const char *fmt, ...); |
211 | 80cabfad | bellard | |
212 | 7587cf44 | bellard | int get_image_size(const char *filename); |
213 | 80cabfad | bellard | int load_image(const char *filename, uint8_t *addr); |
214 | 80cabfad | bellard | extern const char *bios_dir; |
215 | 80cabfad | bellard | |
216 | 80cabfad | bellard | void pstrcpy(char *buf, int buf_size, const char *str); |
217 | 80cabfad | bellard | char *pstrcat(char *buf, int buf_size, const char *s); |
218 | 33e3963e | bellard | |
219 | c4b1fcc0 | bellard | int serial_open_device(void); |
220 | c4b1fcc0 | bellard | |
221 | 8a7ddc38 | bellard | extern int vm_running; |
222 | 8a7ddc38 | bellard | |
223 | 8a7ddc38 | bellard | typedef void VMStopHandler(void *opaque, int reason); |
224 | 8a7ddc38 | bellard | |
225 | 8a7ddc38 | bellard | int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque); |
226 | 8a7ddc38 | bellard | void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque); |
227 | 8a7ddc38 | bellard | |
228 | 8a7ddc38 | bellard | void vm_start(void); |
229 | 8a7ddc38 | bellard | void vm_stop(int reason); |
230 | 8a7ddc38 | bellard | |
231 | bb0c6722 | bellard | typedef void QEMUResetHandler(void *opaque); |
232 | bb0c6722 | bellard | |
233 | bb0c6722 | bellard | void qemu_register_reset(QEMUResetHandler *func, void *opaque); |
234 | bb0c6722 | bellard | void qemu_system_reset_request(void); |
235 | bb0c6722 | bellard | void qemu_system_shutdown_request(void); |
236 | bb0c6722 | bellard | |
237 | aaaa7df6 | bellard | extern int audio_enabled; |
238 | 0ced6589 | bellard | extern int ram_size; |
239 | 0ced6589 | bellard | extern int bios_size; |
240 | ee22c2f7 | bellard | extern int rtc_utc; |
241 | 1f04275e | bellard | extern int cirrus_vga_enabled; |
242 | 28b9b5af | bellard | extern int graphic_width; |
243 | 28b9b5af | bellard | extern int graphic_height; |
244 | 28b9b5af | bellard | extern int graphic_depth; |
245 | 0ced6589 | bellard | |
246 | 0ced6589 | bellard | /* XXX: make it dynamic */
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247 | 0ced6589 | bellard | #if defined (TARGET_PPC)
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248 | 0ced6589 | bellard | #define BIOS_SIZE (512 * 1024) |
249 | 0ced6589 | bellard | #else
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250 | 7587cf44 | bellard | #define BIOS_SIZE ((256 + 64) * 1024) |
251 | 0ced6589 | bellard | #endif
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252 | aaaa7df6 | bellard | |
253 | 63066f4f | bellard | /* keyboard/mouse support */
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254 | 63066f4f | bellard | |
255 | 63066f4f | bellard | #define MOUSE_EVENT_LBUTTON 0x01 |
256 | 63066f4f | bellard | #define MOUSE_EVENT_RBUTTON 0x02 |
257 | 63066f4f | bellard | #define MOUSE_EVENT_MBUTTON 0x04 |
258 | 63066f4f | bellard | |
259 | 63066f4f | bellard | typedef void QEMUPutKBDEvent(void *opaque, int keycode); |
260 | 63066f4f | bellard | typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state); |
261 | 63066f4f | bellard | |
262 | 63066f4f | bellard | void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque); |
263 | 63066f4f | bellard | void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque); |
264 | 63066f4f | bellard | |
265 | 63066f4f | bellard | void kbd_put_keycode(int keycode); |
266 | 63066f4f | bellard | void kbd_mouse_event(int dx, int dy, int dz, int buttons_state); |
267 | 63066f4f | bellard | |
268 | c20709aa | bellard | /* async I/O support */
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269 | c20709aa | bellard | |
270 | c20709aa | bellard | typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size); |
271 | c20709aa | bellard | typedef int IOCanRWHandler(void *opaque); |
272 | c20709aa | bellard | |
273 | c20709aa | bellard | int qemu_add_fd_read_handler(int fd, IOCanRWHandler *fd_can_read, |
274 | c20709aa | bellard | IOReadHandler *fd_read, void *opaque);
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275 | c20709aa | bellard | void qemu_del_fd_read_handler(int fd); |
276 | c20709aa | bellard | |
277 | c4b1fcc0 | bellard | /* network redirectors support */
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278 | c4b1fcc0 | bellard | |
279 | c4b1fcc0 | bellard | #define MAX_NICS 8 |
280 | c4b1fcc0 | bellard | |
281 | c4b1fcc0 | bellard | typedef struct NetDriverState { |
282 | c20709aa | bellard | int index; /* index number in QEMU */ |
283 | c4b1fcc0 | bellard | uint8_t macaddr[6];
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284 | c4b1fcc0 | bellard | char ifname[16]; |
285 | c20709aa | bellard | void (*send_packet)(struct NetDriverState *nd, |
286 | c20709aa | bellard | const uint8_t *buf, int size); |
287 | c20709aa | bellard | void (*add_read_packet)(struct NetDriverState *nd, |
288 | c20709aa | bellard | IOCanRWHandler *fd_can_read, |
289 | c20709aa | bellard | IOReadHandler *fd_read, void *opaque);
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290 | c20709aa | bellard | /* tun specific data */
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291 | c20709aa | bellard | int fd;
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292 | c20709aa | bellard | /* slirp specific data */
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293 | c4b1fcc0 | bellard | } NetDriverState; |
294 | c4b1fcc0 | bellard | |
295 | c4b1fcc0 | bellard | extern int nb_nics; |
296 | c4b1fcc0 | bellard | extern NetDriverState nd_table[MAX_NICS];
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297 | c4b1fcc0 | bellard | |
298 | c20709aa | bellard | void qemu_send_packet(NetDriverState *nd, const uint8_t *buf, int size); |
299 | c20709aa | bellard | void qemu_add_read_packet(NetDriverState *nd, IOCanRWHandler *fd_can_read,
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300 | c20709aa | bellard | IOReadHandler *fd_read, void *opaque);
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301 | 8a7ddc38 | bellard | |
302 | 8a7ddc38 | bellard | /* timers */
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303 | 8a7ddc38 | bellard | |
304 | 8a7ddc38 | bellard | typedef struct QEMUClock QEMUClock; |
305 | 8a7ddc38 | bellard | typedef struct QEMUTimer QEMUTimer; |
306 | 8a7ddc38 | bellard | typedef void QEMUTimerCB(void *opaque); |
307 | 8a7ddc38 | bellard | |
308 | 8a7ddc38 | bellard | /* The real time clock should be used only for stuff which does not
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309 | 8a7ddc38 | bellard | change the virtual machine state, as it is run even if the virtual
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310 | 69b91039 | bellard | machine is stopped. The real time clock has a frequency of 1000
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311 | 8a7ddc38 | bellard | Hz. */
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312 | 8a7ddc38 | bellard | extern QEMUClock *rt_clock;
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313 | 8a7ddc38 | bellard | |
314 | 8a7ddc38 | bellard | /* Rge virtual clock is only run during the emulation. It is stopped
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315 | 8a7ddc38 | bellard | when the virtual machine is stopped. Virtual timers use a high
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316 | 8a7ddc38 | bellard | precision clock, usually cpu cycles (use ticks_per_sec). */
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317 | 8a7ddc38 | bellard | extern QEMUClock *vm_clock;
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318 | 8a7ddc38 | bellard | |
319 | 8a7ddc38 | bellard | int64_t qemu_get_clock(QEMUClock *clock); |
320 | 8a7ddc38 | bellard | |
321 | 8a7ddc38 | bellard | QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
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322 | 8a7ddc38 | bellard | void qemu_free_timer(QEMUTimer *ts);
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323 | 8a7ddc38 | bellard | void qemu_del_timer(QEMUTimer *ts);
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324 | 8a7ddc38 | bellard | void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
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325 | 8a7ddc38 | bellard | int qemu_timer_pending(QEMUTimer *ts);
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326 | 8a7ddc38 | bellard | |
327 | 8a7ddc38 | bellard | extern int64_t ticks_per_sec;
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328 | 8a7ddc38 | bellard | extern int pit_min_timer_count; |
329 | 8a7ddc38 | bellard | |
330 | 8a7ddc38 | bellard | void cpu_enable_ticks(void); |
331 | 8a7ddc38 | bellard | void cpu_disable_ticks(void); |
332 | 8a7ddc38 | bellard | |
333 | 8a7ddc38 | bellard | /* VM Load/Save */
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334 | 8a7ddc38 | bellard | |
335 | 8a7ddc38 | bellard | typedef FILE QEMUFile;
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336 | 8a7ddc38 | bellard | |
337 | 8a7ddc38 | bellard | void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size); |
338 | 8a7ddc38 | bellard | void qemu_put_byte(QEMUFile *f, int v); |
339 | 8a7ddc38 | bellard | void qemu_put_be16(QEMUFile *f, unsigned int v); |
340 | 8a7ddc38 | bellard | void qemu_put_be32(QEMUFile *f, unsigned int v); |
341 | 8a7ddc38 | bellard | void qemu_put_be64(QEMUFile *f, uint64_t v);
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342 | 8a7ddc38 | bellard | int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size); |
343 | 8a7ddc38 | bellard | int qemu_get_byte(QEMUFile *f);
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344 | 8a7ddc38 | bellard | unsigned int qemu_get_be16(QEMUFile *f); |
345 | 8a7ddc38 | bellard | unsigned int qemu_get_be32(QEMUFile *f); |
346 | 8a7ddc38 | bellard | uint64_t qemu_get_be64(QEMUFile *f); |
347 | 8a7ddc38 | bellard | |
348 | 8a7ddc38 | bellard | static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv) |
349 | 8a7ddc38 | bellard | { |
350 | 8a7ddc38 | bellard | qemu_put_be64(f, *pv); |
351 | 8a7ddc38 | bellard | } |
352 | 8a7ddc38 | bellard | |
353 | 8a7ddc38 | bellard | static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv) |
354 | 8a7ddc38 | bellard | { |
355 | 8a7ddc38 | bellard | qemu_put_be32(f, *pv); |
356 | 8a7ddc38 | bellard | } |
357 | 8a7ddc38 | bellard | |
358 | 8a7ddc38 | bellard | static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv) |
359 | 8a7ddc38 | bellard | { |
360 | 8a7ddc38 | bellard | qemu_put_be16(f, *pv); |
361 | 8a7ddc38 | bellard | } |
362 | 8a7ddc38 | bellard | |
363 | 8a7ddc38 | bellard | static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv) |
364 | 8a7ddc38 | bellard | { |
365 | 8a7ddc38 | bellard | qemu_put_byte(f, *pv); |
366 | 8a7ddc38 | bellard | } |
367 | 8a7ddc38 | bellard | |
368 | 8a7ddc38 | bellard | static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv) |
369 | 8a7ddc38 | bellard | { |
370 | 8a7ddc38 | bellard | *pv = qemu_get_be64(f); |
371 | 8a7ddc38 | bellard | } |
372 | 8a7ddc38 | bellard | |
373 | 8a7ddc38 | bellard | static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv) |
374 | 8a7ddc38 | bellard | { |
375 | 8a7ddc38 | bellard | *pv = qemu_get_be32(f); |
376 | 8a7ddc38 | bellard | } |
377 | 8a7ddc38 | bellard | |
378 | 8a7ddc38 | bellard | static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv) |
379 | 8a7ddc38 | bellard | { |
380 | 8a7ddc38 | bellard | *pv = qemu_get_be16(f); |
381 | 8a7ddc38 | bellard | } |
382 | 8a7ddc38 | bellard | |
383 | 8a7ddc38 | bellard | static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv) |
384 | 8a7ddc38 | bellard | { |
385 | 8a7ddc38 | bellard | *pv = qemu_get_byte(f); |
386 | 8a7ddc38 | bellard | } |
387 | 8a7ddc38 | bellard | |
388 | 8a7ddc38 | bellard | int64_t qemu_ftell(QEMUFile *f); |
389 | 8a7ddc38 | bellard | int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
|
390 | 8a7ddc38 | bellard | |
391 | 8a7ddc38 | bellard | typedef void SaveStateHandler(QEMUFile *f, void *opaque); |
392 | 8a7ddc38 | bellard | typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id); |
393 | 8a7ddc38 | bellard | |
394 | 8a7ddc38 | bellard | int qemu_loadvm(const char *filename); |
395 | 8a7ddc38 | bellard | int qemu_savevm(const char *filename); |
396 | 8a7ddc38 | bellard | int register_savevm(const char *idstr, |
397 | 8a7ddc38 | bellard | int instance_id,
|
398 | 8a7ddc38 | bellard | int version_id,
|
399 | 8a7ddc38 | bellard | SaveStateHandler *save_state, |
400 | 8a7ddc38 | bellard | LoadStateHandler *load_state, |
401 | 8a7ddc38 | bellard | void *opaque);
|
402 | 8a7ddc38 | bellard | void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
|
403 | 8a7ddc38 | bellard | void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
|
404 | c4b1fcc0 | bellard | |
405 | fc01f7e7 | bellard | /* block.c */
|
406 | fc01f7e7 | bellard | typedef struct BlockDriverState BlockDriverState; |
407 | fc01f7e7 | bellard | |
408 | c4b1fcc0 | bellard | BlockDriverState *bdrv_new(const char *device_name); |
409 | c4b1fcc0 | bellard | void bdrv_delete(BlockDriverState *bs);
|
410 | c4b1fcc0 | bellard | int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot); |
411 | fc01f7e7 | bellard | void bdrv_close(BlockDriverState *bs);
|
412 | fc01f7e7 | bellard | int bdrv_read(BlockDriverState *bs, int64_t sector_num,
|
413 | fc01f7e7 | bellard | uint8_t *buf, int nb_sectors);
|
414 | fc01f7e7 | bellard | int bdrv_write(BlockDriverState *bs, int64_t sector_num,
|
415 | fc01f7e7 | bellard | const uint8_t *buf, int nb_sectors); |
416 | fc01f7e7 | bellard | void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
|
417 | 33e3963e | bellard | int bdrv_commit(BlockDriverState *bs);
|
418 | 77fef8c1 | bellard | void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size); |
419 | 33e3963e | bellard | |
420 | c4b1fcc0 | bellard | #define BDRV_TYPE_HD 0 |
421 | c4b1fcc0 | bellard | #define BDRV_TYPE_CDROM 1 |
422 | c4b1fcc0 | bellard | #define BDRV_TYPE_FLOPPY 2 |
423 | c4b1fcc0 | bellard | |
424 | c4b1fcc0 | bellard | void bdrv_set_geometry_hint(BlockDriverState *bs,
|
425 | c4b1fcc0 | bellard | int cyls, int heads, int secs); |
426 | c4b1fcc0 | bellard | void bdrv_set_type_hint(BlockDriverState *bs, int type); |
427 | c4b1fcc0 | bellard | void bdrv_get_geometry_hint(BlockDriverState *bs,
|
428 | c4b1fcc0 | bellard | int *pcyls, int *pheads, int *psecs); |
429 | c4b1fcc0 | bellard | int bdrv_get_type_hint(BlockDriverState *bs);
|
430 | c4b1fcc0 | bellard | int bdrv_is_removable(BlockDriverState *bs);
|
431 | c4b1fcc0 | bellard | int bdrv_is_read_only(BlockDriverState *bs);
|
432 | c4b1fcc0 | bellard | int bdrv_is_inserted(BlockDriverState *bs);
|
433 | c4b1fcc0 | bellard | int bdrv_is_locked(BlockDriverState *bs);
|
434 | c4b1fcc0 | bellard | void bdrv_set_locked(BlockDriverState *bs, int locked); |
435 | c4b1fcc0 | bellard | void bdrv_set_change_cb(BlockDriverState *bs,
|
436 | c4b1fcc0 | bellard | void (*change_cb)(void *opaque), void *opaque); |
437 | c4b1fcc0 | bellard | |
438 | c4b1fcc0 | bellard | void bdrv_info(void); |
439 | c4b1fcc0 | bellard | BlockDriverState *bdrv_find(const char *name); |
440 | c4b1fcc0 | bellard | |
441 | 26aa7d72 | bellard | /* ISA bus */
|
442 | 26aa7d72 | bellard | |
443 | 26aa7d72 | bellard | extern target_phys_addr_t isa_mem_base;
|
444 | 26aa7d72 | bellard | |
445 | 26aa7d72 | bellard | typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); |
446 | 26aa7d72 | bellard | typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); |
447 | 26aa7d72 | bellard | |
448 | 26aa7d72 | bellard | int register_ioport_read(int start, int length, int size, |
449 | 26aa7d72 | bellard | IOPortReadFunc *func, void *opaque);
|
450 | 26aa7d72 | bellard | int register_ioport_write(int start, int length, int size, |
451 | 26aa7d72 | bellard | IOPortWriteFunc *func, void *opaque);
|
452 | 69b91039 | bellard | void isa_unassign_ioport(int start, int length); |
453 | 69b91039 | bellard | |
454 | 69b91039 | bellard | /* PCI bus */
|
455 | 69b91039 | bellard | |
456 | 69b91039 | bellard | extern int pci_enabled; |
457 | 69b91039 | bellard | |
458 | 69b91039 | bellard | extern target_phys_addr_t pci_mem_base;
|
459 | 69b91039 | bellard | |
460 | 46e50e9d | bellard | typedef struct PCIBus PCIBus; |
461 | 69b91039 | bellard | typedef struct PCIDevice PCIDevice; |
462 | 69b91039 | bellard | |
463 | 69b91039 | bellard | typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, |
464 | 69b91039 | bellard | uint32_t address, uint32_t data, int len);
|
465 | 69b91039 | bellard | typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
|
466 | 69b91039 | bellard | uint32_t address, int len);
|
467 | 69b91039 | bellard | typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, |
468 | 69b91039 | bellard | uint32_t addr, uint32_t size, int type);
|
469 | 69b91039 | bellard | |
470 | 69b91039 | bellard | #define PCI_ADDRESS_SPACE_MEM 0x00 |
471 | 69b91039 | bellard | #define PCI_ADDRESS_SPACE_IO 0x01 |
472 | 69b91039 | bellard | #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 |
473 | 69b91039 | bellard | |
474 | 69b91039 | bellard | typedef struct PCIIORegion { |
475 | 5768f5ac | bellard | uint32_t addr; /* current PCI mapping address. -1 means not mapped */
|
476 | 69b91039 | bellard | uint32_t size; |
477 | 69b91039 | bellard | uint8_t type; |
478 | 69b91039 | bellard | PCIMapIORegionFunc *map_func; |
479 | 69b91039 | bellard | } PCIIORegion; |
480 | 69b91039 | bellard | |
481 | 8a8696a3 | bellard | #define PCI_ROM_SLOT 6 |
482 | 8a8696a3 | bellard | #define PCI_NUM_REGIONS 7 |
483 | 69b91039 | bellard | struct PCIDevice {
|
484 | 69b91039 | bellard | /* PCI config space */
|
485 | 69b91039 | bellard | uint8_t config[256];
|
486 | 69b91039 | bellard | |
487 | 69b91039 | bellard | /* the following fields are read only */
|
488 | 46e50e9d | bellard | PCIBus *bus; |
489 | 69b91039 | bellard | int devfn;
|
490 | 69b91039 | bellard | char name[64]; |
491 | 8a8696a3 | bellard | PCIIORegion io_regions[PCI_NUM_REGIONS]; |
492 | 69b91039 | bellard | |
493 | 69b91039 | bellard | /* do not access the following fields */
|
494 | 69b91039 | bellard | PCIConfigReadFunc *config_read; |
495 | 69b91039 | bellard | PCIConfigWriteFunc *config_write; |
496 | 5768f5ac | bellard | int irq_index;
|
497 | 69b91039 | bellard | }; |
498 | 69b91039 | bellard | |
499 | 46e50e9d | bellard | PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
500 | 46e50e9d | bellard | int instance_size, int devfn, |
501 | 69b91039 | bellard | PCIConfigReadFunc *config_read, |
502 | 69b91039 | bellard | PCIConfigWriteFunc *config_write); |
503 | 69b91039 | bellard | |
504 | 69b91039 | bellard | void pci_register_io_region(PCIDevice *pci_dev, int region_num, |
505 | 69b91039 | bellard | uint32_t size, int type,
|
506 | 69b91039 | bellard | PCIMapIORegionFunc *map_func); |
507 | 69b91039 | bellard | |
508 | 5768f5ac | bellard | void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level); |
509 | 5768f5ac | bellard | |
510 | 5768f5ac | bellard | uint32_t pci_default_read_config(PCIDevice *d, |
511 | 5768f5ac | bellard | uint32_t address, int len);
|
512 | 5768f5ac | bellard | void pci_default_write_config(PCIDevice *d,
|
513 | 5768f5ac | bellard | uint32_t address, uint32_t val, int len);
|
514 | 5768f5ac | bellard | |
515 | 9995c51f | bellard | extern struct PIIX3State *piix3_state; |
516 | 9995c51f | bellard | |
517 | 46e50e9d | bellard | PCIBus *i440fx_init(void);
|
518 | 46e50e9d | bellard | void piix3_init(PCIBus *bus);
|
519 | 69b91039 | bellard | void pci_bios_init(void); |
520 | 5768f5ac | bellard | void pci_info(void); |
521 | 26aa7d72 | bellard | |
522 | 77d4bc34 | bellard | /* temporary: will be moved in platform specific file */
|
523 | 46e50e9d | bellard | PCIBus *pci_prep_init(void);
|
524 | 46e50e9d | bellard | struct openpic_t;
|
525 | 46e50e9d | bellard | void pci_pmac_set_openpic(PCIBus *bus, struct openpic_t *openpic); |
526 | 46e50e9d | bellard | PCIBus *pci_pmac_init(void);
|
527 | 77d4bc34 | bellard | |
528 | 28b9b5af | bellard | /* openpic.c */
|
529 | 28b9b5af | bellard | typedef struct openpic_t openpic_t; |
530 | 28b9b5af | bellard | void openpic_set_irq (openpic_t *opp, int n_IRQ, int level); |
531 | e2733d20 | bellard | openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus); |
532 | 28b9b5af | bellard | |
533 | 313aa567 | bellard | /* vga.c */
|
534 | 313aa567 | bellard | |
535 | 4fa0f5d2 | bellard | #define VGA_RAM_SIZE (4096 * 1024) |
536 | 313aa567 | bellard | |
537 | 313aa567 | bellard | typedef struct DisplayState { |
538 | 313aa567 | bellard | uint8_t *data; |
539 | 313aa567 | bellard | int linesize;
|
540 | 313aa567 | bellard | int depth;
|
541 | 313aa567 | bellard | void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h); |
542 | 313aa567 | bellard | void (*dpy_resize)(struct DisplayState *s, int w, int h); |
543 | 313aa567 | bellard | void (*dpy_refresh)(struct DisplayState *s); |
544 | 313aa567 | bellard | } DisplayState; |
545 | 313aa567 | bellard | |
546 | 313aa567 | bellard | static inline void dpy_update(DisplayState *s, int x, int y, int w, int h) |
547 | 313aa567 | bellard | { |
548 | 313aa567 | bellard | s->dpy_update(s, x, y, w, h); |
549 | 313aa567 | bellard | } |
550 | 313aa567 | bellard | |
551 | 313aa567 | bellard | static inline void dpy_resize(DisplayState *s, int w, int h) |
552 | 313aa567 | bellard | { |
553 | 313aa567 | bellard | s->dpy_resize(s, w, h); |
554 | 313aa567 | bellard | } |
555 | 313aa567 | bellard | |
556 | 46e50e9d | bellard | int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
557 | 46e50e9d | bellard | unsigned long vga_ram_offset, int vga_ram_size); |
558 | 313aa567 | bellard | void vga_update_display(void); |
559 | ee38b4c8 | bellard | void vga_invalidate_display(void); |
560 | 59a983b9 | bellard | void vga_screen_dump(const char *filename); |
561 | 313aa567 | bellard | |
562 | d6bfa22f | bellard | /* cirrus_vga.c */
|
563 | 46e50e9d | bellard | void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
564 | d6bfa22f | bellard | unsigned long vga_ram_offset, int vga_ram_size); |
565 | d6bfa22f | bellard | void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
|
566 | d6bfa22f | bellard | unsigned long vga_ram_offset, int vga_ram_size); |
567 | d6bfa22f | bellard | |
568 | 313aa567 | bellard | /* sdl.c */
|
569 | 313aa567 | bellard | void sdl_display_init(DisplayState *ds);
|
570 | 313aa567 | bellard | |
571 | 5391d806 | bellard | /* ide.c */
|
572 | 5391d806 | bellard | #define MAX_DISKS 4 |
573 | 5391d806 | bellard | |
574 | 5391d806 | bellard | extern BlockDriverState *bs_table[MAX_DISKS];
|
575 | 5391d806 | bellard | |
576 | 69b91039 | bellard | void isa_ide_init(int iobase, int iobase2, int irq, |
577 | 69b91039 | bellard | BlockDriverState *hd0, BlockDriverState *hd1); |
578 | 46e50e9d | bellard | void pci_ide_init(PCIBus *bus, BlockDriverState **hd_table);
|
579 | 46e50e9d | bellard | void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table);
|
580 | 28b9b5af | bellard | int pmac_ide_init (BlockDriverState **hd_table,
|
581 | 28b9b5af | bellard | openpic_t *openpic, int irq);
|
582 | 5391d806 | bellard | |
583 | 27503323 | bellard | /* oss.c */
|
584 | 27503323 | bellard | typedef enum { |
585 | 27503323 | bellard | AUD_FMT_U8, |
586 | 27503323 | bellard | AUD_FMT_S8, |
587 | 27503323 | bellard | AUD_FMT_U16, |
588 | 27503323 | bellard | AUD_FMT_S16 |
589 | 27503323 | bellard | } audfmt_e; |
590 | 27503323 | bellard | |
591 | 27503323 | bellard | void AUD_open (int rfreq, int rnchannels, audfmt_e rfmt); |
592 | 27503323 | bellard | void AUD_reset (int rfreq, int rnchannels, audfmt_e rfmt); |
593 | 27503323 | bellard | int AUD_write (void *in_buf, int size); |
594 | 27503323 | bellard | void AUD_run (void); |
595 | 27503323 | bellard | void AUD_adjust_estimate (int _leftover); |
596 | 27503323 | bellard | int AUD_get_free (void); |
597 | 27503323 | bellard | int AUD_get_live (void); |
598 | 27503323 | bellard | int AUD_get_buffer_size (void); |
599 | 27503323 | bellard | void AUD_init (void); |
600 | 27503323 | bellard | |
601 | 27503323 | bellard | /* dma.c */
|
602 | 16f62432 | bellard | typedef int (*DMA_transfer_handler) (void *opaque, target_ulong addr, int size); |
603 | 27503323 | bellard | int DMA_get_channel_mode (int nchan); |
604 | 27503323 | bellard | void DMA_hold_DREQ (int nchan); |
605 | 27503323 | bellard | void DMA_release_DREQ (int nchan); |
606 | 16f62432 | bellard | void DMA_schedule(int nchan); |
607 | 27503323 | bellard | void DMA_run (void); |
608 | 28b9b5af | bellard | void DMA_init (int high_page_enable); |
609 | 27503323 | bellard | void DMA_register_channel (int nchan, |
610 | 16f62432 | bellard | DMA_transfer_handler transfer_handler, void *opaque);
|
611 | 27503323 | bellard | |
612 | 27503323 | bellard | /* sb16.c */
|
613 | 27503323 | bellard | void SB16_run (void); |
614 | 27503323 | bellard | void SB16_init (void); |
615 | 27503323 | bellard | |
616 | 7138fcfb | bellard | /* fdc.c */
|
617 | 7138fcfb | bellard | #define MAX_FD 2 |
618 | 7138fcfb | bellard | extern BlockDriverState *fd_table[MAX_FD];
|
619 | 7138fcfb | bellard | |
620 | baca51fa | bellard | typedef struct fdctrl_t fdctrl_t; |
621 | baca51fa | bellard | |
622 | baca51fa | bellard | fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, |
623 | baca51fa | bellard | uint32_t io_base, |
624 | baca51fa | bellard | BlockDriverState **fds); |
625 | baca51fa | bellard | int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); |
626 | 7138fcfb | bellard | |
627 | 80cabfad | bellard | /* ne2000.c */
|
628 | 80cabfad | bellard | |
629 | 69b91039 | bellard | void isa_ne2000_init(int base, int irq, NetDriverState *nd); |
630 | 46e50e9d | bellard | void pci_ne2000_init(PCIBus *bus, NetDriverState *nd);
|
631 | 80cabfad | bellard | |
632 | 80cabfad | bellard | /* pckbd.c */
|
633 | 80cabfad | bellard | |
634 | 80cabfad | bellard | void kbd_init(void); |
635 | 80cabfad | bellard | |
636 | 80cabfad | bellard | /* mc146818rtc.c */
|
637 | 80cabfad | bellard | |
638 | 8a7ddc38 | bellard | typedef struct RTCState RTCState; |
639 | 80cabfad | bellard | |
640 | 8a7ddc38 | bellard | RTCState *rtc_init(int base, int irq); |
641 | 8a7ddc38 | bellard | void rtc_set_memory(RTCState *s, int addr, int val); |
642 | 8a7ddc38 | bellard | void rtc_set_date(RTCState *s, const struct tm *tm); |
643 | 80cabfad | bellard | |
644 | 80cabfad | bellard | /* serial.c */
|
645 | 80cabfad | bellard | |
646 | c4b1fcc0 | bellard | typedef struct SerialState SerialState; |
647 | c4b1fcc0 | bellard | |
648 | c4b1fcc0 | bellard | extern SerialState *serial_console;
|
649 | c4b1fcc0 | bellard | |
650 | c4b1fcc0 | bellard | SerialState *serial_init(int base, int irq, int fd); |
651 | c4b1fcc0 | bellard | int serial_can_receive(SerialState *s);
|
652 | c4b1fcc0 | bellard | void serial_receive_byte(SerialState *s, int ch); |
653 | c4b1fcc0 | bellard | void serial_receive_break(SerialState *s);
|
654 | 80cabfad | bellard | |
655 | 80cabfad | bellard | /* i8259.c */
|
656 | 80cabfad | bellard | |
657 | 80cabfad | bellard | void pic_set_irq(int irq, int level); |
658 | 80cabfad | bellard | void pic_init(void); |
659 | c5df018e | bellard | uint32_t pic_intack_read(CPUState *env); |
660 | c20709aa | bellard | void pic_info(void); |
661 | 4a0fb71e | bellard | void irq_info(void); |
662 | 80cabfad | bellard | |
663 | 80cabfad | bellard | /* i8254.c */
|
664 | 80cabfad | bellard | |
665 | 80cabfad | bellard | #define PIT_FREQ 1193182 |
666 | 80cabfad | bellard | |
667 | ec844b96 | bellard | typedef struct PITState PITState; |
668 | ec844b96 | bellard | |
669 | ec844b96 | bellard | PITState *pit_init(int base, int irq); |
670 | ec844b96 | bellard | void pit_set_gate(PITState *pit, int channel, int val); |
671 | ec844b96 | bellard | int pit_get_gate(PITState *pit, int channel); |
672 | ec844b96 | bellard | int pit_get_out(PITState *pit, int channel, int64_t current_time); |
673 | 80cabfad | bellard | |
674 | 80cabfad | bellard | /* pc.c */
|
675 | 80cabfad | bellard | void pc_init(int ram_size, int vga_ram_size, int boot_device, |
676 | 80cabfad | bellard | DisplayState *ds, const char **fd_filename, int snapshot, |
677 | 80cabfad | bellard | const char *kernel_filename, const char *kernel_cmdline, |
678 | 80cabfad | bellard | const char *initrd_filename); |
679 | 80cabfad | bellard | |
680 | 26aa7d72 | bellard | /* ppc.c */
|
681 | 26aa7d72 | bellard | void ppc_init (int ram_size, int vga_ram_size, int boot_device, |
682 | 26aa7d72 | bellard | DisplayState *ds, const char **fd_filename, int snapshot, |
683 | 26aa7d72 | bellard | const char *kernel_filename, const char *kernel_cmdline, |
684 | 26aa7d72 | bellard | const char *initrd_filename); |
685 | 77d4bc34 | bellard | void ppc_prep_init (int ram_size, int vga_ram_size, int boot_device, |
686 | 77d4bc34 | bellard | DisplayState *ds, const char **fd_filename, int snapshot, |
687 | 77d4bc34 | bellard | const char *kernel_filename, const char *kernel_cmdline, |
688 | 77d4bc34 | bellard | const char *initrd_filename); |
689 | 77d4bc34 | bellard | void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device, |
690 | 77d4bc34 | bellard | DisplayState *ds, const char **fd_filename, int snapshot, |
691 | 77d4bc34 | bellard | const char *kernel_filename, const char *kernel_cmdline, |
692 | 77d4bc34 | bellard | const char *initrd_filename); |
693 | 8cc43fef | bellard | #ifdef TARGET_PPC
|
694 | 8cc43fef | bellard | ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq); |
695 | 8cc43fef | bellard | #endif
|
696 | 64201201 | bellard | void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val); |
697 | 77d4bc34 | bellard | |
698 | 77d4bc34 | bellard | extern CPUWriteMemoryFunc *PPC_io_write[];
|
699 | 77d4bc34 | bellard | extern CPUReadMemoryFunc *PPC_io_read[];
|
700 | 77d4bc34 | bellard | extern int prep_enabled; |
701 | 26aa7d72 | bellard | |
702 | 64201201 | bellard | /* NVRAM helpers */
|
703 | 64201201 | bellard | #include "hw/m48t59.h" |
704 | 64201201 | bellard | |
705 | 64201201 | bellard | void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
|
706 | 64201201 | bellard | uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr); |
707 | 64201201 | bellard | void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
|
708 | 64201201 | bellard | uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr); |
709 | 64201201 | bellard | void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
|
710 | 64201201 | bellard | uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr); |
711 | 64201201 | bellard | void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
|
712 | 64201201 | bellard | const unsigned char *str, uint32_t max); |
713 | 64201201 | bellard | int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max); |
714 | 64201201 | bellard | void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
|
715 | 64201201 | bellard | uint32_t start, uint32_t count); |
716 | 64201201 | bellard | int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
|
717 | 64201201 | bellard | const unsigned char *arch, |
718 | 64201201 | bellard | uint32_t RAM_size, int boot_device,
|
719 | 64201201 | bellard | uint32_t kernel_image, uint32_t kernel_size, |
720 | 28b9b5af | bellard | const char *cmdline, |
721 | 64201201 | bellard | uint32_t initrd_image, uint32_t initrd_size, |
722 | 28b9b5af | bellard | uint32_t NVRAM_image, |
723 | 28b9b5af | bellard | int width, int height, int depth); |
724 | 64201201 | bellard | |
725 | 63066f4f | bellard | /* adb.c */
|
726 | 63066f4f | bellard | |
727 | 63066f4f | bellard | #define MAX_ADB_DEVICES 16 |
728 | 63066f4f | bellard | |
729 | e2733d20 | bellard | #define ADB_MAX_OUT_LEN 16 |
730 | 63066f4f | bellard | |
731 | e2733d20 | bellard | typedef struct ADBDevice ADBDevice; |
732 | 63066f4f | bellard | |
733 | e2733d20 | bellard | /* buf = NULL means polling */
|
734 | e2733d20 | bellard | typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out, |
735 | e2733d20 | bellard | const uint8_t *buf, int len); |
736 | 12c28fed | bellard | typedef int ADBDeviceReset(ADBDevice *d); |
737 | 12c28fed | bellard | |
738 | 63066f4f | bellard | struct ADBDevice {
|
739 | 63066f4f | bellard | struct ADBBusState *bus;
|
740 | 63066f4f | bellard | int devaddr;
|
741 | 63066f4f | bellard | int handler;
|
742 | e2733d20 | bellard | ADBDeviceRequest *devreq; |
743 | 12c28fed | bellard | ADBDeviceReset *devreset; |
744 | 63066f4f | bellard | void *opaque;
|
745 | 63066f4f | bellard | }; |
746 | 63066f4f | bellard | |
747 | 63066f4f | bellard | typedef struct ADBBusState { |
748 | 63066f4f | bellard | ADBDevice devices[MAX_ADB_DEVICES]; |
749 | 63066f4f | bellard | int nb_devices;
|
750 | e2733d20 | bellard | int poll_index;
|
751 | 63066f4f | bellard | } ADBBusState; |
752 | 63066f4f | bellard | |
753 | e2733d20 | bellard | int adb_request(ADBBusState *s, uint8_t *buf_out,
|
754 | e2733d20 | bellard | const uint8_t *buf, int len); |
755 | e2733d20 | bellard | int adb_poll(ADBBusState *s, uint8_t *buf_out);
|
756 | 63066f4f | bellard | |
757 | 63066f4f | bellard | ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
|
758 | e2733d20 | bellard | ADBDeviceRequest *devreq, |
759 | 12c28fed | bellard | ADBDeviceReset *devreset, |
760 | 63066f4f | bellard | void *opaque);
|
761 | 63066f4f | bellard | void adb_kbd_init(ADBBusState *bus);
|
762 | 63066f4f | bellard | void adb_mouse_init(ADBBusState *bus);
|
763 | 63066f4f | bellard | |
764 | 63066f4f | bellard | /* cuda.c */
|
765 | 63066f4f | bellard | |
766 | 63066f4f | bellard | extern ADBBusState adb_bus;
|
767 | 28b9b5af | bellard | int cuda_init(openpic_t *openpic, int irq); |
768 | 63066f4f | bellard | |
769 | c4b1fcc0 | bellard | /* monitor.c */
|
770 | c4b1fcc0 | bellard | void monitor_init(void); |
771 | 40c3bac3 | bellard | void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2))); |
772 | c4b1fcc0 | bellard | void term_flush(void); |
773 | c4b1fcc0 | bellard | void term_print_help(void); |
774 | c4b1fcc0 | bellard | |
775 | 8a7ddc38 | bellard | /* gdbstub.c */
|
776 | 8a7ddc38 | bellard | |
777 | 8a7ddc38 | bellard | #define DEFAULT_GDBSTUB_PORT 1234 |
778 | 8a7ddc38 | bellard | |
779 | 8a7ddc38 | bellard | int gdbserver_start(int port); |
780 | 8a7ddc38 | bellard | |
781 | fc01f7e7 | bellard | #endif /* VL_H */ |