Revision d2c33733 hw/ppce500_pci.c
| b/hw/ppce500_pci.c | ||
|---|---|---|
| 79 | 79 |
uint32_t gasket_time; |
| 80 | 80 |
qemu_irq irq[4]; |
| 81 | 81 |
/* mmio maps */ |
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int cfgaddr; |
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int cfgdata; |
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| 84 | 82 |
int reg; |
| 85 | 83 |
}; |
| 86 | 84 |
|
| ... | ... | |
| 268 | 266 |
PCIHostState *h = FROM_SYSBUS(PCIHostState, sysbus_from_qdev(dev)); |
| 269 | 267 |
PPCE500PCIState *s = DO_UPCAST(PPCE500PCIState, pci_state, h); |
| 270 | 268 |
|
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cpu_register_physical_memory(base + PCIE500_CFGADDR, 4, s->cfgaddr);
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cpu_register_physical_memory(base + PCIE500_CFGDATA, 4, s->cfgdata);
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sysbus_add_memory(dev, base + PCIE500_CFGADDR, &h->conf_mem);
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sysbus_add_memory(dev, base + PCIE500_CFGDATA, &h->data_mem);
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cpu_register_physical_memory(base + PCIE500_REG_BASE, PCIE500_REG_SIZE, |
| 274 | 272 |
s->reg); |
| 275 | 273 |
} |
| 276 | 274 |
|
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static void e500_pci_unmap(SysBusDevice *dev, target_phys_addr_t base) |
| 278 | 276 |
{
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cpu_register_physical_memory(base + PCIE500_CFGADDR, 4,
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IO_MEM_UNASSIGNED); |
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cpu_register_physical_memory(base + PCIE500_CFGDATA, 4,
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IO_MEM_UNASSIGNED);
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PCIHostState *h = FROM_SYSBUS(PCIHostState, sysbus_from_qdev(dev));
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sysbus_del_memory(dev, &h->conf_mem);
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sysbus_del_memory(dev, &h->data_mem);
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| 283 | 281 |
cpu_register_physical_memory(base + PCIE500_REG_BASE, PCIE500_REG_SIZE, |
| 284 | 282 |
IO_MEM_UNASSIGNED); |
| 285 | 283 |
} |
| ... | ... | |
| 309 | 307 |
|
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pci_create_simple(b, 0, "e500-host-bridge"); |
| 311 | 309 |
|
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s->cfgaddr = pci_host_conf_register_mmio(&s->pci_state, DEVICE_BIG_ENDIAN); |
|
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s->cfgdata = pci_host_data_register_mmio(&s->pci_state, |
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DEVICE_LITTLE_ENDIAN); |
|
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memory_region_init_io(&h->conf_mem, &pci_host_conf_be_ops, h, |
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"pci-conf-idx", 4); |
|
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memory_region_init_io(&h->data_mem, &pci_host_data_le_ops, h, |
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"pci-conf-data", 4); |
|
| 315 | 314 |
s->reg = cpu_register_io_memory(e500_pci_reg_read, e500_pci_reg_write, s, |
| 316 | 315 |
DEVICE_BIG_ENDIAN); |
| 317 | 316 |
sysbus_init_mmio_cb2(dev, e500_pci_map, e500_pci_unmap); |
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