Revision d2c63fc1 hw/sun4u.c
| b/hw/sun4u.c | ||
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| 23 | 23 |
*/ |
| 24 | 24 |
#include "vl.h" |
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#include "m48t59.h" |
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#include "firmware_abi.h" |
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#define KERNEL_LOAD_ADDR 0x00404000 |
| 28 | 29 |
#define CMDLINE_ADDR 0x003ff000 |
| ... | ... | |
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{
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} |
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/* NVRAM helpers */ |
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static void nvram_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value) |
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{
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m48t59_write(nvram, addr, value); |
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} |
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static uint8_t nvram_get_byte (m48t59_t *nvram, uint32_t addr) |
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{
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return m48t59_read(nvram, addr); |
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} |
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static void nvram_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value) |
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{
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m48t59_write(nvram, addr++, (value >> 8) & 0xff); |
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m48t59_write(nvram, addr++, value & 0xff); |
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} |
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static uint16_t nvram_get_word (m48t59_t *nvram, uint32_t addr) |
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{
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uint16_t tmp; |
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tmp = m48t59_read(nvram, addr) << 8; |
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tmp |= m48t59_read(nvram, addr + 1); |
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return tmp; |
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} |
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static void nvram_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value) |
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{
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m48t59_write(nvram, addr++, value >> 24); |
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m48t59_write(nvram, addr++, (value >> 16) & 0xff); |
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m48t59_write(nvram, addr++, (value >> 8) & 0xff); |
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m48t59_write(nvram, addr++, value & 0xff); |
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} |
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static void nvram_set_string (m48t59_t *nvram, uint32_t addr, |
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const unsigned char *str, uint32_t max) |
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{
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unsigned int i; |
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for (i = 0; i < max && str[i] != '\0'; i++) {
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m48t59_write(nvram, addr + i, str[i]); |
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} |
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m48t59_write(nvram, addr + max - 1, '\0'); |
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} |
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static uint16_t nvram_crc_update (uint16_t prev, uint16_t value) |
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{
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uint16_t tmp; |
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uint16_t pd, pd1, pd2; |
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tmp = prev >> 8; |
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pd = prev ^ value; |
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pd1 = pd & 0x000F; |
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pd2 = ((pd >> 4) & 0x000F) ^ pd1; |
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tmp ^= (pd1 << 3) | (pd1 << 8); |
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tmp ^= pd2 | (pd2 << 7) | (pd2 << 12); |
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return tmp; |
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} |
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static uint16_t nvram_compute_crc (m48t59_t *nvram, uint32_t start, |
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uint32_t count) |
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{
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uint32_t i; |
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uint16_t crc = 0xFFFF; |
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int odd; |
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odd = count & 1; |
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count &= ~1; |
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for (i = 0; i != count; i++) {
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crc = nvram_crc_update(crc, nvram_get_word(nvram, start + i)); |
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} |
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if (odd) {
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crc = nvram_crc_update(crc, nvram_get_byte(nvram, start + i) << 8); |
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} |
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return crc; |
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} |
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static uint32_t nvram_set_var (m48t59_t *nvram, uint32_t addr, |
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const unsigned char *str) |
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{
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uint32_t len; |
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len = strlen(str) + 1; |
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nvram_set_string(nvram, addr, str, len); |
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return addr + len; |
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} |
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static void nvram_finish_partition (m48t59_t *nvram, uint32_t start, |
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uint32_t end) |
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{
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unsigned int i, sum; |
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// Length divided by 16 |
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m48t59_write(nvram, start + 2, ((end - start) >> 12) & 0xff); |
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m48t59_write(nvram, start + 3, ((end - start) >> 4) & 0xff); |
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// Checksum |
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sum = m48t59_read(nvram, start); |
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for (i = 0; i < 14; i++) {
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sum += m48t59_read(nvram, start + 2 + i); |
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sum = (sum + ((sum & 0xff00) >> 8)) & 0xff; |
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} |
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m48t59_write(nvram, start + 1, sum & 0xff); |
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} |
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extern int nographic; |
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int sun4u_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size, |
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const unsigned char *arch, |
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uint32_t RAM_size, int boot_device,
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uint32_t kernel_image, uint32_t kernel_size, |
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const char *cmdline, |
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uint32_t initrd_image, uint32_t initrd_size, |
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uint32_t NVRAM_image, |
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int width, int height, int depth) |
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static int sun4u_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
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const unsigned char *arch,
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uint32_t RAM_size, const char *boot_devices,
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uint32_t kernel_image, uint32_t kernel_size,
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const char *cmdline,
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uint32_t initrd_image, uint32_t initrd_size,
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uint32_t NVRAM_image,
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int width, int height, int depth)
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{
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uint16_t crc; |
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unsigned int i; |
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uint32_t start, end; |
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|
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/* Set parameters for Open Hack'Ware BIOS */ |
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nvram_set_string(nvram, 0x00, "QEMU_BIOS", 16); |
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nvram_set_lword(nvram, 0x10, 0x00000002); /* structure v2 */ |
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nvram_set_word(nvram, 0x14, NVRAM_size); |
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nvram_set_string(nvram, 0x20, arch, 16); |
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nvram_set_byte(nvram, 0x2f, nographic & 0xff); |
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nvram_set_lword(nvram, 0x30, RAM_size); |
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nvram_set_byte(nvram, 0x34, boot_device); |
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nvram_set_lword(nvram, 0x38, kernel_image); |
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nvram_set_lword(nvram, 0x3C, kernel_size); |
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uint8_t image[0x1ff0]; |
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ohwcfg_v3_t *header = (ohwcfg_v3_t *)ℑ |
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struct sparc_arch_cfg *sparc_header; |
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struct OpenBIOS_nvpart_v1 *part_header; |
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memset(image, '\0', sizeof(image)); |
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// Try to match PPC NVRAM |
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strcpy(header->struct_ident, "QEMU_BIOS"); |
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header->struct_version = cpu_to_be32(3); /* structure v3 */ |
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header->nvram_size = cpu_to_be16(NVRAM_size); |
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header->nvram_arch_ptr = cpu_to_be16(sizeof(ohwcfg_v3_t)); |
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header->nvram_arch_size = cpu_to_be16(sizeof(struct sparc_arch_cfg)); |
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strcpy(header->arch, arch); |
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header->nb_cpus = smp_cpus & 0xff; |
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header->RAM0_base = 0; |
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header->RAM0_size = cpu_to_be64((uint64_t)RAM_size); |
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strcpy(header->boot_devices, boot_devices); |
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header->nboot_devices = strlen(boot_devices) & 0xff; |
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header->kernel_image = cpu_to_be64((uint64_t)kernel_image); |
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header->kernel_size = cpu_to_be64((uint64_t)kernel_size); |
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if (cmdline) {
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/* XXX: put the cmdline in NVRAM too ? */ |
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strcpy(phys_ram_base + CMDLINE_ADDR, cmdline); |
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nvram_set_lword(nvram, 0x40, CMDLINE_ADDR); |
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nvram_set_lword(nvram, 0x44, strlen(cmdline)); |
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} else {
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nvram_set_lword(nvram, 0x40, 0); |
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nvram_set_lword(nvram, 0x44, 0); |
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header->cmdline = cpu_to_be64((uint64_t)CMDLINE_ADDR); |
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header->cmdline_size = cpu_to_be64((uint64_t)strlen(cmdline)); |
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} |
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nvram_set_lword(nvram, 0x48, initrd_image); |
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nvram_set_lword(nvram, 0x4C, initrd_size); |
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nvram_set_lword(nvram, 0x50, NVRAM_image); |
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header->initrd_image = cpu_to_be64((uint64_t)initrd_image); |
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header->initrd_size = cpu_to_be64((uint64_t)initrd_size); |
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header->NVRAM_image = cpu_to_be64((uint64_t)NVRAM_image); |
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header->width = cpu_to_be16(width); |
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header->height = cpu_to_be16(height); |
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header->depth = cpu_to_be16(depth); |
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if (nographic) |
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header->graphic_flags = cpu_to_be16(OHW_GF_NOGRAPHICS); |
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nvram_set_word(nvram, 0x54, width); |
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nvram_set_word(nvram, 0x56, height); |
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nvram_set_word(nvram, 0x58, depth); |
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crc = nvram_compute_crc(nvram, 0x00, 0xF8); |
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nvram_set_word(nvram, 0xFC, crc); |
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header->crc = cpu_to_be16(OHW_compute_crc(header, 0x00, 0xF8)); |
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// Architecture specific header |
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start = sizeof(ohwcfg_v3_t); |
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sparc_header = (struct sparc_arch_cfg *)&image[start]; |
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sparc_header->valid = 0; |
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start += sizeof(struct sparc_arch_cfg); |
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|
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// OpenBIOS nvram variables |
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// Variable partition |
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start = 256;
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m48t59_write(nvram, start, 0x70);
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nvram_set_string(nvram, start + 4, "system", 12);
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part_header = (struct OpenBIOS_nvpart_v1 *)&image[start];
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part_header->signature = OPENBIOS_PART_SYSTEM;
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strcpy(part_header->name, "system");
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end = start + 16;
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end = start + sizeof(struct OpenBIOS_nvpart_v1);
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for (i = 0; i < nb_prom_envs; i++) |
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end = nvram_set_var(nvram, end, prom_envs[i]); |
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end = OpenBIOS_set_var(image, end, prom_envs[i]); |
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// End marker |
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image[end++] = '\0'; |
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m48t59_write(nvram, end++ , 0); |
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end = start + ((end - start + 15) & ~15); |
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nvram_finish_partition(nvram, start, end);
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OpenBIOS_finish_partition(part_header, end - start);
|
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|
| 235 | 144 |
// free partition |
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start = end; |
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m48t59_write(nvram, start, 0x7f); |
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nvram_set_string(nvram, start + 4, "free", 12); |
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part_header = (struct OpenBIOS_nvpart_v1 *)&image[start]; |
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part_header->signature = OPENBIOS_PART_FREE; |
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strcpy(part_header->name, "free"); |
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|
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end = 0x1fd0; |
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nvram_finish_partition(nvram, start, end); |
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OpenBIOS_finish_partition(part_header, end - start); |
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|
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for (i = 0; i < sizeof(image); i++) |
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m48t59_write(nvram, i, image[i]); |
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|
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return 0; |
| 244 | 157 |
} |
| ... | ... | |
| 306 | 219 |
static fdctrl_t *floppy_controller; |
| 307 | 220 |
|
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/* Sun4u hardware initialisation */ |
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static void sun4u_init(int ram_size, int vga_ram_size, const char *boot_device, |
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static void sun4u_init(int ram_size, int vga_ram_size, const char *boot_devices,
|
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DisplayState *ds, const char **fd_filename, int snapshot, |
| 311 | 224 |
const char *kernel_filename, const char *kernel_cmdline, |
| 312 | 225 |
const char *initrd_filename, const char *cpu_model) |
| ... | ... | |
| 428 | 341 |
i8042_init(NULL/*1*/, NULL/*12*/, 0x60); |
| 429 | 342 |
floppy_controller = fdctrl_init(NULL/*6*/, 2, 0, 0x3f0, fd_table); |
| 430 | 343 |
nvram = m48t59_init(NULL/*8*/, 0, 0x0074, NVRAM_SIZE, 59); |
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sun4u_NVRAM_set_params(nvram, NVRAM_SIZE, "Sun4u", ram_size, boot_device[0],
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sun4u_NVRAM_set_params(nvram, NVRAM_SIZE, "Sun4u", ram_size, boot_devices,
|
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| 432 | 345 |
KERNEL_LOAD_ADDR, kernel_size, |
| 433 | 346 |
kernel_cmdline, |
| 434 | 347 |
INITRD_LOAD_ADDR, initrd_size, |
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