root / hw / xio3130_downstream.h @ d2d979c6
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1 | 48ebf2f9 | Isaku Yamahata | #ifndef QEMU_XIO3130_DOWNSTREAM_H
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2 | 48ebf2f9 | Isaku Yamahata | #define QEMU_XIO3130_DOWNSTREAM_H
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3 | 48ebf2f9 | Isaku Yamahata | |
4 | 48ebf2f9 | Isaku Yamahata | #include "pcie_port.h" |
5 | 48ebf2f9 | Isaku Yamahata | |
6 | 48ebf2f9 | Isaku Yamahata | PCIESlot *xio3130_downstream_init(PCIBus *bus, int devfn, bool multifunction, |
7 | 48ebf2f9 | Isaku Yamahata | const char *bus_name, pci_map_irq_fn map_irq, |
8 | 48ebf2f9 | Isaku Yamahata | uint8_t port, uint8_t chassis, |
9 | 48ebf2f9 | Isaku Yamahata | uint16_t slot); |
10 | 48ebf2f9 | Isaku Yamahata | |
11 | 48ebf2f9 | Isaku Yamahata | #endif /* QEMU_XIO3130_DOWNSTREAM_H */ |