Revision d30df5ce

b/hw/mips_malta.c
910 910 
    /* Board ID = 0x420 (Malta Board with CoreLV)
911 911 
       XXX: theoretically 0x1e000010 should map to flash and 0x1fc00010 should
912 912 
       map to the board ID. */
913 
    stl_phys(0x1fc00010LL, 0x00000420);
913 
    stl_p(qemu_get_ram_ptr(bios_offset) + 0x10, 0x00000420);
914 914 

  		





  915
  915
  
    
    /* Init internal devices */


  		





  916
  916
  
    
    cpu_mips_irq_init_cpu(env);


  		












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