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/*
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 *  i386 micro operations
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 * 
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 *  Copyright (c) 2003 Fabrice Bellard
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#include "exec.h"
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/* n must be a constant to be efficient */
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static inline int lshift(int x, int n)
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{
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    if (n >= 0)
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        return x << n;
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    else
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        return x >> (-n);
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}
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/* we define the various pieces of code used by the JIT */
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#define REG EAX
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#define REGNAME _EAX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG ECX
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#define REGNAME _ECX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EDX
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#define REGNAME _EDX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EBX
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#define REGNAME _EBX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG ESP
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#define REGNAME _ESP
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EBP
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#define REGNAME _EBP
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG ESI
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#define REGNAME _ESI
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EDI
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#define REGNAME _EDI
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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/* operations with flags */
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/* update flags with T0 and T1 (add/sub case) */
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void OPPROTO op_update2_cc(void)
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{
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    CC_SRC = T1;
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    CC_DST = T0;
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}
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/* update flags with T0 (logic operation case) */
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void OPPROTO op_update1_cc(void)
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{
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    CC_DST = T0;
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}
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void OPPROTO op_update_neg_cc(void)
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{
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    CC_SRC = -T0;
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    CC_DST = T0;
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}
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void OPPROTO op_cmpl_T0_T1_cc(void)
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{
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    CC_SRC = T1;
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    CC_DST = T0 - T1;
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}
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void OPPROTO op_update_inc_cc(void)
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{
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    CC_SRC = cc_table[CC_OP].compute_c();
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    CC_DST = T0;
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}
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void OPPROTO op_testl_T0_T1_cc(void)
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{
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    CC_DST = T0 & T1;
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}
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/* operations without flags */
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void OPPROTO op_addl_T0_T1(void)
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{
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    T0 += T1;
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}
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void OPPROTO op_orl_T0_T1(void)
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{
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    T0 |= T1;
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}
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void OPPROTO op_andl_T0_T1(void)
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{
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    T0 &= T1;
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}
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void OPPROTO op_subl_T0_T1(void)
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{
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    T0 -= T1;
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}
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void OPPROTO op_xorl_T0_T1(void)
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{
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    T0 ^= T1;
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}
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void OPPROTO op_negl_T0(void)
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{
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    T0 = -T0;
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}
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void OPPROTO op_incl_T0(void)
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{
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    T0++;
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}
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void OPPROTO op_decl_T0(void)
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{
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    T0--;
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}
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void OPPROTO op_notl_T0(void)
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{
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    T0 = ~T0;
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}
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void OPPROTO op_bswapl_T0(void)
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{
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    T0 = bswap32(T0);
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}
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/* multiply/divide */
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/* XXX: add eflags optimizations */
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/* XXX: add non P4 style flags */
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void OPPROTO op_mulb_AL_T0(void)
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{
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    unsigned int res;
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    res = (uint8_t)EAX * (uint8_t)T0;
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    EAX = (EAX & 0xffff0000) | res;
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    CC_DST = res;
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    CC_SRC = (res & 0xff00);
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}
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void OPPROTO op_imulb_AL_T0(void)
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{
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    int res;
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    res = (int8_t)EAX * (int8_t)T0;
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    EAX = (EAX & 0xffff0000) | (res & 0xffff);
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    CC_DST = res;
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    CC_SRC = (res != (int8_t)res);
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}
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void OPPROTO op_mulw_AX_T0(void)
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{
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    unsigned int res;
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    res = (uint16_t)EAX * (uint16_t)T0;
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    EAX = (EAX & 0xffff0000) | (res & 0xffff);
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    EDX = (EDX & 0xffff0000) | ((res >> 16) & 0xffff);
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    CC_DST = res;
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    CC_SRC = res >> 16;
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}
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void OPPROTO op_imulw_AX_T0(void)
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{
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    int res;
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    res = (int16_t)EAX * (int16_t)T0;
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    EAX = (EAX & 0xffff0000) | (res & 0xffff);
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    EDX = (EDX & 0xffff0000) | ((res >> 16) & 0xffff);
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    CC_DST = res;
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    CC_SRC = (res != (int16_t)res);
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}
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void OPPROTO op_mull_EAX_T0(void)
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{
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    uint64_t res;
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    res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);
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    EAX = res;
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    EDX = res >> 32;
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    CC_DST = res;
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    CC_SRC = res >> 32;
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}
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void OPPROTO op_imull_EAX_T0(void)
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{
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    int64_t res;
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    res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
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    EAX = res;
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    EDX = res >> 32;
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    CC_DST = res;
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    CC_SRC = (res != (int32_t)res);
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}
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void OPPROTO op_imulw_T0_T1(void)
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{
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    int res;
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    res = (int16_t)T0 * (int16_t)T1;
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    T0 = res;
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    CC_DST = res;
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    CC_SRC = (res != (int16_t)res);
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}
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void OPPROTO op_imull_T0_T1(void)
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{
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    int64_t res;
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    res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
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    T0 = res;
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    CC_DST = res;
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    CC_SRC = (res != (int32_t)res);
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}
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/* division, flags are undefined */
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/* XXX: add exceptions for overflow */
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void OPPROTO op_divb_AL_T0(void)
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{
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    unsigned int num, den, q, r;
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    num = (EAX & 0xffff);
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    den = (T0 & 0xff);
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    if (den == 0) {
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        EIP = PARAM1;
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        raise_exception(EXCP00_DIVZ);
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    }
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    q = (num / den) & 0xff;
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    r = (num % den) & 0xff;
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    EAX = (EAX & 0xffff0000) | (r << 8) | q;
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}
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void OPPROTO op_idivb_AL_T0(void)
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{
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    int num, den, q, r;
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    num = (int16_t)EAX;
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    den = (int8_t)T0;
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    if (den == 0) {
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        EIP = PARAM1;
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        raise_exception(EXCP00_DIVZ);
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    }
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    q = (num / den) & 0xff;
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    r = (num % den) & 0xff;
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    EAX = (EAX & 0xffff0000) | (r << 8) | q;
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}
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void OPPROTO op_divw_AX_T0(void)
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{
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    unsigned int num, den, q, r;
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    num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
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    den = (T0 & 0xffff);
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    if (den == 0) {
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        EIP = PARAM1;
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        raise_exception(EXCP00_DIVZ);
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    }
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    q = (num / den) & 0xffff;
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    r = (num % den) & 0xffff;
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    EAX = (EAX & 0xffff0000) | q;
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    EDX = (EDX & 0xffff0000) | r;
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}
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void OPPROTO op_idivw_AX_T0(void)
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{
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    int num, den, q, r;
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    num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
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    den = (int16_t)T0;
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    if (den == 0) {
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        EIP = PARAM1;
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        raise_exception(EXCP00_DIVZ);
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    }
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    q = (num / den) & 0xffff;
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    r = (num % den) & 0xffff;
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    EAX = (EAX & 0xffff0000) | q;
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    EDX = (EDX & 0xffff0000) | r;
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}
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void OPPROTO op_divl_EAX_T0(void)
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{
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    helper_divl_EAX_T0(PARAM1);
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}
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void OPPROTO op_idivl_EAX_T0(void)
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{
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    helper_idivl_EAX_T0(PARAM1);
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}
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/* constant load & misc op */
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void OPPROTO op_movl_T0_im(void)
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{
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    T0 = PARAM1;
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}
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void OPPROTO op_addl_T0_im(void)
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{
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    T0 += PARAM1;
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}
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void OPPROTO op_andl_T0_ffff(void)
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{
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    T0 = T0 & 0xffff;
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}
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void OPPROTO op_andl_T0_im(void)
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{
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    T0 = T0 & PARAM1;
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}
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void OPPROTO op_movl_T0_T1(void)
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{
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    T0 = T1;
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}
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void OPPROTO op_movl_T1_im(void)
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{
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    T1 = PARAM1;
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}
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void OPPROTO op_addl_T1_im(void)
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{
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    T1 += PARAM1;
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}
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void OPPROTO op_movl_T1_A0(void)
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{
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    T1 = A0;
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}
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void OPPROTO op_movl_A0_im(void)
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{
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    A0 = PARAM1;
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}
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void OPPROTO op_addl_A0_im(void)
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{
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    A0 += PARAM1;
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}
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void OPPROTO op_addl_A0_AL(void)
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{
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    A0 += (EAX & 0xff);
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}
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void OPPROTO op_andl_A0_ffff(void)
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{
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    A0 = A0 & 0xffff;
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}
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/* memory access */
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#define MEMSUFFIX _raw
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#include "ops_mem.h"
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#if !defined(CONFIG_USER_ONLY)
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#define MEMSUFFIX _user
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#include "ops_mem.h"
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#define MEMSUFFIX _kernel
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#include "ops_mem.h"
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#endif
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/* used for bit operations */
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void OPPROTO op_add_bitw_A0_T1(void)
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{
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    A0 += ((int32_t)T1 >> 4) << 1;
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}
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void OPPROTO op_add_bitl_A0_T1(void)
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{
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    A0 += ((int32_t)T1 >> 5) << 2;
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}
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/* indirect jump */
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void OPPROTO op_jmp_T0(void)
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{
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    EIP = T0;
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}
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void OPPROTO op_jmp_im(void)
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{
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    EIP = PARAM1;
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}
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void OPPROTO op_hlt(void)
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{
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    env->exception_index = EXCP_HLT;
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    cpu_loop_exit();
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}
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void OPPROTO op_debug(void)
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{
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    env->exception_index = EXCP_DEBUG;
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    cpu_loop_exit();
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}
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void OPPROTO op_raise_interrupt(void)
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{
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    int intno;
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    unsigned int next_eip;
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    intno = PARAM1;
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    next_eip = PARAM2;
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    raise_interrupt(intno, 1, 0, next_eip);
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}
446 2c0262af bellard
447 2c0262af bellard
void OPPROTO op_raise_exception(void)
448 2c0262af bellard
{
449 2c0262af bellard
    int exception_index;
450 2c0262af bellard
    exception_index = PARAM1;
451 2c0262af bellard
    raise_exception(exception_index);
452 2c0262af bellard
}
453 2c0262af bellard
454 2c0262af bellard
void OPPROTO op_into(void)
455 2c0262af bellard
{
456 2c0262af bellard
    int eflags;
457 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
458 2c0262af bellard
    if (eflags & CC_O) {
459 2c0262af bellard
        raise_interrupt(EXCP04_INTO, 1, 0, PARAM1);
460 2c0262af bellard
    }
461 2c0262af bellard
    FORCE_RET();
462 2c0262af bellard
}
463 2c0262af bellard
464 2c0262af bellard
void OPPROTO op_cli(void)
465 2c0262af bellard
{
466 2c0262af bellard
    env->eflags &= ~IF_MASK;
467 2c0262af bellard
}
468 2c0262af bellard
469 2c0262af bellard
void OPPROTO op_sti(void)
470 2c0262af bellard
{
471 2c0262af bellard
    env->eflags |= IF_MASK;
472 2c0262af bellard
}
473 2c0262af bellard
474 2c0262af bellard
void OPPROTO op_set_inhibit_irq(void)
475 2c0262af bellard
{
476 2c0262af bellard
    env->hflags |= HF_INHIBIT_IRQ_MASK;
477 2c0262af bellard
}
478 2c0262af bellard
479 2c0262af bellard
void OPPROTO op_reset_inhibit_irq(void)
480 2c0262af bellard
{
481 2c0262af bellard
    env->hflags &= ~HF_INHIBIT_IRQ_MASK;
482 2c0262af bellard
}
483 2c0262af bellard
484 2c0262af bellard
#if 0
485 2c0262af bellard
/* vm86plus instructions */
486 2c0262af bellard
void OPPROTO op_cli_vm(void)
487 2c0262af bellard
{
488 2c0262af bellard
    env->eflags &= ~VIF_MASK;
489 2c0262af bellard
}
490 2c0262af bellard

491 2c0262af bellard
void OPPROTO op_sti_vm(void)
492 2c0262af bellard
{
493 2c0262af bellard
    env->eflags |= VIF_MASK;
494 2c0262af bellard
    if (env->eflags & VIP_MASK) {
495 2c0262af bellard
        EIP = PARAM1;
496 2c0262af bellard
        raise_exception(EXCP0D_GPF);
497 2c0262af bellard
    }
498 2c0262af bellard
    FORCE_RET();
499 2c0262af bellard
}
500 2c0262af bellard
#endif
501 2c0262af bellard
502 2c0262af bellard
void OPPROTO op_boundw(void)
503 2c0262af bellard
{
504 2c0262af bellard
    int low, high, v;
505 2c0262af bellard
    low = ldsw((uint8_t *)A0);
506 2c0262af bellard
    high = ldsw((uint8_t *)A0 + 2);
507 2c0262af bellard
    v = (int16_t)T0;
508 2c0262af bellard
    if (v < low || v > high) {
509 2c0262af bellard
        EIP = PARAM1;
510 2c0262af bellard
        raise_exception(EXCP05_BOUND);
511 2c0262af bellard
    }
512 2c0262af bellard
    FORCE_RET();
513 2c0262af bellard
}
514 2c0262af bellard
515 2c0262af bellard
void OPPROTO op_boundl(void)
516 2c0262af bellard
{
517 2c0262af bellard
    int low, high, v;
518 2c0262af bellard
    low = ldl((uint8_t *)A0);
519 2c0262af bellard
    high = ldl((uint8_t *)A0 + 4);
520 2c0262af bellard
    v = T0;
521 2c0262af bellard
    if (v < low || v > high) {
522 2c0262af bellard
        EIP = PARAM1;
523 2c0262af bellard
        raise_exception(EXCP05_BOUND);
524 2c0262af bellard
    }
525 2c0262af bellard
    FORCE_RET();
526 2c0262af bellard
}
527 2c0262af bellard
528 2c0262af bellard
void OPPROTO op_cmpxchg8b(void)
529 2c0262af bellard
{
530 2c0262af bellard
    helper_cmpxchg8b();
531 2c0262af bellard
}
532 2c0262af bellard
533 2c0262af bellard
void OPPROTO op_jmp(void)
534 2c0262af bellard
{
535 2c0262af bellard
    JUMP_TB(op_jmp, PARAM1, 0, PARAM2);
536 2c0262af bellard
}
537 2c0262af bellard
538 2c0262af bellard
void OPPROTO op_movl_T0_0(void)
539 2c0262af bellard
{
540 2c0262af bellard
    T0 = 0;
541 2c0262af bellard
}
542 2c0262af bellard
543 2c0262af bellard
void OPPROTO op_exit_tb(void)
544 2c0262af bellard
{
545 2c0262af bellard
    EXIT_TB();
546 2c0262af bellard
}
547 2c0262af bellard
548 2c0262af bellard
/* multiple size ops */
549 2c0262af bellard
550 2c0262af bellard
#define ldul ldl
551 2c0262af bellard
552 2c0262af bellard
#define SHIFT 0
553 2c0262af bellard
#include "ops_template.h"
554 2c0262af bellard
#undef SHIFT
555 2c0262af bellard
556 2c0262af bellard
#define SHIFT 1
557 2c0262af bellard
#include "ops_template.h"
558 2c0262af bellard
#undef SHIFT
559 2c0262af bellard
560 2c0262af bellard
#define SHIFT 2
561 2c0262af bellard
#include "ops_template.h"
562 2c0262af bellard
#undef SHIFT
563 2c0262af bellard
564 2c0262af bellard
/* sign extend */
565 2c0262af bellard
566 2c0262af bellard
void OPPROTO op_movsbl_T0_T0(void)
567 2c0262af bellard
{
568 2c0262af bellard
    T0 = (int8_t)T0;
569 2c0262af bellard
}
570 2c0262af bellard
571 2c0262af bellard
void OPPROTO op_movzbl_T0_T0(void)
572 2c0262af bellard
{
573 2c0262af bellard
    T0 = (uint8_t)T0;
574 2c0262af bellard
}
575 2c0262af bellard
576 2c0262af bellard
void OPPROTO op_movswl_T0_T0(void)
577 2c0262af bellard
{
578 2c0262af bellard
    T0 = (int16_t)T0;
579 2c0262af bellard
}
580 2c0262af bellard
581 2c0262af bellard
void OPPROTO op_movzwl_T0_T0(void)
582 2c0262af bellard
{
583 2c0262af bellard
    T0 = (uint16_t)T0;
584 2c0262af bellard
}
585 2c0262af bellard
586 2c0262af bellard
void OPPROTO op_movswl_EAX_AX(void)
587 2c0262af bellard
{
588 2c0262af bellard
    EAX = (int16_t)EAX;
589 2c0262af bellard
}
590 2c0262af bellard
591 2c0262af bellard
void OPPROTO op_movsbw_AX_AL(void)
592 2c0262af bellard
{
593 2c0262af bellard
    EAX = (EAX & 0xffff0000) | ((int8_t)EAX & 0xffff);
594 2c0262af bellard
}
595 2c0262af bellard
596 2c0262af bellard
void OPPROTO op_movslq_EDX_EAX(void)
597 2c0262af bellard
{
598 2c0262af bellard
    EDX = (int32_t)EAX >> 31;
599 2c0262af bellard
}
600 2c0262af bellard
601 2c0262af bellard
void OPPROTO op_movswl_DX_AX(void)
602 2c0262af bellard
{
603 2c0262af bellard
    EDX = (EDX & 0xffff0000) | (((int16_t)EAX >> 15) & 0xffff);
604 2c0262af bellard
}
605 2c0262af bellard
606 2c0262af bellard
/* string ops helpers */
607 2c0262af bellard
608 2c0262af bellard
void OPPROTO op_addl_ESI_T0(void)
609 2c0262af bellard
{
610 2c0262af bellard
    ESI += T0;
611 2c0262af bellard
}
612 2c0262af bellard
613 2c0262af bellard
void OPPROTO op_addw_ESI_T0(void)
614 2c0262af bellard
{
615 2c0262af bellard
    ESI = (ESI & ~0xffff) | ((ESI + T0) & 0xffff);
616 2c0262af bellard
}
617 2c0262af bellard
618 2c0262af bellard
void OPPROTO op_addl_EDI_T0(void)
619 2c0262af bellard
{
620 2c0262af bellard
    EDI += T0;
621 2c0262af bellard
}
622 2c0262af bellard
623 2c0262af bellard
void OPPROTO op_addw_EDI_T0(void)
624 2c0262af bellard
{
625 2c0262af bellard
    EDI = (EDI & ~0xffff) | ((EDI + T0) & 0xffff);
626 2c0262af bellard
}
627 2c0262af bellard
628 2c0262af bellard
void OPPROTO op_decl_ECX(void)
629 2c0262af bellard
{
630 2c0262af bellard
    ECX--;
631 2c0262af bellard
}
632 2c0262af bellard
633 2c0262af bellard
void OPPROTO op_decw_ECX(void)
634 2c0262af bellard
{
635 2c0262af bellard
    ECX = (ECX & ~0xffff) | ((ECX - 1) & 0xffff);
636 2c0262af bellard
}
637 2c0262af bellard
638 2c0262af bellard
/* push/pop */
639 2c0262af bellard
640 2c0262af bellard
void op_pushl_T0(void)
641 2c0262af bellard
{
642 2c0262af bellard
    uint32_t offset;
643 2c0262af bellard
    offset = ESP - 4;
644 2c0262af bellard
    stl((void *)offset, T0);
645 2c0262af bellard
    /* modify ESP after to handle exceptions correctly */
646 2c0262af bellard
    ESP = offset;
647 2c0262af bellard
}
648 2c0262af bellard
649 2c0262af bellard
void op_pushw_T0(void)
650 2c0262af bellard
{
651 2c0262af bellard
    uint32_t offset;
652 2c0262af bellard
    offset = ESP - 2;
653 2c0262af bellard
    stw((void *)offset, T0);
654 2c0262af bellard
    /* modify ESP after to handle exceptions correctly */
655 2c0262af bellard
    ESP = offset;
656 2c0262af bellard
}
657 2c0262af bellard
658 2c0262af bellard
void op_pushl_ss32_T0(void)
659 2c0262af bellard
{
660 2c0262af bellard
    uint32_t offset;
661 2c0262af bellard
    offset = ESP - 4;
662 2c0262af bellard
    stl(env->segs[R_SS].base + offset, T0);
663 2c0262af bellard
    /* modify ESP after to handle exceptions correctly */
664 2c0262af bellard
    ESP = offset;
665 2c0262af bellard
}
666 2c0262af bellard
667 2c0262af bellard
void op_pushw_ss32_T0(void)
668 2c0262af bellard
{
669 2c0262af bellard
    uint32_t offset;
670 2c0262af bellard
    offset = ESP - 2;
671 2c0262af bellard
    stw(env->segs[R_SS].base + offset, T0);
672 2c0262af bellard
    /* modify ESP after to handle exceptions correctly */
673 2c0262af bellard
    ESP = offset;
674 2c0262af bellard
}
675 2c0262af bellard
676 2c0262af bellard
void op_pushl_ss16_T0(void)
677 2c0262af bellard
{
678 2c0262af bellard
    uint32_t offset;
679 2c0262af bellard
    offset = (ESP - 4) & 0xffff;
680 2c0262af bellard
    stl(env->segs[R_SS].base + offset, T0);
681 2c0262af bellard
    /* modify ESP after to handle exceptions correctly */
682 2c0262af bellard
    ESP = (ESP & ~0xffff) | offset;
683 2c0262af bellard
}
684 2c0262af bellard
685 2c0262af bellard
void op_pushw_ss16_T0(void)
686 2c0262af bellard
{
687 2c0262af bellard
    uint32_t offset;
688 2c0262af bellard
    offset = (ESP - 2) & 0xffff;
689 2c0262af bellard
    stw(env->segs[R_SS].base + offset, T0);
690 2c0262af bellard
    /* modify ESP after to handle exceptions correctly */
691 2c0262af bellard
    ESP = (ESP & ~0xffff) | offset;
692 2c0262af bellard
}
693 2c0262af bellard
694 2c0262af bellard
/* NOTE: ESP update is done after */
695 2c0262af bellard
void op_popl_T0(void)
696 2c0262af bellard
{
697 2c0262af bellard
    T0 = ldl((void *)ESP);
698 2c0262af bellard
}
699 2c0262af bellard
700 2c0262af bellard
void op_popw_T0(void)
701 2c0262af bellard
{
702 2c0262af bellard
    T0 = lduw((void *)ESP);
703 2c0262af bellard
}
704 2c0262af bellard
705 2c0262af bellard
void op_popl_ss32_T0(void)
706 2c0262af bellard
{
707 2c0262af bellard
    T0 = ldl(env->segs[R_SS].base + ESP);
708 2c0262af bellard
}
709 2c0262af bellard
710 2c0262af bellard
void op_popw_ss32_T0(void)
711 2c0262af bellard
{
712 2c0262af bellard
    T0 = lduw(env->segs[R_SS].base + ESP);
713 2c0262af bellard
}
714 2c0262af bellard
715 2c0262af bellard
void op_popl_ss16_T0(void)
716 2c0262af bellard
{
717 2c0262af bellard
    T0 = ldl(env->segs[R_SS].base + (ESP & 0xffff));
718 2c0262af bellard
}
719 2c0262af bellard
720 2c0262af bellard
void op_popw_ss16_T0(void)
721 2c0262af bellard
{
722 2c0262af bellard
    T0 = lduw(env->segs[R_SS].base + (ESP & 0xffff));
723 2c0262af bellard
}
724 2c0262af bellard
725 2c0262af bellard
void op_addl_ESP_4(void)
726 2c0262af bellard
{
727 2c0262af bellard
    ESP += 4;
728 2c0262af bellard
}
729 2c0262af bellard
730 2c0262af bellard
void op_addl_ESP_2(void)
731 2c0262af bellard
{
732 2c0262af bellard
    ESP += 2;
733 2c0262af bellard
}
734 2c0262af bellard
735 2c0262af bellard
void op_addw_ESP_4(void)
736 2c0262af bellard
{
737 2c0262af bellard
    ESP = (ESP & ~0xffff) | ((ESP + 4) & 0xffff);
738 2c0262af bellard
}
739 2c0262af bellard
740 2c0262af bellard
void op_addw_ESP_2(void)
741 2c0262af bellard
{
742 2c0262af bellard
    ESP = (ESP & ~0xffff) | ((ESP + 2) & 0xffff);
743 2c0262af bellard
}
744 2c0262af bellard
745 2c0262af bellard
void op_addl_ESP_im(void)
746 2c0262af bellard
{
747 2c0262af bellard
    ESP += PARAM1;
748 2c0262af bellard
}
749 2c0262af bellard
750 2c0262af bellard
void op_addw_ESP_im(void)
751 2c0262af bellard
{
752 2c0262af bellard
    ESP = (ESP & ~0xffff) | ((ESP + PARAM1) & 0xffff);
753 2c0262af bellard
}
754 2c0262af bellard
755 2c0262af bellard
void OPPROTO op_rdtsc(void)
756 2c0262af bellard
{
757 2c0262af bellard
    helper_rdtsc();
758 2c0262af bellard
}
759 2c0262af bellard
760 2c0262af bellard
void OPPROTO op_cpuid(void)
761 2c0262af bellard
{
762 2c0262af bellard
    helper_cpuid();
763 2c0262af bellard
}
764 2c0262af bellard
765 2c0262af bellard
void OPPROTO op_rdmsr(void)
766 2c0262af bellard
{
767 2c0262af bellard
    helper_rdmsr();
768 2c0262af bellard
}
769 2c0262af bellard
770 2c0262af bellard
void OPPROTO op_wrmsr(void)
771 2c0262af bellard
{
772 2c0262af bellard
    helper_wrmsr();
773 2c0262af bellard
}
774 2c0262af bellard
775 2c0262af bellard
/* bcd */
776 2c0262af bellard
777 2c0262af bellard
/* XXX: exception */
778 2c0262af bellard
void OPPROTO op_aam(void)
779 2c0262af bellard
{
780 2c0262af bellard
    int base = PARAM1;
781 2c0262af bellard
    int al, ah;
782 2c0262af bellard
    al = EAX & 0xff;
783 2c0262af bellard
    ah = al / base;
784 2c0262af bellard
    al = al % base;
785 2c0262af bellard
    EAX = (EAX & ~0xffff) | al | (ah << 8);
786 2c0262af bellard
    CC_DST = al;
787 2c0262af bellard
}
788 2c0262af bellard
789 2c0262af bellard
void OPPROTO op_aad(void)
790 2c0262af bellard
{
791 2c0262af bellard
    int base = PARAM1;
792 2c0262af bellard
    int al, ah;
793 2c0262af bellard
    al = EAX & 0xff;
794 2c0262af bellard
    ah = (EAX >> 8) & 0xff;
795 2c0262af bellard
    al = ((ah * base) + al) & 0xff;
796 2c0262af bellard
    EAX = (EAX & ~0xffff) | al;
797 2c0262af bellard
    CC_DST = al;
798 2c0262af bellard
}
799 2c0262af bellard
800 2c0262af bellard
void OPPROTO op_aaa(void)
801 2c0262af bellard
{
802 2c0262af bellard
    int icarry;
803 2c0262af bellard
    int al, ah, af;
804 2c0262af bellard
    int eflags;
805 2c0262af bellard
806 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
807 2c0262af bellard
    af = eflags & CC_A;
808 2c0262af bellard
    al = EAX & 0xff;
809 2c0262af bellard
    ah = (EAX >> 8) & 0xff;
810 2c0262af bellard
811 2c0262af bellard
    icarry = (al > 0xf9);
812 2c0262af bellard
    if (((al & 0x0f) > 9 ) || af) {
813 2c0262af bellard
        al = (al + 6) & 0x0f;
814 2c0262af bellard
        ah = (ah + 1 + icarry) & 0xff;
815 2c0262af bellard
        eflags |= CC_C | CC_A;
816 2c0262af bellard
    } else {
817 2c0262af bellard
        eflags &= ~(CC_C | CC_A);
818 2c0262af bellard
        al &= 0x0f;
819 2c0262af bellard
    }
820 2c0262af bellard
    EAX = (EAX & ~0xffff) | al | (ah << 8);
821 2c0262af bellard
    CC_SRC = eflags;
822 2c0262af bellard
}
823 2c0262af bellard
824 2c0262af bellard
void OPPROTO op_aas(void)
825 2c0262af bellard
{
826 2c0262af bellard
    int icarry;
827 2c0262af bellard
    int al, ah, af;
828 2c0262af bellard
    int eflags;
829 2c0262af bellard
830 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
831 2c0262af bellard
    af = eflags & CC_A;
832 2c0262af bellard
    al = EAX & 0xff;
833 2c0262af bellard
    ah = (EAX >> 8) & 0xff;
834 2c0262af bellard
835 2c0262af bellard
    icarry = (al < 6);
836 2c0262af bellard
    if (((al & 0x0f) > 9 ) || af) {
837 2c0262af bellard
        al = (al - 6) & 0x0f;
838 2c0262af bellard
        ah = (ah - 1 - icarry) & 0xff;
839 2c0262af bellard
        eflags |= CC_C | CC_A;
840 2c0262af bellard
    } else {
841 2c0262af bellard
        eflags &= ~(CC_C | CC_A);
842 2c0262af bellard
        al &= 0x0f;
843 2c0262af bellard
    }
844 2c0262af bellard
    EAX = (EAX & ~0xffff) | al | (ah << 8);
845 2c0262af bellard
    CC_SRC = eflags;
846 2c0262af bellard
}
847 2c0262af bellard
848 2c0262af bellard
void OPPROTO op_daa(void)
849 2c0262af bellard
{
850 2c0262af bellard
    int al, af, cf;
851 2c0262af bellard
    int eflags;
852 2c0262af bellard
853 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
854 2c0262af bellard
    cf = eflags & CC_C;
855 2c0262af bellard
    af = eflags & CC_A;
856 2c0262af bellard
    al = EAX & 0xff;
857 2c0262af bellard
858 2c0262af bellard
    eflags = 0;
859 2c0262af bellard
    if (((al & 0x0f) > 9 ) || af) {
860 2c0262af bellard
        al = (al + 6) & 0xff;
861 2c0262af bellard
        eflags |= CC_A;
862 2c0262af bellard
    }
863 2c0262af bellard
    if ((al > 0x9f) || cf) {
864 2c0262af bellard
        al = (al + 0x60) & 0xff;
865 2c0262af bellard
        eflags |= CC_C;
866 2c0262af bellard
    }
867 2c0262af bellard
    EAX = (EAX & ~0xff) | al;
868 2c0262af bellard
    /* well, speed is not an issue here, so we compute the flags by hand */
869 2c0262af bellard
    eflags |= (al == 0) << 6; /* zf */
870 2c0262af bellard
    eflags |= parity_table[al]; /* pf */
871 2c0262af bellard
    eflags |= (al & 0x80); /* sf */
872 2c0262af bellard
    CC_SRC = eflags;
873 2c0262af bellard
}
874 2c0262af bellard
875 2c0262af bellard
void OPPROTO op_das(void)
876 2c0262af bellard
{
877 2c0262af bellard
    int al, al1, af, cf;
878 2c0262af bellard
    int eflags;
879 2c0262af bellard
880 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
881 2c0262af bellard
    cf = eflags & CC_C;
882 2c0262af bellard
    af = eflags & CC_A;
883 2c0262af bellard
    al = EAX & 0xff;
884 2c0262af bellard
885 2c0262af bellard
    eflags = 0;
886 2c0262af bellard
    al1 = al;
887 2c0262af bellard
    if (((al & 0x0f) > 9 ) || af) {
888 2c0262af bellard
        eflags |= CC_A;
889 2c0262af bellard
        if (al < 6 || cf)
890 2c0262af bellard
            eflags |= CC_C;
891 2c0262af bellard
        al = (al - 6) & 0xff;
892 2c0262af bellard
    }
893 2c0262af bellard
    if ((al1 > 0x99) || cf) {
894 2c0262af bellard
        al = (al - 0x60) & 0xff;
895 2c0262af bellard
        eflags |= CC_C;
896 2c0262af bellard
    }
897 2c0262af bellard
    EAX = (EAX & ~0xff) | al;
898 2c0262af bellard
    /* well, speed is not an issue here, so we compute the flags by hand */
899 2c0262af bellard
    eflags |= (al == 0) << 6; /* zf */
900 2c0262af bellard
    eflags |= parity_table[al]; /* pf */
901 2c0262af bellard
    eflags |= (al & 0x80); /* sf */
902 2c0262af bellard
    CC_SRC = eflags;
903 2c0262af bellard
}
904 2c0262af bellard
905 2c0262af bellard
/* segment handling */
906 2c0262af bellard
907 2c0262af bellard
/* never use it with R_CS */
908 2c0262af bellard
void OPPROTO op_movl_seg_T0(void)
909 2c0262af bellard
{
910 2c0262af bellard
    load_seg(PARAM1, T0 & 0xffff, PARAM2);
911 2c0262af bellard
}
912 2c0262af bellard
913 2c0262af bellard
/* faster VM86 version */
914 2c0262af bellard
void OPPROTO op_movl_seg_T0_vm(void)
915 2c0262af bellard
{
916 2c0262af bellard
    int selector;
917 2c0262af bellard
    SegmentCache *sc;
918 2c0262af bellard
    
919 2c0262af bellard
    selector = T0 & 0xffff;
920 2c0262af bellard
    /* env->segs[] access */
921 2c0262af bellard
    sc = (SegmentCache *)((char *)env + PARAM1);
922 2c0262af bellard
    sc->selector = selector;
923 2c0262af bellard
    sc->base = (void *)(selector << 4);
924 2c0262af bellard
}
925 2c0262af bellard
926 2c0262af bellard
void OPPROTO op_movl_T0_seg(void)
927 2c0262af bellard
{
928 2c0262af bellard
    T0 = env->segs[PARAM1].selector;
929 2c0262af bellard
}
930 2c0262af bellard
931 2c0262af bellard
void OPPROTO op_movl_A0_seg(void)
932 2c0262af bellard
{
933 2c0262af bellard
    A0 = *(unsigned long *)((char *)env + PARAM1);
934 2c0262af bellard
}
935 2c0262af bellard
936 2c0262af bellard
void OPPROTO op_addl_A0_seg(void)
937 2c0262af bellard
{
938 2c0262af bellard
    A0 += *(unsigned long *)((char *)env + PARAM1);
939 2c0262af bellard
}
940 2c0262af bellard
941 2c0262af bellard
void OPPROTO op_lsl(void)
942 2c0262af bellard
{
943 2c0262af bellard
    helper_lsl();
944 2c0262af bellard
}
945 2c0262af bellard
946 2c0262af bellard
void OPPROTO op_lar(void)
947 2c0262af bellard
{
948 2c0262af bellard
    helper_lar();
949 2c0262af bellard
}
950 2c0262af bellard
951 3ab493de bellard
void OPPROTO op_verr(void)
952 3ab493de bellard
{
953 3ab493de bellard
    helper_verr();
954 3ab493de bellard
}
955 3ab493de bellard
956 3ab493de bellard
void OPPROTO op_verw(void)
957 3ab493de bellard
{
958 3ab493de bellard
    helper_verw();
959 3ab493de bellard
}
960 3ab493de bellard
961 3ab493de bellard
void OPPROTO op_arpl(void)
962 3ab493de bellard
{
963 3ab493de bellard
    if ((T0 & 3) < (T1 & 3)) {
964 3ab493de bellard
        /* XXX: emulate bug or 0xff3f0000 oring as in bochs ? */
965 3ab493de bellard
        T0 = (T0 & ~3) | (T1 & 3);
966 3ab493de bellard
        T1 = CC_Z;
967 3ab493de bellard
   } else {
968 3ab493de bellard
        T1 = 0;
969 3ab493de bellard
    }
970 3ab493de bellard
    FORCE_RET();
971 3ab493de bellard
}
972 3ab493de bellard
            
973 3ab493de bellard
void OPPROTO op_arpl_update(void)
974 3ab493de bellard
{
975 3ab493de bellard
    int eflags;
976 3ab493de bellard
    eflags = cc_table[CC_OP].compute_all();
977 3ab493de bellard
    CC_SRC = (eflags & ~CC_Z) | T1;
978 3ab493de bellard
}
979 3ab493de bellard
    
980 2c0262af bellard
/* T0: segment, T1:eip */
981 2c0262af bellard
void OPPROTO op_ljmp_protected_T0_T1(void)
982 2c0262af bellard
{
983 2c0262af bellard
    helper_ljmp_protected_T0_T1();
984 2c0262af bellard
}
985 2c0262af bellard
986 2c0262af bellard
void OPPROTO op_lcall_real_T0_T1(void)
987 2c0262af bellard
{
988 2c0262af bellard
    helper_lcall_real_T0_T1(PARAM1, PARAM2);
989 2c0262af bellard
}
990 2c0262af bellard
991 2c0262af bellard
void OPPROTO op_lcall_protected_T0_T1(void)
992 2c0262af bellard
{
993 2c0262af bellard
    helper_lcall_protected_T0_T1(PARAM1, PARAM2);
994 2c0262af bellard
}
995 2c0262af bellard
996 2c0262af bellard
void OPPROTO op_iret_real(void)
997 2c0262af bellard
{
998 2c0262af bellard
    helper_iret_real(PARAM1);
999 2c0262af bellard
}
1000 2c0262af bellard
1001 2c0262af bellard
void OPPROTO op_iret_protected(void)
1002 2c0262af bellard
{
1003 2c0262af bellard
    helper_iret_protected(PARAM1);
1004 2c0262af bellard
}
1005 2c0262af bellard
1006 2c0262af bellard
void OPPROTO op_lret_protected(void)
1007 2c0262af bellard
{
1008 2c0262af bellard
    helper_lret_protected(PARAM1, PARAM2);
1009 2c0262af bellard
}
1010 2c0262af bellard
1011 2c0262af bellard
void OPPROTO op_lldt_T0(void)
1012 2c0262af bellard
{
1013 2c0262af bellard
    helper_lldt_T0();
1014 2c0262af bellard
}
1015 2c0262af bellard
1016 2c0262af bellard
void OPPROTO op_ltr_T0(void)
1017 2c0262af bellard
{
1018 2c0262af bellard
    helper_ltr_T0();
1019 2c0262af bellard
}
1020 2c0262af bellard
1021 2c0262af bellard
/* CR registers access */
1022 2c0262af bellard
void OPPROTO op_movl_crN_T0(void)
1023 2c0262af bellard
{
1024 2c0262af bellard
    helper_movl_crN_T0(PARAM1);
1025 2c0262af bellard
}
1026 2c0262af bellard
1027 2c0262af bellard
/* DR registers access */
1028 2c0262af bellard
void OPPROTO op_movl_drN_T0(void)
1029 2c0262af bellard
{
1030 2c0262af bellard
    helper_movl_drN_T0(PARAM1);
1031 2c0262af bellard
}
1032 2c0262af bellard
1033 2c0262af bellard
void OPPROTO op_lmsw_T0(void)
1034 2c0262af bellard
{
1035 2c0262af bellard
    /* only 4 lower bits of CR0 are modified */
1036 2c0262af bellard
    T0 = (env->cr[0] & ~0xf) | (T0 & 0xf);
1037 2c0262af bellard
    helper_movl_crN_T0(0);
1038 2c0262af bellard
}
1039 2c0262af bellard
1040 2c0262af bellard
void OPPROTO op_invlpg_A0(void)
1041 2c0262af bellard
{
1042 2c0262af bellard
    helper_invlpg(A0);
1043 2c0262af bellard
}
1044 2c0262af bellard
1045 2c0262af bellard
void OPPROTO op_movl_T0_env(void)
1046 2c0262af bellard
{
1047 2c0262af bellard
    T0 = *(uint32_t *)((char *)env + PARAM1);
1048 2c0262af bellard
}
1049 2c0262af bellard
1050 2c0262af bellard
void OPPROTO op_movl_env_T0(void)
1051 2c0262af bellard
{
1052 2c0262af bellard
    *(uint32_t *)((char *)env + PARAM1) = T0;
1053 2c0262af bellard
}
1054 2c0262af bellard
1055 2c0262af bellard
void OPPROTO op_movl_env_T1(void)
1056 2c0262af bellard
{
1057 2c0262af bellard
    *(uint32_t *)((char *)env + PARAM1) = T1;
1058 2c0262af bellard
}
1059 2c0262af bellard
1060 2c0262af bellard
void OPPROTO op_clts(void)
1061 2c0262af bellard
{
1062 2c0262af bellard
    env->cr[0] &= ~CR0_TS_MASK;
1063 2c0262af bellard
}
1064 2c0262af bellard
1065 2c0262af bellard
/* flags handling */
1066 2c0262af bellard
1067 2c0262af bellard
/* slow jumps cases : in order to avoid calling a function with a
1068 2c0262af bellard
   pointer (which can generate a stack frame on PowerPC), we use
1069 2c0262af bellard
   op_setcc to set T0 and then call op_jcc. */
1070 2c0262af bellard
void OPPROTO op_jcc(void)
1071 2c0262af bellard
{
1072 2c0262af bellard
    if (T0)
1073 2c0262af bellard
        JUMP_TB(op_jcc, PARAM1, 0, PARAM2);
1074 2c0262af bellard
    else
1075 2c0262af bellard
        JUMP_TB(op_jcc, PARAM1, 1, PARAM3);
1076 2c0262af bellard
    FORCE_RET();
1077 2c0262af bellard
}
1078 2c0262af bellard
1079 2c0262af bellard
void OPPROTO op_jcc_im(void)
1080 2c0262af bellard
{
1081 2c0262af bellard
    if (T0)
1082 2c0262af bellard
        EIP = PARAM1;
1083 2c0262af bellard
    else
1084 2c0262af bellard
        EIP = PARAM2;
1085 2c0262af bellard
    FORCE_RET();
1086 2c0262af bellard
}
1087 2c0262af bellard
1088 2c0262af bellard
/* slow set cases (compute x86 flags) */
1089 2c0262af bellard
void OPPROTO op_seto_T0_cc(void)
1090 2c0262af bellard
{
1091 2c0262af bellard
    int eflags;
1092 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1093 2c0262af bellard
    T0 = (eflags >> 11) & 1;
1094 2c0262af bellard
}
1095 2c0262af bellard
1096 2c0262af bellard
void OPPROTO op_setb_T0_cc(void)
1097 2c0262af bellard
{
1098 2c0262af bellard
    T0 = cc_table[CC_OP].compute_c();
1099 2c0262af bellard
}
1100 2c0262af bellard
1101 2c0262af bellard
void OPPROTO op_setz_T0_cc(void)
1102 2c0262af bellard
{
1103 2c0262af bellard
    int eflags;
1104 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1105 2c0262af bellard
    T0 = (eflags >> 6) & 1;
1106 2c0262af bellard
}
1107 2c0262af bellard
1108 2c0262af bellard
void OPPROTO op_setbe_T0_cc(void)
1109 2c0262af bellard
{
1110 2c0262af bellard
    int eflags;
1111 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1112 2c0262af bellard
    T0 = (eflags & (CC_Z | CC_C)) != 0;
1113 2c0262af bellard
}
1114 2c0262af bellard
1115 2c0262af bellard
void OPPROTO op_sets_T0_cc(void)
1116 2c0262af bellard
{
1117 2c0262af bellard
    int eflags;
1118 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1119 2c0262af bellard
    T0 = (eflags >> 7) & 1;
1120 2c0262af bellard
}
1121 2c0262af bellard
1122 2c0262af bellard
void OPPROTO op_setp_T0_cc(void)
1123 2c0262af bellard
{
1124 2c0262af bellard
    int eflags;
1125 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1126 2c0262af bellard
    T0 = (eflags >> 2) & 1;
1127 2c0262af bellard
}
1128 2c0262af bellard
1129 2c0262af bellard
void OPPROTO op_setl_T0_cc(void)
1130 2c0262af bellard
{
1131 2c0262af bellard
    int eflags;
1132 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1133 2c0262af bellard
    T0 = ((eflags ^ (eflags >> 4)) >> 7) & 1;
1134 2c0262af bellard
}
1135 2c0262af bellard
1136 2c0262af bellard
void OPPROTO op_setle_T0_cc(void)
1137 2c0262af bellard
{
1138 2c0262af bellard
    int eflags;
1139 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1140 2c0262af bellard
    T0 = (((eflags ^ (eflags >> 4)) & 0x80) || (eflags & CC_Z)) != 0;
1141 2c0262af bellard
}
1142 2c0262af bellard
1143 2c0262af bellard
void OPPROTO op_xor_T0_1(void)
1144 2c0262af bellard
{
1145 2c0262af bellard
    T0 ^= 1;
1146 2c0262af bellard
}
1147 2c0262af bellard
1148 2c0262af bellard
void OPPROTO op_set_cc_op(void)
1149 2c0262af bellard
{
1150 2c0262af bellard
    CC_OP = PARAM1;
1151 2c0262af bellard
}
1152 2c0262af bellard
1153 4136f33c bellard
/* XXX: clear VIF/VIP in all ops ? */
1154 2c0262af bellard
1155 2c0262af bellard
void OPPROTO op_movl_eflags_T0(void)
1156 2c0262af bellard
{
1157 4136f33c bellard
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK));
1158 2c0262af bellard
}
1159 2c0262af bellard
1160 2c0262af bellard
void OPPROTO op_movw_eflags_T0(void)
1161 2c0262af bellard
{
1162 4136f33c bellard
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK) & 0xffff);
1163 4136f33c bellard
}
1164 4136f33c bellard
1165 4136f33c bellard
void OPPROTO op_movl_eflags_T0_io(void)
1166 4136f33c bellard
{
1167 4136f33c bellard
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | IF_MASK));
1168 4136f33c bellard
}
1169 4136f33c bellard
1170 4136f33c bellard
void OPPROTO op_movw_eflags_T0_io(void)
1171 4136f33c bellard
{
1172 4136f33c bellard
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | IF_MASK) & 0xffff);
1173 2c0262af bellard
}
1174 2c0262af bellard
1175 2c0262af bellard
void OPPROTO op_movl_eflags_T0_cpl0(void)
1176 2c0262af bellard
{
1177 4136f33c bellard
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | IF_MASK | IOPL_MASK));
1178 2c0262af bellard
}
1179 2c0262af bellard
1180 2c0262af bellard
void OPPROTO op_movw_eflags_T0_cpl0(void)
1181 2c0262af bellard
{
1182 4136f33c bellard
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | IF_MASK | IOPL_MASK) & 0xffff);
1183 2c0262af bellard
}
1184 2c0262af bellard
1185 2c0262af bellard
#if 0
1186 2c0262af bellard
/* vm86plus version */
1187 2c0262af bellard
void OPPROTO op_movw_eflags_T0_vm(void)
1188 2c0262af bellard
{
1189 2c0262af bellard
    int eflags;
1190 2c0262af bellard
    eflags = T0;
1191 2c0262af bellard
    CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1192 2c0262af bellard
    DF = 1 - (2 * ((eflags >> 10) & 1));
1193 2c0262af bellard
    /* we also update some system flags as in user mode */
1194 2c0262af bellard
    env->eflags = (env->eflags & ~(FL_UPDATE_MASK16 | VIF_MASK)) |
1195 2c0262af bellard
        (eflags & FL_UPDATE_MASK16);
1196 2c0262af bellard
    if (eflags & IF_MASK) {
1197 2c0262af bellard
        env->eflags |= VIF_MASK;
1198 2c0262af bellard
        if (env->eflags & VIP_MASK) {
1199 2c0262af bellard
            EIP = PARAM1;
1200 2c0262af bellard
            raise_exception(EXCP0D_GPF);
1201 2c0262af bellard
        }
1202 2c0262af bellard
    }
1203 2c0262af bellard
    FORCE_RET();
1204 2c0262af bellard
}
1205 2c0262af bellard

1206 2c0262af bellard
void OPPROTO op_movl_eflags_T0_vm(void)
1207 2c0262af bellard
{
1208 2c0262af bellard
    int eflags;
1209 2c0262af bellard
    eflags = T0;
1210 2c0262af bellard
    CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1211 2c0262af bellard
    DF = 1 - (2 * ((eflags >> 10) & 1));
1212 2c0262af bellard
    /* we also update some system flags as in user mode */
1213 2c0262af bellard
    env->eflags = (env->eflags & ~(FL_UPDATE_MASK32 | VIF_MASK)) |
1214 2c0262af bellard
        (eflags & FL_UPDATE_MASK32);
1215 2c0262af bellard
    if (eflags & IF_MASK) {
1216 2c0262af bellard
        env->eflags |= VIF_MASK;
1217 2c0262af bellard
        if (env->eflags & VIP_MASK) {
1218 2c0262af bellard
            EIP = PARAM1;
1219 2c0262af bellard
            raise_exception(EXCP0D_GPF);
1220 2c0262af bellard
        }
1221 2c0262af bellard
    }
1222 2c0262af bellard
    FORCE_RET();
1223 2c0262af bellard
}
1224 2c0262af bellard
#endif
1225 2c0262af bellard
1226 2c0262af bellard
/* XXX: compute only O flag */
1227 2c0262af bellard
void OPPROTO op_movb_eflags_T0(void)
1228 2c0262af bellard
{
1229 2c0262af bellard
    int of;
1230 2c0262af bellard
    of = cc_table[CC_OP].compute_all() & CC_O;
1231 2c0262af bellard
    CC_SRC = (T0 & (CC_S | CC_Z | CC_A | CC_P | CC_C)) | of;
1232 2c0262af bellard
}
1233 2c0262af bellard
1234 2c0262af bellard
void OPPROTO op_movl_T0_eflags(void)
1235 2c0262af bellard
{
1236 2c0262af bellard
    int eflags;
1237 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1238 2c0262af bellard
    eflags |= (DF & DF_MASK);
1239 2c0262af bellard
    eflags |= env->eflags & ~(VM_MASK | RF_MASK);
1240 2c0262af bellard
    T0 = eflags;
1241 2c0262af bellard
}
1242 2c0262af bellard
1243 2c0262af bellard
/* vm86plus version */
1244 2c0262af bellard
#if 0
1245 2c0262af bellard
void OPPROTO op_movl_T0_eflags_vm(void)
1246 2c0262af bellard
{
1247 2c0262af bellard
    int eflags;
1248 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1249 2c0262af bellard
    eflags |= (DF & DF_MASK);
1250 2c0262af bellard
    eflags |= env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
1251 2c0262af bellard
    if (env->eflags & VIF_MASK)
1252 2c0262af bellard
        eflags |= IF_MASK;
1253 2c0262af bellard
    T0 = eflags;
1254 2c0262af bellard
}
1255 2c0262af bellard
#endif
1256 2c0262af bellard
1257 2c0262af bellard
void OPPROTO op_cld(void)
1258 2c0262af bellard
{
1259 2c0262af bellard
    DF = 1;
1260 2c0262af bellard
}
1261 2c0262af bellard
1262 2c0262af bellard
void OPPROTO op_std(void)
1263 2c0262af bellard
{
1264 2c0262af bellard
    DF = -1;
1265 2c0262af bellard
}
1266 2c0262af bellard
1267 2c0262af bellard
void OPPROTO op_clc(void)
1268 2c0262af bellard
{
1269 2c0262af bellard
    int eflags;
1270 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1271 2c0262af bellard
    eflags &= ~CC_C;
1272 2c0262af bellard
    CC_SRC = eflags;
1273 2c0262af bellard
}
1274 2c0262af bellard
1275 2c0262af bellard
void OPPROTO op_stc(void)
1276 2c0262af bellard
{
1277 2c0262af bellard
    int eflags;
1278 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1279 2c0262af bellard
    eflags |= CC_C;
1280 2c0262af bellard
    CC_SRC = eflags;
1281 2c0262af bellard
}
1282 2c0262af bellard
1283 2c0262af bellard
void OPPROTO op_cmc(void)
1284 2c0262af bellard
{
1285 2c0262af bellard
    int eflags;
1286 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1287 2c0262af bellard
    eflags ^= CC_C;
1288 2c0262af bellard
    CC_SRC = eflags;
1289 2c0262af bellard
}
1290 2c0262af bellard
1291 2c0262af bellard
void OPPROTO op_salc(void)
1292 2c0262af bellard
{
1293 2c0262af bellard
    int cf;
1294 2c0262af bellard
    cf = cc_table[CC_OP].compute_c();
1295 2c0262af bellard
    EAX = (EAX & ~0xff) | ((-cf) & 0xff);
1296 2c0262af bellard
}
1297 2c0262af bellard
1298 2c0262af bellard
static int compute_all_eflags(void)
1299 2c0262af bellard
{
1300 2c0262af bellard
    return CC_SRC;
1301 2c0262af bellard
}
1302 2c0262af bellard
1303 2c0262af bellard
static int compute_c_eflags(void)
1304 2c0262af bellard
{
1305 2c0262af bellard
    return CC_SRC & CC_C;
1306 2c0262af bellard
}
1307 2c0262af bellard
1308 2c0262af bellard
CCTable cc_table[CC_OP_NB] = {
1309 2c0262af bellard
    [CC_OP_DYNAMIC] = { /* should never happen */ },
1310 2c0262af bellard
1311 2c0262af bellard
    [CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
1312 2c0262af bellard
1313 d36cd60e bellard
    [CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
1314 d36cd60e bellard
    [CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
1315 d36cd60e bellard
    [CC_OP_MULL] = { compute_all_mull, compute_c_mull },
1316 2c0262af bellard
1317 2c0262af bellard
    [CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
1318 2c0262af bellard
    [CC_OP_ADDW] = { compute_all_addw, compute_c_addw  },
1319 2c0262af bellard
    [CC_OP_ADDL] = { compute_all_addl, compute_c_addl  },
1320 2c0262af bellard
1321 2c0262af bellard
    [CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
1322 2c0262af bellard
    [CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw  },
1323 2c0262af bellard
    [CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl  },
1324 2c0262af bellard
1325 2c0262af bellard
    [CC_OP_SUBB] = { compute_all_subb, compute_c_subb  },
1326 2c0262af bellard
    [CC_OP_SUBW] = { compute_all_subw, compute_c_subw  },
1327 2c0262af bellard
    [CC_OP_SUBL] = { compute_all_subl, compute_c_subl  },
1328 2c0262af bellard
    
1329 2c0262af bellard
    [CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb  },
1330 2c0262af bellard
    [CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw  },
1331 2c0262af bellard
    [CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl  },
1332 2c0262af bellard
    
1333 2c0262af bellard
    [CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
1334 2c0262af bellard
    [CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
1335 2c0262af bellard
    [CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
1336 2c0262af bellard
    
1337 2c0262af bellard
    [CC_OP_INCB] = { compute_all_incb, compute_c_incl },
1338 2c0262af bellard
    [CC_OP_INCW] = { compute_all_incw, compute_c_incl },
1339 2c0262af bellard
    [CC_OP_INCL] = { compute_all_incl, compute_c_incl },
1340 2c0262af bellard
    
1341 2c0262af bellard
    [CC_OP_DECB] = { compute_all_decb, compute_c_incl },
1342 2c0262af bellard
    [CC_OP_DECW] = { compute_all_decw, compute_c_incl },
1343 2c0262af bellard
    [CC_OP_DECL] = { compute_all_decl, compute_c_incl },
1344 2c0262af bellard
    
1345 2c0262af bellard
    [CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
1346 2c0262af bellard
    [CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
1347 2c0262af bellard
    [CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
1348 2c0262af bellard
1349 2c0262af bellard
    [CC_OP_SARB] = { compute_all_sarb, compute_c_sarl },
1350 2c0262af bellard
    [CC_OP_SARW] = { compute_all_sarw, compute_c_sarl },
1351 2c0262af bellard
    [CC_OP_SARL] = { compute_all_sarl, compute_c_sarl },
1352 2c0262af bellard
};
1353 2c0262af bellard
1354 2c0262af bellard
/* floating point support. Some of the code for complicated x87
1355 2c0262af bellard
   functions comes from the LGPL'ed x86 emulator found in the Willows
1356 2c0262af bellard
   TWIN windows emulator. */
1357 2c0262af bellard
1358 2c0262af bellard
#if defined(__powerpc__)
1359 2c0262af bellard
extern CPU86_LDouble copysign(CPU86_LDouble, CPU86_LDouble);
1360 2c0262af bellard
1361 2c0262af bellard
/* correct (but slow) PowerPC rint() (glibc version is incorrect) */
1362 2c0262af bellard
double qemu_rint(double x)
1363 2c0262af bellard
{
1364 2c0262af bellard
    double y = 4503599627370496.0;
1365 2c0262af bellard
    if (fabs(x) >= y)
1366 2c0262af bellard
        return x;
1367 2c0262af bellard
    if (x < 0) 
1368 2c0262af bellard
        y = -y;
1369 2c0262af bellard
    y = (x + y) - y;
1370 2c0262af bellard
    if (y == 0.0)
1371 2c0262af bellard
        y = copysign(y, x);
1372 2c0262af bellard
    return y;
1373 2c0262af bellard
}
1374 2c0262af bellard
1375 2c0262af bellard
#define rint qemu_rint
1376 2c0262af bellard
#endif
1377 2c0262af bellard
1378 2c0262af bellard
/* fp load FT0 */
1379 2c0262af bellard
1380 2c0262af bellard
void OPPROTO op_flds_FT0_A0(void)
1381 2c0262af bellard
{
1382 2c0262af bellard
#ifdef USE_FP_CONVERT
1383 2c0262af bellard
    FP_CONVERT.i32 = ldl((void *)A0);
1384 2c0262af bellard
    FT0 = FP_CONVERT.f;
1385 2c0262af bellard
#else
1386 2c0262af bellard
    FT0 = ldfl((void *)A0);
1387 2c0262af bellard
#endif
1388 2c0262af bellard
}
1389 2c0262af bellard
1390 2c0262af bellard
void OPPROTO op_fldl_FT0_A0(void)
1391 2c0262af bellard
{
1392 2c0262af bellard
#ifdef USE_FP_CONVERT
1393 2c0262af bellard
    FP_CONVERT.i64 = ldq((void *)A0);
1394 2c0262af bellard
    FT0 = FP_CONVERT.d;
1395 2c0262af bellard
#else
1396 2c0262af bellard
    FT0 = ldfq((void *)A0);
1397 2c0262af bellard
#endif
1398 2c0262af bellard
}
1399 2c0262af bellard
1400 2c0262af bellard
/* helpers are needed to avoid static constant reference. XXX: find a better way */
1401 2c0262af bellard
#ifdef USE_INT_TO_FLOAT_HELPERS
1402 2c0262af bellard
1403 2c0262af bellard
void helper_fild_FT0_A0(void)
1404 2c0262af bellard
{
1405 2c0262af bellard
    FT0 = (CPU86_LDouble)ldsw((void *)A0);
1406 2c0262af bellard
}
1407 2c0262af bellard
1408 2c0262af bellard
void helper_fildl_FT0_A0(void)
1409 2c0262af bellard
{
1410 2c0262af bellard
    FT0 = (CPU86_LDouble)((int32_t)ldl((void *)A0));
1411 2c0262af bellard
}
1412 2c0262af bellard
1413 2c0262af bellard
void helper_fildll_FT0_A0(void)
1414 2c0262af bellard
{
1415 2c0262af bellard
    FT0 = (CPU86_LDouble)((int64_t)ldq((void *)A0));
1416 2c0262af bellard
}
1417 2c0262af bellard
1418 2c0262af bellard
void OPPROTO op_fild_FT0_A0(void)
1419 2c0262af bellard
{
1420 2c0262af bellard
    helper_fild_FT0_A0();
1421 2c0262af bellard
}
1422 2c0262af bellard
1423 2c0262af bellard
void OPPROTO op_fildl_FT0_A0(void)
1424 2c0262af bellard
{
1425 2c0262af bellard
    helper_fildl_FT0_A0();
1426 2c0262af bellard
}
1427 2c0262af bellard
1428 2c0262af bellard
void OPPROTO op_fildll_FT0_A0(void)
1429 2c0262af bellard
{
1430 2c0262af bellard
    helper_fildll_FT0_A0();
1431 2c0262af bellard
}
1432 2c0262af bellard
1433 2c0262af bellard
#else
1434 2c0262af bellard
1435 2c0262af bellard
void OPPROTO op_fild_FT0_A0(void)
1436 2c0262af bellard
{
1437 2c0262af bellard
#ifdef USE_FP_CONVERT
1438 2c0262af bellard
    FP_CONVERT.i32 = ldsw((void *)A0);
1439 2c0262af bellard
    FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1440 2c0262af bellard
#else
1441 2c0262af bellard
    FT0 = (CPU86_LDouble)ldsw((void *)A0);
1442 2c0262af bellard
#endif
1443 2c0262af bellard
}
1444 2c0262af bellard
1445 2c0262af bellard
void OPPROTO op_fildl_FT0_A0(void)
1446 2c0262af bellard
{
1447 2c0262af bellard
#ifdef USE_FP_CONVERT
1448 2c0262af bellard
    FP_CONVERT.i32 = (int32_t) ldl((void *)A0);
1449 2c0262af bellard
    FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1450 2c0262af bellard
#else
1451 2c0262af bellard
    FT0 = (CPU86_LDouble)((int32_t)ldl((void *)A0));
1452 2c0262af bellard
#endif
1453 2c0262af bellard
}
1454 2c0262af bellard
1455 2c0262af bellard
void OPPROTO op_fildll_FT0_A0(void)
1456 2c0262af bellard
{
1457 2c0262af bellard
#ifdef USE_FP_CONVERT
1458 2c0262af bellard
    FP_CONVERT.i64 = (int64_t) ldq((void *)A0);
1459 2c0262af bellard
    FT0 = (CPU86_LDouble)FP_CONVERT.i64;
1460 2c0262af bellard
#else
1461 2c0262af bellard
    FT0 = (CPU86_LDouble)((int64_t)ldq((void *)A0));
1462 2c0262af bellard
#endif
1463 2c0262af bellard
}
1464 2c0262af bellard
#endif
1465 2c0262af bellard
1466 2c0262af bellard
/* fp load ST0 */
1467 2c0262af bellard
1468 2c0262af bellard
void OPPROTO op_flds_ST0_A0(void)
1469 2c0262af bellard
{
1470 2c0262af bellard
    int new_fpstt;
1471 2c0262af bellard
    new_fpstt = (env->fpstt - 1) & 7;
1472 2c0262af bellard
#ifdef USE_FP_CONVERT
1473 2c0262af bellard
    FP_CONVERT.i32 = ldl((void *)A0);
1474 2c0262af bellard
    env->fpregs[new_fpstt] = FP_CONVERT.f;
1475 2c0262af bellard
#else
1476 2c0262af bellard
    env->fpregs[new_fpstt] = ldfl((void *)A0);
1477 2c0262af bellard
#endif
1478 2c0262af bellard
    env->fpstt = new_fpstt;
1479 2c0262af bellard
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1480 2c0262af bellard
}
1481 2c0262af bellard
1482 2c0262af bellard
void OPPROTO op_fldl_ST0_A0(void)
1483 2c0262af bellard
{
1484 2c0262af bellard
    int new_fpstt;
1485 2c0262af bellard
    new_fpstt = (env->fpstt - 1) & 7;
1486 2c0262af bellard
#ifdef USE_FP_CONVERT
1487 2c0262af bellard
    FP_CONVERT.i64 = ldq((void *)A0);
1488 2c0262af bellard
    env->fpregs[new_fpstt] = FP_CONVERT.d;
1489 2c0262af bellard
#else
1490 2c0262af bellard
    env->fpregs[new_fpstt] = ldfq((void *)A0);
1491 2c0262af bellard
#endif
1492 2c0262af bellard
    env->fpstt = new_fpstt;
1493 2c0262af bellard
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1494 2c0262af bellard
}
1495 2c0262af bellard
1496 2c0262af bellard
void OPPROTO op_fldt_ST0_A0(void)
1497 2c0262af bellard
{
1498 2c0262af bellard
    helper_fldt_ST0_A0();
1499 2c0262af bellard
}
1500 2c0262af bellard
1501 2c0262af bellard
/* helpers are needed to avoid static constant reference. XXX: find a better way */
1502 2c0262af bellard
#ifdef USE_INT_TO_FLOAT_HELPERS
1503 2c0262af bellard
1504 2c0262af bellard
void helper_fild_ST0_A0(void)
1505 2c0262af bellard
{
1506 2c0262af bellard
    int new_fpstt;
1507 2c0262af bellard
    new_fpstt = (env->fpstt - 1) & 7;
1508 2c0262af bellard
    env->fpregs[new_fpstt] = (CPU86_LDouble)ldsw((void *)A0);
1509 2c0262af bellard
    env->fpstt = new_fpstt;
1510 2c0262af bellard
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1511 2c0262af bellard
}
1512 2c0262af bellard
1513 2c0262af bellard
void helper_fildl_ST0_A0(void)
1514 2c0262af bellard
{
1515 2c0262af bellard
    int new_fpstt;
1516 2c0262af bellard
    new_fpstt = (env->fpstt - 1) & 7;
1517 2c0262af bellard
    env->fpregs[new_fpstt] = (CPU86_LDouble)((int32_t)ldl((void *)A0));
1518 2c0262af bellard
    env->fpstt = new_fpstt;
1519 2c0262af bellard
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1520 2c0262af bellard
}
1521 2c0262af bellard
1522 2c0262af bellard
void helper_fildll_ST0_A0(void)
1523 2c0262af bellard
{
1524 2c0262af bellard
    int new_fpstt;
1525 2c0262af bellard
    new_fpstt = (env->fpstt - 1) & 7;
1526 2c0262af bellard
    env->fpregs[new_fpstt] = (CPU86_LDouble)((int64_t)ldq((void *)A0));
1527 2c0262af bellard
    env->fpstt = new_fpstt;
1528 2c0262af bellard
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1529 2c0262af bellard
}
1530 2c0262af bellard
1531 2c0262af bellard
void OPPROTO op_fild_ST0_A0(void)
1532 2c0262af bellard
{
1533 2c0262af bellard
    helper_fild_ST0_A0();
1534 2c0262af bellard
}
1535 2c0262af bellard
1536 2c0262af bellard
void OPPROTO op_fildl_ST0_A0(void)
1537 2c0262af bellard
{
1538 2c0262af bellard
    helper_fildl_ST0_A0();
1539 2c0262af bellard
}
1540 2c0262af bellard
1541 2c0262af bellard
void OPPROTO op_fildll_ST0_A0(void)
1542 2c0262af bellard
{
1543 2c0262af bellard
    helper_fildll_ST0_A0();
1544 2c0262af bellard
}
1545 2c0262af bellard
1546 2c0262af bellard
#else
1547 2c0262af bellard
1548 2c0262af bellard
void OPPROTO op_fild_ST0_A0(void)
1549 2c0262af bellard
{
1550 2c0262af bellard
    int new_fpstt;
1551 2c0262af bellard
    new_fpstt = (env->fpstt - 1) & 7;
1552 2c0262af bellard
#ifdef USE_FP_CONVERT
1553 2c0262af bellard
    FP_CONVERT.i32 = ldsw((void *)A0);
1554 2c0262af bellard
    env->fpregs[new_fpstt] = (CPU86_LDouble)FP_CONVERT.i32;
1555 2c0262af bellard
#else
1556 2c0262af bellard
    env->fpregs[new_fpstt] = (CPU86_LDouble)ldsw((void *)A0);
1557 2c0262af bellard
#endif
1558 2c0262af bellard
    env->fpstt = new_fpstt;
1559 2c0262af bellard
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1560 2c0262af bellard
}
1561 2c0262af bellard
1562 2c0262af bellard
void OPPROTO op_fildl_ST0_A0(void)
1563 2c0262af bellard
{
1564 2c0262af bellard
    int new_fpstt;
1565 2c0262af bellard
    new_fpstt = (env->fpstt - 1) & 7;
1566 2c0262af bellard
#ifdef USE_FP_CONVERT
1567 2c0262af bellard
    FP_CONVERT.i32 = (int32_t) ldl((void *)A0);
1568 2c0262af bellard
    env->fpregs[new_fpstt] = (CPU86_LDouble)FP_CONVERT.i32;
1569 2c0262af bellard
#else
1570 2c0262af bellard
    env->fpregs[new_fpstt] = (CPU86_LDouble)((int32_t)ldl((void *)A0));
1571 2c0262af bellard
#endif
1572 2c0262af bellard
    env->fpstt = new_fpstt;
1573 2c0262af bellard
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1574 2c0262af bellard
}
1575 2c0262af bellard
1576 2c0262af bellard
void OPPROTO op_fildll_ST0_A0(void)
1577 2c0262af bellard
{
1578 2c0262af bellard
    int new_fpstt;
1579 2c0262af bellard
    new_fpstt = (env->fpstt - 1) & 7;
1580 2c0262af bellard
#ifdef USE_FP_CONVERT
1581 2c0262af bellard
    FP_CONVERT.i64 = (int64_t) ldq((void *)A0);
1582 2c0262af bellard
    env->fpregs[new_fpstt] = (CPU86_LDouble)FP_CONVERT.i64;
1583 2c0262af bellard
#else
1584 2c0262af bellard
    env->fpregs[new_fpstt] = (CPU86_LDouble)((int64_t)ldq((void *)A0));
1585 2c0262af bellard
#endif
1586 2c0262af bellard
    env->fpstt = new_fpstt;
1587 2c0262af bellard
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1588 2c0262af bellard
}
1589 2c0262af bellard
1590 2c0262af bellard
#endif
1591 2c0262af bellard
1592 2c0262af bellard
/* fp store */
1593 2c0262af bellard
1594 2c0262af bellard
void OPPROTO op_fsts_ST0_A0(void)
1595 2c0262af bellard
{
1596 2c0262af bellard
#ifdef USE_FP_CONVERT
1597 2c0262af bellard
    FP_CONVERT.f = (float)ST0;
1598 2c0262af bellard
    stfl((void *)A0, FP_CONVERT.f);
1599 2c0262af bellard
#else
1600 2c0262af bellard
    stfl((void *)A0, (float)ST0);
1601 2c0262af bellard
#endif
1602 2c0262af bellard
}
1603 2c0262af bellard
1604 2c0262af bellard
void OPPROTO op_fstl_ST0_A0(void)
1605 2c0262af bellard
{
1606 2c0262af bellard
    stfq((void *)A0, (double)ST0);
1607 2c0262af bellard
}
1608 2c0262af bellard
1609 2c0262af bellard
void OPPROTO op_fstt_ST0_A0(void)
1610 2c0262af bellard
{
1611 2c0262af bellard
    helper_fstt_ST0_A0();
1612 2c0262af bellard
}
1613 2c0262af bellard
1614 2c0262af bellard
void OPPROTO op_fist_ST0_A0(void)
1615 2c0262af bellard
{
1616 2c0262af bellard
#if defined(__sparc__) && !defined(__sparc_v9__)
1617 2c0262af bellard
    register CPU86_LDouble d asm("o0");
1618 2c0262af bellard
#else
1619 2c0262af bellard
    CPU86_LDouble d;
1620 2c0262af bellard
#endif
1621 2c0262af bellard
    int val;
1622 2c0262af bellard
1623 2c0262af bellard
    d = ST0;
1624 2c0262af bellard
    val = lrint(d);
1625 2c0262af bellard
    if (val != (int16_t)val)
1626 2c0262af bellard
        val = -32768;
1627 2c0262af bellard
    stw((void *)A0, val);
1628 2c0262af bellard
}
1629 2c0262af bellard
1630 2c0262af bellard
void OPPROTO op_fistl_ST0_A0(void)
1631 2c0262af bellard
{
1632 2c0262af bellard
#if defined(__sparc__) && !defined(__sparc_v9__)
1633 2c0262af bellard
    register CPU86_LDouble d asm("o0");
1634 2c0262af bellard
#else
1635 2c0262af bellard
    CPU86_LDouble d;
1636 2c0262af bellard
#endif
1637 2c0262af bellard
    int val;
1638 2c0262af bellard
1639 2c0262af bellard
    d = ST0;
1640 2c0262af bellard
    val = lrint(d);
1641 2c0262af bellard
    stl((void *)A0, val);
1642 2c0262af bellard
}
1643 2c0262af bellard
1644 2c0262af bellard
void OPPROTO op_fistll_ST0_A0(void)
1645 2c0262af bellard
{
1646 2c0262af bellard
#if defined(__sparc__) && !defined(__sparc_v9__)
1647 2c0262af bellard
    register CPU86_LDouble d asm("o0");
1648 2c0262af bellard
#else
1649 2c0262af bellard
    CPU86_LDouble d;
1650 2c0262af bellard
#endif
1651 2c0262af bellard
    int64_t val;
1652 2c0262af bellard
1653 2c0262af bellard
    d = ST0;
1654 2c0262af bellard
    val = llrint(d);
1655 2c0262af bellard
    stq((void *)A0, val);
1656 2c0262af bellard
}
1657 2c0262af bellard
1658 2c0262af bellard
void OPPROTO op_fbld_ST0_A0(void)
1659 2c0262af bellard
{
1660 2c0262af bellard
    helper_fbld_ST0_A0();
1661 2c0262af bellard
}
1662 2c0262af bellard
1663 2c0262af bellard
void OPPROTO op_fbst_ST0_A0(void)
1664 2c0262af bellard
{
1665 2c0262af bellard
    helper_fbst_ST0_A0();
1666 2c0262af bellard
}
1667 2c0262af bellard
1668 2c0262af bellard
/* FPU move */
1669 2c0262af bellard
1670 2c0262af bellard
void OPPROTO op_fpush(void)
1671 2c0262af bellard
{
1672 2c0262af bellard
    fpush();
1673 2c0262af bellard
}
1674 2c0262af bellard
1675 2c0262af bellard
void OPPROTO op_fpop(void)
1676 2c0262af bellard
{
1677 2c0262af bellard
    fpop();
1678 2c0262af bellard
}
1679 2c0262af bellard
1680 2c0262af bellard
void OPPROTO op_fdecstp(void)
1681 2c0262af bellard
{
1682 2c0262af bellard
    env->fpstt = (env->fpstt - 1) & 7;
1683 2c0262af bellard
    env->fpus &= (~0x4700);
1684 2c0262af bellard
}
1685 2c0262af bellard
1686 2c0262af bellard
void OPPROTO op_fincstp(void)
1687 2c0262af bellard
{
1688 2c0262af bellard
    env->fpstt = (env->fpstt + 1) & 7;
1689 2c0262af bellard
    env->fpus &= (~0x4700);
1690 2c0262af bellard
}
1691 2c0262af bellard
1692 2c0262af bellard
void OPPROTO op_fmov_ST0_FT0(void)
1693 2c0262af bellard
{
1694 2c0262af bellard
    ST0 = FT0;
1695 2c0262af bellard
}
1696 2c0262af bellard
1697 2c0262af bellard
void OPPROTO op_fmov_FT0_STN(void)
1698 2c0262af bellard
{
1699 2c0262af bellard
    FT0 = ST(PARAM1);
1700 2c0262af bellard
}
1701 2c0262af bellard
1702 2c0262af bellard
void OPPROTO op_fmov_ST0_STN(void)
1703 2c0262af bellard
{
1704 2c0262af bellard
    ST0 = ST(PARAM1);
1705 2c0262af bellard
}
1706 2c0262af bellard
1707 2c0262af bellard
void OPPROTO op_fmov_STN_ST0(void)
1708 2c0262af bellard
{
1709 2c0262af bellard
    ST(PARAM1) = ST0;
1710 2c0262af bellard
}
1711 2c0262af bellard
1712 2c0262af bellard
void OPPROTO op_fxchg_ST0_STN(void)
1713 2c0262af bellard
{
1714 2c0262af bellard
    CPU86_LDouble tmp;
1715 2c0262af bellard
    tmp = ST(PARAM1);
1716 2c0262af bellard
    ST(PARAM1) = ST0;
1717 2c0262af bellard
    ST0 = tmp;
1718 2c0262af bellard
}
1719 2c0262af bellard
1720 2c0262af bellard
/* FPU operations */
1721 2c0262af bellard
1722 2c0262af bellard
/* XXX: handle nans */
1723 2c0262af bellard
void OPPROTO op_fcom_ST0_FT0(void)
1724 2c0262af bellard
{
1725 2c0262af bellard
    env->fpus &= (~0x4500);        /* (C3,C2,C0) <-- 000 */
1726 2c0262af bellard
    if (ST0 < FT0)
1727 2c0262af bellard
        env->fpus |= 0x100;        /* (C3,C2,C0) <-- 001 */
1728 2c0262af bellard
    else if (ST0 == FT0)
1729 2c0262af bellard
        env->fpus |= 0x4000; /* (C3,C2,C0) <-- 100 */
1730 2c0262af bellard
    FORCE_RET();
1731 2c0262af bellard
}
1732 2c0262af bellard
1733 2c0262af bellard
/* XXX: handle nans */
1734 2c0262af bellard
void OPPROTO op_fucom_ST0_FT0(void)
1735 2c0262af bellard
{
1736 2c0262af bellard
    env->fpus &= (~0x4500);        /* (C3,C2,C0) <-- 000 */
1737 2c0262af bellard
    if (ST0 < FT0)
1738 2c0262af bellard
        env->fpus |= 0x100;        /* (C3,C2,C0) <-- 001 */
1739 2c0262af bellard
    else if (ST0 == FT0)
1740 2c0262af bellard
        env->fpus |= 0x4000; /* (C3,C2,C0) <-- 100 */
1741 2c0262af bellard
    FORCE_RET();
1742 2c0262af bellard
}
1743 2c0262af bellard
1744 2c0262af bellard
/* XXX: handle nans */
1745 2c0262af bellard
void OPPROTO op_fcomi_ST0_FT0(void)
1746 2c0262af bellard
{
1747 2c0262af bellard
    int eflags;
1748 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1749 2c0262af bellard
    eflags &= ~(CC_Z | CC_P | CC_C);
1750 2c0262af bellard
    if (ST0 < FT0)
1751 2c0262af bellard
        eflags |= CC_C;
1752 2c0262af bellard
    else if (ST0 == FT0)
1753 2c0262af bellard
        eflags |= CC_Z;
1754 2c0262af bellard
    CC_SRC = eflags;
1755 2c0262af bellard
    FORCE_RET();
1756 2c0262af bellard
}
1757 2c0262af bellard
1758 2c0262af bellard
/* XXX: handle nans */
1759 2c0262af bellard
void OPPROTO op_fucomi_ST0_FT0(void)
1760 2c0262af bellard
{
1761 2c0262af bellard
    int eflags;
1762 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1763 2c0262af bellard
    eflags &= ~(CC_Z | CC_P | CC_C);
1764 2c0262af bellard
    if (ST0 < FT0)
1765 2c0262af bellard
        eflags |= CC_C;
1766 2c0262af bellard
    else if (ST0 == FT0)
1767 2c0262af bellard
        eflags |= CC_Z;
1768 2c0262af bellard
    CC_SRC = eflags;
1769 2c0262af bellard
    FORCE_RET();
1770 2c0262af bellard
}
1771 2c0262af bellard
1772 80043406 bellard
void OPPROTO op_fcmov_ST0_STN_T0(void)
1773 80043406 bellard
{
1774 80043406 bellard
    if (T0) {
1775 80043406 bellard
        ST0 = ST(PARAM1);
1776 80043406 bellard
    }
1777 80043406 bellard
    FORCE_RET();
1778 80043406 bellard
}
1779 80043406 bellard
1780 2c0262af bellard
void OPPROTO op_fadd_ST0_FT0(void)
1781 2c0262af bellard
{
1782 2c0262af bellard
    ST0 += FT0;
1783 2c0262af bellard
}
1784 2c0262af bellard
1785 2c0262af bellard
void OPPROTO op_fmul_ST0_FT0(void)
1786 2c0262af bellard
{
1787 2c0262af bellard
    ST0 *= FT0;
1788 2c0262af bellard
}
1789 2c0262af bellard
1790 2c0262af bellard
void OPPROTO op_fsub_ST0_FT0(void)
1791 2c0262af bellard
{
1792 2c0262af bellard
    ST0 -= FT0;
1793 2c0262af bellard
}
1794 2c0262af bellard
1795 2c0262af bellard
void OPPROTO op_fsubr_ST0_FT0(void)
1796 2c0262af bellard
{
1797 2c0262af bellard
    ST0 = FT0 - ST0;
1798 2c0262af bellard
}
1799 2c0262af bellard
1800 2c0262af bellard
void OPPROTO op_fdiv_ST0_FT0(void)
1801 2c0262af bellard
{
1802 2c0262af bellard
    ST0 /= FT0;
1803 2c0262af bellard
}
1804 2c0262af bellard
1805 2c0262af bellard
void OPPROTO op_fdivr_ST0_FT0(void)
1806 2c0262af bellard
{
1807 2c0262af bellard
    ST0 = FT0 / ST0;
1808 2c0262af bellard
}
1809 2c0262af bellard
1810 2c0262af bellard
/* fp operations between STN and ST0 */
1811 2c0262af bellard
1812 2c0262af bellard
void OPPROTO op_fadd_STN_ST0(void)
1813 2c0262af bellard
{
1814 2c0262af bellard
    ST(PARAM1) += ST0;
1815 2c0262af bellard
}
1816 2c0262af bellard
1817 2c0262af bellard
void OPPROTO op_fmul_STN_ST0(void)
1818 2c0262af bellard
{
1819 2c0262af bellard
    ST(PARAM1) *= ST0;
1820 2c0262af bellard
}
1821 2c0262af bellard
1822 2c0262af bellard
void OPPROTO op_fsub_STN_ST0(void)
1823 2c0262af bellard
{
1824 2c0262af bellard
    ST(PARAM1) -= ST0;
1825 2c0262af bellard
}
1826 2c0262af bellard
1827 2c0262af bellard
void OPPROTO op_fsubr_STN_ST0(void)
1828 2c0262af bellard
{
1829 2c0262af bellard
    CPU86_LDouble *p;
1830 2c0262af bellard
    p = &ST(PARAM1);
1831 2c0262af bellard
    *p = ST0 - *p;
1832 2c0262af bellard
}
1833 2c0262af bellard
1834 2c0262af bellard
void OPPROTO op_fdiv_STN_ST0(void)
1835 2c0262af bellard
{
1836 2c0262af bellard
    ST(PARAM1) /= ST0;
1837 2c0262af bellard
}
1838 2c0262af bellard
1839 2c0262af bellard
void OPPROTO op_fdivr_STN_ST0(void)
1840 2c0262af bellard
{
1841 2c0262af bellard
    CPU86_LDouble *p;
1842 2c0262af bellard
    p = &ST(PARAM1);
1843 2c0262af bellard
    *p = ST0 / *p;
1844 2c0262af bellard
}
1845 2c0262af bellard
1846 2c0262af bellard
/* misc FPU operations */
1847 2c0262af bellard
void OPPROTO op_fchs_ST0(void)
1848 2c0262af bellard
{
1849 2c0262af bellard
    ST0 = -ST0;
1850 2c0262af bellard
}
1851 2c0262af bellard
1852 2c0262af bellard
void OPPROTO op_fabs_ST0(void)
1853 2c0262af bellard
{
1854 2c0262af bellard
    ST0 = fabs(ST0);
1855 2c0262af bellard
}
1856 2c0262af bellard
1857 2c0262af bellard
void OPPROTO op_fxam_ST0(void)
1858 2c0262af bellard
{
1859 2c0262af bellard
    helper_fxam_ST0();
1860 2c0262af bellard
}
1861 2c0262af bellard
1862 2c0262af bellard
void OPPROTO op_fld1_ST0(void)
1863 2c0262af bellard
{
1864 2c0262af bellard
    ST0 = f15rk[1];
1865 2c0262af bellard
}
1866 2c0262af bellard
1867 2c0262af bellard
void OPPROTO op_fldl2t_ST0(void)
1868 2c0262af bellard
{
1869 2c0262af bellard
    ST0 = f15rk[6];
1870 2c0262af bellard
}
1871 2c0262af bellard
1872 2c0262af bellard
void OPPROTO op_fldl2e_ST0(void)
1873 2c0262af bellard
{
1874 2c0262af bellard
    ST0 = f15rk[5];
1875 2c0262af bellard
}
1876 2c0262af bellard
1877 2c0262af bellard
void OPPROTO op_fldpi_ST0(void)
1878 2c0262af bellard
{
1879 2c0262af bellard
    ST0 = f15rk[2];
1880 2c0262af bellard
}
1881 2c0262af bellard
1882 2c0262af bellard
void OPPROTO op_fldlg2_ST0(void)
1883 2c0262af bellard
{
1884 2c0262af bellard
    ST0 = f15rk[3];
1885 2c0262af bellard
}
1886 2c0262af bellard
1887 2c0262af bellard
void OPPROTO op_fldln2_ST0(void)
1888 2c0262af bellard
{
1889 2c0262af bellard
    ST0 = f15rk[4];
1890 2c0262af bellard
}
1891 2c0262af bellard
1892 2c0262af bellard
void OPPROTO op_fldz_ST0(void)
1893 2c0262af bellard
{
1894 2c0262af bellard
    ST0 = f15rk[0];
1895 2c0262af bellard
}
1896 2c0262af bellard
1897 2c0262af bellard
void OPPROTO op_fldz_FT0(void)
1898 2c0262af bellard
{
1899 6a8c397d bellard
    FT0 = f15rk[0];
1900 2c0262af bellard
}
1901 2c0262af bellard
1902 2c0262af bellard
/* associated heplers to reduce generated code length and to simplify
1903 2c0262af bellard
   relocation (FP constants are usually stored in .rodata section) */
1904 2c0262af bellard
1905 2c0262af bellard
void OPPROTO op_f2xm1(void)
1906 2c0262af bellard
{
1907 2c0262af bellard
    helper_f2xm1();
1908 2c0262af bellard
}
1909 2c0262af bellard
1910 2c0262af bellard
void OPPROTO op_fyl2x(void)
1911 2c0262af bellard
{
1912 2c0262af bellard
    helper_fyl2x();
1913 2c0262af bellard
}
1914 2c0262af bellard
1915 2c0262af bellard
void OPPROTO op_fptan(void)
1916 2c0262af bellard
{
1917 2c0262af bellard
    helper_fptan();
1918 2c0262af bellard
}
1919 2c0262af bellard
1920 2c0262af bellard
void OPPROTO op_fpatan(void)
1921 2c0262af bellard
{
1922 2c0262af bellard
    helper_fpatan();
1923 2c0262af bellard
}
1924 2c0262af bellard
1925 2c0262af bellard
void OPPROTO op_fxtract(void)
1926 2c0262af bellard
{
1927 2c0262af bellard
    helper_fxtract();
1928 2c0262af bellard
}
1929 2c0262af bellard
1930 2c0262af bellard
void OPPROTO op_fprem1(void)
1931 2c0262af bellard
{
1932 2c0262af bellard
    helper_fprem1();
1933 2c0262af bellard
}
1934 2c0262af bellard
1935 2c0262af bellard
1936 2c0262af bellard
void OPPROTO op_fprem(void)
1937 2c0262af bellard
{
1938 2c0262af bellard
    helper_fprem();
1939 2c0262af bellard
}
1940 2c0262af bellard
1941 2c0262af bellard
void OPPROTO op_fyl2xp1(void)
1942 2c0262af bellard
{
1943 2c0262af bellard
    helper_fyl2xp1();
1944 2c0262af bellard
}
1945 2c0262af bellard
1946 2c0262af bellard
void OPPROTO op_fsqrt(void)
1947 2c0262af bellard
{
1948 2c0262af bellard
    helper_fsqrt();
1949 2c0262af bellard
}
1950 2c0262af bellard
1951 2c0262af bellard
void OPPROTO op_fsincos(void)
1952 2c0262af bellard
{
1953 2c0262af bellard
    helper_fsincos();
1954 2c0262af bellard
}
1955 2c0262af bellard
1956 2c0262af bellard
void OPPROTO op_frndint(void)
1957 2c0262af bellard
{
1958 2c0262af bellard
    helper_frndint();
1959 2c0262af bellard
}
1960 2c0262af bellard
1961 2c0262af bellard
void OPPROTO op_fscale(void)
1962 2c0262af bellard
{
1963 2c0262af bellard
    helper_fscale();
1964 2c0262af bellard
}
1965 2c0262af bellard
1966 2c0262af bellard
void OPPROTO op_fsin(void)
1967 2c0262af bellard
{
1968 2c0262af bellard
    helper_fsin();
1969 2c0262af bellard
}
1970 2c0262af bellard
1971 2c0262af bellard
void OPPROTO op_fcos(void)
1972 2c0262af bellard
{
1973 2c0262af bellard
    helper_fcos();
1974 2c0262af bellard
}
1975 2c0262af bellard
1976 2c0262af bellard
void OPPROTO op_fnstsw_A0(void)
1977 2c0262af bellard
{
1978 2c0262af bellard
    int fpus;
1979 2c0262af bellard
    fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
1980 2c0262af bellard
    stw((void *)A0, fpus);
1981 2c0262af bellard
}
1982 2c0262af bellard
1983 2c0262af bellard
void OPPROTO op_fnstsw_EAX(void)
1984 2c0262af bellard
{
1985 2c0262af bellard
    int fpus;
1986 2c0262af bellard
    fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
1987 2c0262af bellard
    EAX = (EAX & 0xffff0000) | fpus;
1988 2c0262af bellard
}
1989 2c0262af bellard
1990 2c0262af bellard
void OPPROTO op_fnstcw_A0(void)
1991 2c0262af bellard
{
1992 2c0262af bellard
    stw((void *)A0, env->fpuc);
1993 2c0262af bellard
}
1994 2c0262af bellard
1995 2c0262af bellard
void OPPROTO op_fldcw_A0(void)
1996 2c0262af bellard
{
1997 2c0262af bellard
    int rnd_type;
1998 2c0262af bellard
    env->fpuc = lduw((void *)A0);
1999 2c0262af bellard
    /* set rounding mode */
2000 2c0262af bellard
    switch(env->fpuc & RC_MASK) {
2001 2c0262af bellard
    default:
2002 2c0262af bellard
    case RC_NEAR:
2003 2c0262af bellard
        rnd_type = FE_TONEAREST;
2004 2c0262af bellard
        break;
2005 2c0262af bellard
    case RC_DOWN:
2006 2c0262af bellard
        rnd_type = FE_DOWNWARD;
2007 2c0262af bellard
        break;
2008 2c0262af bellard
    case RC_UP:
2009 2c0262af bellard
        rnd_type = FE_UPWARD;
2010 2c0262af bellard
        break;
2011 2c0262af bellard
    case RC_CHOP:
2012 2c0262af bellard
        rnd_type = FE_TOWARDZERO;
2013 2c0262af bellard
        break;
2014 2c0262af bellard
    }
2015 2c0262af bellard
    fesetround(rnd_type);
2016 2c0262af bellard
}
2017 2c0262af bellard
2018 2c0262af bellard
void OPPROTO op_fclex(void)
2019 2c0262af bellard
{
2020 2c0262af bellard
    env->fpus &= 0x7f00;
2021 2c0262af bellard
}
2022 2c0262af bellard
2023 2c0262af bellard
void OPPROTO op_fninit(void)
2024 2c0262af bellard
{
2025 2c0262af bellard
    env->fpus = 0;
2026 2c0262af bellard
    env->fpstt = 0;
2027 2c0262af bellard
    env->fpuc = 0x37f;
2028 2c0262af bellard
    env->fptags[0] = 1;
2029 2c0262af bellard
    env->fptags[1] = 1;
2030 2c0262af bellard
    env->fptags[2] = 1;
2031 2c0262af bellard
    env->fptags[3] = 1;
2032 2c0262af bellard
    env->fptags[4] = 1;
2033 2c0262af bellard
    env->fptags[5] = 1;
2034 2c0262af bellard
    env->fptags[6] = 1;
2035 2c0262af bellard
    env->fptags[7] = 1;
2036 2c0262af bellard
}
2037 2c0262af bellard
2038 2c0262af bellard
void OPPROTO op_fnstenv_A0(void)
2039 2c0262af bellard
{
2040 2c0262af bellard
    helper_fstenv((uint8_t *)A0, PARAM1);
2041 2c0262af bellard
}
2042 2c0262af bellard
2043 2c0262af bellard
void OPPROTO op_fldenv_A0(void)
2044 2c0262af bellard
{
2045 2c0262af bellard
    helper_fldenv((uint8_t *)A0, PARAM1);
2046 2c0262af bellard
}
2047 2c0262af bellard
2048 2c0262af bellard
void OPPROTO op_fnsave_A0(void)
2049 2c0262af bellard
{
2050 2c0262af bellard
    helper_fsave((uint8_t *)A0, PARAM1);
2051 2c0262af bellard
}
2052 2c0262af bellard
2053 2c0262af bellard
void OPPROTO op_frstor_A0(void)
2054 2c0262af bellard
{
2055 2c0262af bellard
    helper_frstor((uint8_t *)A0, PARAM1);
2056 2c0262af bellard
}
2057 2c0262af bellard
2058 2c0262af bellard
/* threading support */
2059 2c0262af bellard
void OPPROTO op_lock(void)
2060 2c0262af bellard
{
2061 2c0262af bellard
    cpu_lock();
2062 2c0262af bellard
}
2063 2c0262af bellard
2064 2c0262af bellard
void OPPROTO op_unlock(void)
2065 2c0262af bellard
{
2066 2c0262af bellard
    cpu_unlock();
2067 2c0262af bellard
}