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/*
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 *  ARM micro operations
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 * 
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 *  Copyright (c) 2003 Fabrice Bellard
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#include "exec.h"
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#define REGNAME r0
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#define REG (env->regs[0])
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#include "op_template.h"
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#define REGNAME r1
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#define REG (env->regs[1])
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#include "op_template.h"
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#define REGNAME r2
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#define REG (env->regs[2])
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#include "op_template.h"
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#define REGNAME r3
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#define REG (env->regs[3])
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#include "op_template.h"
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#define REGNAME r4
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#define REG (env->regs[4])
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#include "op_template.h"
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#define REGNAME r5
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#define REG (env->regs[5])
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#include "op_template.h"
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#define REGNAME r6
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#define REG (env->regs[6])
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#include "op_template.h"
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#define REGNAME r7
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#define REG (env->regs[7])
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#include "op_template.h"
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#define REGNAME r8
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#define REG (env->regs[8])
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#include "op_template.h"
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#define REGNAME r9
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#define REG (env->regs[9])
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#include "op_template.h"
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#define REGNAME r10
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#define REG (env->regs[10])
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#include "op_template.h"
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#define REGNAME r11
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#define REG (env->regs[11])
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#include "op_template.h"
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#define REGNAME r12
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#define REG (env->regs[12])
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#include "op_template.h"
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#define REGNAME r13
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#define REG (env->regs[13])
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#include "op_template.h"
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#define REGNAME r14
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#define REG (env->regs[14])
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#include "op_template.h"
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#define REGNAME r15
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#define REG (env->regs[15])
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#include "op_template.h"
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void OPPROTO op_movl_T0_0(void)
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{
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    T0 = 0;
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}
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void OPPROTO op_movl_T0_im(void)
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{
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    T0 = PARAM1;
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}
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void OPPROTO op_movl_T1_im(void)
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{
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    T1 = PARAM1;
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}
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void OPPROTO op_movl_T2_im(void)
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{
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    T2 = PARAM1;
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}
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void OPPROTO op_addl_T1_im(void)
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{
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    T1 += PARAM1;
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}
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void OPPROTO op_addl_T1_T2(void)
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{
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    T1 += T2;
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}
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void OPPROTO op_subl_T1_T2(void)
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{
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    T1 -= T2;
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}
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void OPPROTO op_addl_T0_T1(void)
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{
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    T0 += T1;
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}
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void OPPROTO op_addl_T0_T1_cc(void)
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{
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    unsigned int src1;
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    src1 = T0;
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    T0 += T1;
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    env->NZF = T0;
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    env->CF = T0 < src1;
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    env->VF = (src1 ^ T1 ^ -1) & (src1 ^ T0);
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}
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void OPPROTO op_adcl_T0_T1(void)
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{
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    T0 += T1 + env->CF;
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}
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void OPPROTO op_adcl_T0_T1_cc(void)
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{
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    unsigned int src1;
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    src1 = T0;
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    if (!env->CF) {
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        T0 += T1;
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        env->CF = T0 < src1;
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    } else {
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        T0 += T1 + 1;
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        env->CF = T0 <= src1;
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    }
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    env->VF = (src1 ^ T1 ^ -1) & (src1 ^ T0);
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    env->NZF = T0;
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    FORCE_RET();
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}
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#define OPSUB(sub, sbc, res, T0, T1)            \
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                                                \
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void OPPROTO op_ ## sub ## l_T0_T1(void)        \
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{                                               \
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    res = T0 - T1;                              \
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}                                               \
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                                                \
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void OPPROTO op_ ## sub ## l_T0_T1_cc(void)     \
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{                                               \
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    unsigned int src1;                          \
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    src1 = T0;                                  \
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    T0 -= T1;                                   \
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    env->NZF = T0;                              \
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    env->CF = src1 >= T1;                       \
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    env->VF = (src1 ^ T1) & (src1 ^ T0);        \
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    res = T0;                                   \
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}                                               \
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                                                \
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void OPPROTO op_ ## sbc ## l_T0_T1(void)        \
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{                                               \
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    res = T0 - T1 + env->CF - 1;                \
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}                                               \
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                                                \
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void OPPROTO op_ ## sbc ## l_T0_T1_cc(void)     \
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{                                               \
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    unsigned int src1;                          \
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    src1 = T0;                                  \
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    if (!env->CF) {                             \
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        T0 = T0 - T1 - 1;                       \
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        env->CF = src1 >= T1;                   \
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    } else {                                    \
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        T0 = T0 - T1;                           \
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        env->CF = src1 > T1;                    \
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    }                                           \
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    env->VF = (src1 ^ T1) & (src1 ^ T0);        \
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    env->NZF = T0;                              \
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    res = T0;                                   \
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    FORCE_RET();                                \
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}
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OPSUB(sub, sbc, T0, T0, T1)
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OPSUB(rsb, rsc, T0, T1, T0)
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void OPPROTO op_andl_T0_T1(void)
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{
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    T0 &= T1;
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}
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void OPPROTO op_xorl_T0_T1(void)
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{
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    T0 ^= T1;
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}
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void OPPROTO op_orl_T0_T1(void)
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{
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    T0 |= T1;
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}
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void OPPROTO op_bicl_T0_T1(void)
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{
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    T0 &= ~T1;
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}
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void OPPROTO op_notl_T1(void)
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{
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    T1 = ~T1;
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}
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void OPPROTO op_logic_T0_cc(void)
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{
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    env->NZF = T0;
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}
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void OPPROTO op_logic_T1_cc(void)
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{
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    env->NZF = T1;
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}
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#define EIP (env->regs[15])
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void OPPROTO op_test_eq(void)
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{
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    if (env->NZF == 0)
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        JUMP_TB(op_test_eq, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_ne(void)
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{
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    if (env->NZF != 0)
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        JUMP_TB(op_test_ne, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_cs(void)
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{
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    if (env->CF != 0)
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        JUMP_TB(op_test_cs, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_cc(void)
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{
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    if (env->CF == 0)
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        JUMP_TB(op_test_cc, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_mi(void)
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{
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    if ((env->NZF & 0x80000000) != 0)
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        JUMP_TB(op_test_mi, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_pl(void)
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{
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    if ((env->NZF & 0x80000000) == 0)
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        JUMP_TB(op_test_pl, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_vs(void)
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{
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    if ((env->VF & 0x80000000) != 0)
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        JUMP_TB(op_test_vs, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_vc(void)
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{
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    if ((env->VF & 0x80000000) == 0)
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        JUMP_TB(op_test_vc, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_hi(void)
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{
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    if (env->CF != 0 && env->NZF != 0)
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        JUMP_TB(op_test_hi, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_ls(void)
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{
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    if (env->CF == 0 || env->NZF == 0)
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        JUMP_TB(op_test_ls, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_ge(void)
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{
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    if (((env->VF ^ env->NZF) & 0x80000000) == 0)
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        JUMP_TB(op_test_ge, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_lt(void)
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{
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    if (((env->VF ^ env->NZF) & 0x80000000) != 0)
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        JUMP_TB(op_test_lt, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_gt(void)
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{
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    if (env->NZF != 0 && ((env->VF ^ env->NZF) & 0x80000000) == 0)
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        JUMP_TB(op_test_gt, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_le(void)
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{
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    if (env->NZF == 0 || ((env->VF ^ env->NZF) & 0x80000000) != 0)
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        JUMP_TB(op_test_le, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_jmp(void)
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{
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    JUMP_TB(op_jmp, PARAM1, 1, PARAM2);
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}
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void OPPROTO op_exit_tb(void)
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{
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    EXIT_TB();
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}
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void OPPROTO op_movl_T0_psr(void)
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{
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    T0 = compute_cpsr();
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}
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/* NOTE: N = 1 and Z = 1 cannot be stored currently */
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void OPPROTO op_movl_psr_T0(void)
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{
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    unsigned int psr;
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    psr = T0;
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    env->CF = (psr >> 29) & 1;
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    env->NZF = (psr & 0xc0000000) ^ 0x40000000;
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    env->VF = (psr << 3) & 0x80000000;
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    /* for user mode we do not update other state info */
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}
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void OPPROTO op_mul_T0_T1(void)
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{
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    T0 = T0 * T1;
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}
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/* 64 bit unsigned mul */
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void OPPROTO op_mull_T0_T1(void)
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{
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    uint64_t res;
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    res = (uint64_t)T0 * (uint64_t)T1;
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    T1 = res >> 32;
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    T0 = res;
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}
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/* 64 bit signed mul */
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void OPPROTO op_imull_T0_T1(void)
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{
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    uint64_t res;
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    res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
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    T1 = res >> 32;
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    T0 = res;
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}
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void OPPROTO op_addq_T0_T1(void)
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{
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    uint64_t res;
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    res = ((uint64_t)T1 << 32) | T0;
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    res += ((uint64_t)(env->regs[PARAM2]) << 32) | (env->regs[PARAM1]);
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    T1 = res >> 32;
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    T0 = res;
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}
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void OPPROTO op_logicq_cc(void)
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{
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    env->NZF = (T1 & 0x80000000) | ((T0 | T1) != 0);
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}
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/* memory access */
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void OPPROTO op_ldub_T0_T1(void)
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{
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    T0 = ldub((void *)T1);
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}
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void OPPROTO op_ldsb_T0_T1(void)
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{
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    T0 = ldsb((void *)T1);
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}
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void OPPROTO op_lduw_T0_T1(void)
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{
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    T0 = lduw((void *)T1);
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}
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void OPPROTO op_ldsw_T0_T1(void)
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{
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    T0 = ldsw((void *)T1);
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}
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void OPPROTO op_ldl_T0_T1(void)
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{
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    T0 = ldl((void *)T1);
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}
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void OPPROTO op_stb_T0_T1(void)
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{
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    stb((void *)T1, T0);
429 2c0262af bellard
}
430 2c0262af bellard
431 2c0262af bellard
void OPPROTO op_stw_T0_T1(void)
432 2c0262af bellard
{
433 2c0262af bellard
    stw((void *)T1, T0);
434 2c0262af bellard
}
435 2c0262af bellard
436 2c0262af bellard
void OPPROTO op_stl_T0_T1(void)
437 2c0262af bellard
{
438 2c0262af bellard
    stl((void *)T1, T0);
439 2c0262af bellard
}
440 2c0262af bellard
441 2c0262af bellard
void OPPROTO op_swpb_T0_T1(void)
442 2c0262af bellard
{
443 2c0262af bellard
    int tmp;
444 2c0262af bellard
445 2c0262af bellard
    cpu_lock();
446 2c0262af bellard
    tmp = ldub((void *)T1);
447 2c0262af bellard
    stb((void *)T1, T0);
448 2c0262af bellard
    T0 = tmp;
449 2c0262af bellard
    cpu_unlock();
450 2c0262af bellard
}
451 2c0262af bellard
452 2c0262af bellard
void OPPROTO op_swpl_T0_T1(void)
453 2c0262af bellard
{
454 2c0262af bellard
    int tmp;
455 2c0262af bellard
456 2c0262af bellard
    cpu_lock();
457 2c0262af bellard
    tmp = ldl((void *)T1);
458 2c0262af bellard
    stl((void *)T1, T0);
459 2c0262af bellard
    T0 = tmp;
460 2c0262af bellard
    cpu_unlock();
461 2c0262af bellard
}
462 2c0262af bellard
463 2c0262af bellard
/* shifts */
464 2c0262af bellard
465 2c0262af bellard
/* T1 based */
466 1e8d4eec bellard
467 2c0262af bellard
void OPPROTO op_shll_T1_im(void)
468 2c0262af bellard
{
469 2c0262af bellard
    T1 = T1 << PARAM1;
470 2c0262af bellard
}
471 2c0262af bellard
472 2c0262af bellard
void OPPROTO op_shrl_T1_im(void)
473 2c0262af bellard
{
474 2c0262af bellard
    T1 = (uint32_t)T1 >> PARAM1;
475 2c0262af bellard
}
476 2c0262af bellard
477 1e8d4eec bellard
void OPPROTO op_shrl_T1_0(void)
478 1e8d4eec bellard
{
479 1e8d4eec bellard
    T1 = 0;
480 1e8d4eec bellard
}
481 1e8d4eec bellard
482 2c0262af bellard
void OPPROTO op_sarl_T1_im(void)
483 2c0262af bellard
{
484 2c0262af bellard
    T1 = (int32_t)T1 >> PARAM1;
485 2c0262af bellard
}
486 2c0262af bellard
487 1e8d4eec bellard
void OPPROTO op_sarl_T1_0(void)
488 1e8d4eec bellard
{
489 1e8d4eec bellard
    T1 = (int32_t)T1 >> 31;
490 1e8d4eec bellard
}
491 1e8d4eec bellard
492 2c0262af bellard
void OPPROTO op_rorl_T1_im(void)
493 2c0262af bellard
{
494 2c0262af bellard
    int shift;
495 2c0262af bellard
    shift = PARAM1;
496 2c0262af bellard
    T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
497 2c0262af bellard
}
498 2c0262af bellard
499 88920f34 bellard
void OPPROTO op_rrxl_T1(void)
500 88920f34 bellard
{
501 88920f34 bellard
    T1 = ((uint32_t)T1 >> 1) | ((uint32_t)env->CF << 31);
502 88920f34 bellard
}
503 88920f34 bellard
504 2c0262af bellard
/* T1 based, set C flag */
505 2c0262af bellard
void OPPROTO op_shll_T1_im_cc(void)
506 2c0262af bellard
{
507 2c0262af bellard
    env->CF = (T1 >> (32 - PARAM1)) & 1;
508 2c0262af bellard
    T1 = T1 << PARAM1;
509 2c0262af bellard
}
510 2c0262af bellard
511 2c0262af bellard
void OPPROTO op_shrl_T1_im_cc(void)
512 2c0262af bellard
{
513 2c0262af bellard
    env->CF = (T1 >> (PARAM1 - 1)) & 1;
514 2c0262af bellard
    T1 = (uint32_t)T1 >> PARAM1;
515 2c0262af bellard
}
516 2c0262af bellard
517 1e8d4eec bellard
void OPPROTO op_shrl_T1_0_cc(void)
518 1e8d4eec bellard
{
519 1e8d4eec bellard
    env->CF = (T1 >> 31) & 1;
520 1e8d4eec bellard
    T1 = 0;
521 1e8d4eec bellard
}
522 1e8d4eec bellard
523 2c0262af bellard
void OPPROTO op_sarl_T1_im_cc(void)
524 2c0262af bellard
{
525 2c0262af bellard
    env->CF = (T1 >> (PARAM1 - 1)) & 1;
526 2c0262af bellard
    T1 = (int32_t)T1 >> PARAM1;
527 2c0262af bellard
}
528 2c0262af bellard
529 1e8d4eec bellard
void OPPROTO op_sarl_T1_0_cc(void)
530 1e8d4eec bellard
{
531 1e8d4eec bellard
    env->CF = (T1 >> 31) & 1;
532 1e8d4eec bellard
    T1 = (int32_t)T1 >> 31;
533 1e8d4eec bellard
}
534 1e8d4eec bellard
535 2c0262af bellard
void OPPROTO op_rorl_T1_im_cc(void)
536 2c0262af bellard
{
537 2c0262af bellard
    int shift;
538 2c0262af bellard
    shift = PARAM1;
539 2c0262af bellard
    env->CF = (T1 >> (shift - 1)) & 1;
540 2c0262af bellard
    T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
541 2c0262af bellard
}
542 2c0262af bellard
543 88920f34 bellard
void OPPROTO op_rrxl_T1_cc(void)
544 88920f34 bellard
{
545 88920f34 bellard
    uint32_t c;
546 88920f34 bellard
    c = T1 & 1;
547 88920f34 bellard
    T1 = ((uint32_t)T1 >> 1) | ((uint32_t)env->CF << 31);
548 88920f34 bellard
    env->CF = c;
549 88920f34 bellard
}
550 88920f34 bellard
551 2c0262af bellard
/* T2 based */
552 2c0262af bellard
void OPPROTO op_shll_T2_im(void)
553 2c0262af bellard
{
554 2c0262af bellard
    T2 = T2 << PARAM1;
555 2c0262af bellard
}
556 2c0262af bellard
557 2c0262af bellard
void OPPROTO op_shrl_T2_im(void)
558 2c0262af bellard
{
559 2c0262af bellard
    T2 = (uint32_t)T2 >> PARAM1;
560 2c0262af bellard
}
561 2c0262af bellard
562 1e8d4eec bellard
void OPPROTO op_shrl_T2_0(void)
563 1e8d4eec bellard
{
564 1e8d4eec bellard
    T2 = 0;
565 1e8d4eec bellard
}
566 1e8d4eec bellard
567 2c0262af bellard
void OPPROTO op_sarl_T2_im(void)
568 2c0262af bellard
{
569 2c0262af bellard
    T2 = (int32_t)T2 >> PARAM1;
570 2c0262af bellard
}
571 2c0262af bellard
572 1e8d4eec bellard
void OPPROTO op_sarl_T2_0(void)
573 1e8d4eec bellard
{
574 1e8d4eec bellard
    T2 = (int32_t)T2 >> 31;
575 1e8d4eec bellard
}
576 1e8d4eec bellard
577 2c0262af bellard
void OPPROTO op_rorl_T2_im(void)
578 2c0262af bellard
{
579 2c0262af bellard
    int shift;
580 2c0262af bellard
    shift = PARAM1;
581 2c0262af bellard
    T2 = ((uint32_t)T2 >> shift) | (T2 << (32 - shift));
582 2c0262af bellard
}
583 2c0262af bellard
584 1e8d4eec bellard
void OPPROTO op_rrxl_T2(void)
585 1e8d4eec bellard
{
586 1e8d4eec bellard
    T2 = ((uint32_t)T2 >> 1) | ((uint32_t)env->CF << 31);
587 1e8d4eec bellard
}
588 1e8d4eec bellard
589 2c0262af bellard
/* T1 based, use T0 as shift count */
590 2c0262af bellard
591 2c0262af bellard
void OPPROTO op_shll_T1_T0(void)
592 2c0262af bellard
{
593 2c0262af bellard
    int shift;
594 2c0262af bellard
    shift = T0 & 0xff;
595 2c0262af bellard
    if (shift >= 32)
596 2c0262af bellard
        T1 = 0;
597 2c0262af bellard
    else
598 2c0262af bellard
        T1 = T1 << shift;
599 2c0262af bellard
    FORCE_RET();
600 2c0262af bellard
}
601 2c0262af bellard
602 2c0262af bellard
void OPPROTO op_shrl_T1_T0(void)
603 2c0262af bellard
{
604 2c0262af bellard
    int shift;
605 2c0262af bellard
    shift = T0 & 0xff;
606 2c0262af bellard
    if (shift >= 32)
607 2c0262af bellard
        T1 = 0;
608 2c0262af bellard
    else
609 2c0262af bellard
        T1 = (uint32_t)T1 >> shift;
610 2c0262af bellard
    FORCE_RET();
611 2c0262af bellard
}
612 2c0262af bellard
613 2c0262af bellard
void OPPROTO op_sarl_T1_T0(void)
614 2c0262af bellard
{
615 2c0262af bellard
    int shift;
616 2c0262af bellard
    shift = T0 & 0xff;
617 2c0262af bellard
    if (shift >= 32)
618 2c0262af bellard
        shift = 31;
619 2c0262af bellard
    T1 = (int32_t)T1 >> shift;
620 2c0262af bellard
}
621 2c0262af bellard
622 2c0262af bellard
void OPPROTO op_rorl_T1_T0(void)
623 2c0262af bellard
{
624 2c0262af bellard
    int shift;
625 2c0262af bellard
    shift = T0 & 0x1f;
626 2c0262af bellard
    if (shift) {
627 2c0262af bellard
        T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
628 2c0262af bellard
    }
629 2c0262af bellard
    FORCE_RET();
630 2c0262af bellard
}
631 2c0262af bellard
632 2c0262af bellard
/* T1 based, use T0 as shift count and compute CF */
633 2c0262af bellard
634 2c0262af bellard
void OPPROTO op_shll_T1_T0_cc(void)
635 2c0262af bellard
{
636 2c0262af bellard
    int shift;
637 2c0262af bellard
    shift = T0 & 0xff;
638 2c0262af bellard
    if (shift >= 32) {
639 2c0262af bellard
        if (shift == 32)
640 2c0262af bellard
            env->CF = T1 & 1;
641 2c0262af bellard
        else
642 2c0262af bellard
            env->CF = 0;
643 2c0262af bellard
        T1 = 0;
644 2c0262af bellard
    } else if (shift != 0) {
645 2c0262af bellard
        env->CF = (T1 >> (32 - shift)) & 1;
646 2c0262af bellard
        T1 = T1 << shift;
647 2c0262af bellard
    }
648 2c0262af bellard
    FORCE_RET();
649 2c0262af bellard
}
650 2c0262af bellard
651 2c0262af bellard
void OPPROTO op_shrl_T1_T0_cc(void)
652 2c0262af bellard
{
653 2c0262af bellard
    int shift;
654 2c0262af bellard
    shift = T0 & 0xff;
655 2c0262af bellard
    if (shift >= 32) {
656 2c0262af bellard
        if (shift == 32)
657 2c0262af bellard
            env->CF = (T1 >> 31) & 1;
658 2c0262af bellard
        else
659 2c0262af bellard
            env->CF = 0;
660 2c0262af bellard
        T1 = 0;
661 2c0262af bellard
    } else if (shift != 0) {
662 2c0262af bellard
        env->CF = (T1 >> (shift - 1)) & 1;
663 2c0262af bellard
        T1 = (uint32_t)T1 >> shift;
664 2c0262af bellard
    }
665 2c0262af bellard
    FORCE_RET();
666 2c0262af bellard
}
667 2c0262af bellard
668 2c0262af bellard
void OPPROTO op_sarl_T1_T0_cc(void)
669 2c0262af bellard
{
670 2c0262af bellard
    int shift;
671 2c0262af bellard
    shift = T0 & 0xff;
672 2c0262af bellard
    if (shift >= 32) {
673 2c0262af bellard
        env->CF = (T1 >> 31) & 1;
674 2c0262af bellard
        T1 = (int32_t)T1 >> 31;
675 2c0262af bellard
    } else {
676 2c0262af bellard
        env->CF = (T1 >> (shift - 1)) & 1;
677 2c0262af bellard
        T1 = (int32_t)T1 >> shift;
678 2c0262af bellard
    }
679 2c0262af bellard
    FORCE_RET();
680 2c0262af bellard
}
681 2c0262af bellard
682 2c0262af bellard
void OPPROTO op_rorl_T1_T0_cc(void)
683 2c0262af bellard
{
684 2c0262af bellard
    int shift1, shift;
685 2c0262af bellard
    shift1 = T0 & 0xff;
686 2c0262af bellard
    shift = shift1 & 0x1f;
687 2c0262af bellard
    if (shift == 0) {
688 2c0262af bellard
        if (shift1 != 0)
689 2c0262af bellard
            env->CF = (T1 >> 31) & 1;
690 2c0262af bellard
    } else {
691 2c0262af bellard
        env->CF = (T1 >> (shift - 1)) & 1;
692 2c0262af bellard
        T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
693 2c0262af bellard
    }
694 2c0262af bellard
    FORCE_RET();
695 2c0262af bellard
}
696 2c0262af bellard
697 2c0262af bellard
/* exceptions */
698 2c0262af bellard
699 2c0262af bellard
void OPPROTO op_swi(void)
700 2c0262af bellard
{
701 2c0262af bellard
    env->exception_index = EXCP_SWI;
702 2c0262af bellard
    cpu_loop_exit();
703 2c0262af bellard
}
704 2c0262af bellard
705 2c0262af bellard
void OPPROTO op_undef_insn(void)
706 2c0262af bellard
{
707 2c0262af bellard
    env->exception_index = EXCP_UDEF;
708 2c0262af bellard
    cpu_loop_exit();
709 2c0262af bellard
}
710 2c0262af bellard
711 2c0262af bellard
/* thread support */
712 2c0262af bellard
713 2c0262af bellard
spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED;
714 2c0262af bellard
715 2c0262af bellard
void cpu_lock(void)
716 2c0262af bellard
{
717 2c0262af bellard
    spin_lock(&global_cpu_lock);
718 2c0262af bellard
}
719 2c0262af bellard
720 2c0262af bellard
void cpu_unlock(void)
721 2c0262af bellard
{
722 2c0262af bellard
    spin_unlock(&global_cpu_lock);
723 2c0262af bellard
}