root / hw / milkymist-vgafb.c @ d46ccfce
History | View | Annotate | Download (7.5 kB)
1 | d23948b1 | Michael Walle | |
---|---|---|---|
2 | d23948b1 | Michael Walle | /*
|
3 | d23948b1 | Michael Walle | * QEMU model of the Milkymist VGA framebuffer.
|
4 | d23948b1 | Michael Walle | *
|
5 | d23948b1 | Michael Walle | * Copyright (c) 2010 Michael Walle <michael@walle.cc>
|
6 | d23948b1 | Michael Walle | *
|
7 | d23948b1 | Michael Walle | * This library is free software; you can redistribute it and/or
|
8 | d23948b1 | Michael Walle | * modify it under the terms of the GNU Lesser General Public
|
9 | d23948b1 | Michael Walle | * License as published by the Free Software Foundation; either
|
10 | d23948b1 | Michael Walle | * version 2 of the License, or (at your option) any later version.
|
11 | d23948b1 | Michael Walle | *
|
12 | d23948b1 | Michael Walle | * This library is distributed in the hope that it will be useful,
|
13 | d23948b1 | Michael Walle | * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
14 | d23948b1 | Michael Walle | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
15 | d23948b1 | Michael Walle | * Lesser General Public License for more details.
|
16 | d23948b1 | Michael Walle | *
|
17 | d23948b1 | Michael Walle | * You should have received a copy of the GNU Lesser General Public
|
18 | d23948b1 | Michael Walle | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
19 | d23948b1 | Michael Walle | *
|
20 | d23948b1 | Michael Walle | *
|
21 | d23948b1 | Michael Walle | * Specification available at:
|
22 | d23948b1 | Michael Walle | * http://www.milkymist.org/socdoc/vgafb.pdf
|
23 | d23948b1 | Michael Walle | */
|
24 | d23948b1 | Michael Walle | |
25 | d23948b1 | Michael Walle | #include "hw.h" |
26 | d23948b1 | Michael Walle | #include "sysbus.h" |
27 | d23948b1 | Michael Walle | #include "trace.h" |
28 | d23948b1 | Michael Walle | #include "console.h" |
29 | d23948b1 | Michael Walle | #include "framebuffer.h" |
30 | d23948b1 | Michael Walle | #include "pixel_ops.h" |
31 | d23948b1 | Michael Walle | #include "qemu-error.h" |
32 | d23948b1 | Michael Walle | |
33 | d23948b1 | Michael Walle | #define BITS 8 |
34 | d23948b1 | Michael Walle | #include "milkymist-vgafb_template.h" |
35 | d23948b1 | Michael Walle | #define BITS 15 |
36 | d23948b1 | Michael Walle | #include "milkymist-vgafb_template.h" |
37 | d23948b1 | Michael Walle | #define BITS 16 |
38 | d23948b1 | Michael Walle | #include "milkymist-vgafb_template.h" |
39 | d23948b1 | Michael Walle | #define BITS 24 |
40 | d23948b1 | Michael Walle | #include "milkymist-vgafb_template.h" |
41 | d23948b1 | Michael Walle | #define BITS 32 |
42 | d23948b1 | Michael Walle | #include "milkymist-vgafb_template.h" |
43 | d23948b1 | Michael Walle | |
44 | d23948b1 | Michael Walle | enum {
|
45 | d23948b1 | Michael Walle | R_CTRL = 0,
|
46 | d23948b1 | Michael Walle | R_HRES, |
47 | d23948b1 | Michael Walle | R_HSYNC_START, |
48 | d23948b1 | Michael Walle | R_HSYNC_END, |
49 | d23948b1 | Michael Walle | R_HSCAN, |
50 | d23948b1 | Michael Walle | R_VRES, |
51 | d23948b1 | Michael Walle | R_VSYNC_START, |
52 | d23948b1 | Michael Walle | R_VSYNC_END, |
53 | d23948b1 | Michael Walle | R_VSCAN, |
54 | d23948b1 | Michael Walle | R_BASEADDRESS, |
55 | d23948b1 | Michael Walle | R_BASEADDRESS_ACT, |
56 | d23948b1 | Michael Walle | R_BURST_COUNT, |
57 | d23948b1 | Michael Walle | R_SOURCE_CLOCK, |
58 | d23948b1 | Michael Walle | R_MAX |
59 | d23948b1 | Michael Walle | }; |
60 | d23948b1 | Michael Walle | |
61 | d23948b1 | Michael Walle | enum {
|
62 | d23948b1 | Michael Walle | CTRL_RESET = (1<<0), |
63 | d23948b1 | Michael Walle | }; |
64 | d23948b1 | Michael Walle | |
65 | d23948b1 | Michael Walle | struct MilkymistVgafbState {
|
66 | d23948b1 | Michael Walle | SysBusDevice busdev; |
67 | d23948b1 | Michael Walle | DisplayState *ds; |
68 | d23948b1 | Michael Walle | |
69 | d23948b1 | Michael Walle | int invalidate;
|
70 | d23948b1 | Michael Walle | uint32_t fb_offset; |
71 | d23948b1 | Michael Walle | uint32_t fb_mask; |
72 | d23948b1 | Michael Walle | |
73 | d23948b1 | Michael Walle | uint32_t regs[R_MAX]; |
74 | d23948b1 | Michael Walle | }; |
75 | d23948b1 | Michael Walle | typedef struct MilkymistVgafbState MilkymistVgafbState; |
76 | d23948b1 | Michael Walle | |
77 | d23948b1 | Michael Walle | static int vgafb_enabled(MilkymistVgafbState *s) |
78 | d23948b1 | Michael Walle | { |
79 | d23948b1 | Michael Walle | return !(s->regs[R_CTRL] & CTRL_RESET);
|
80 | d23948b1 | Michael Walle | } |
81 | d23948b1 | Michael Walle | |
82 | d23948b1 | Michael Walle | static void vgafb_update_display(void *opaque) |
83 | d23948b1 | Michael Walle | { |
84 | d23948b1 | Michael Walle | MilkymistVgafbState *s = opaque; |
85 | d23948b1 | Michael Walle | int first = 0; |
86 | d23948b1 | Michael Walle | int last = 0; |
87 | d23948b1 | Michael Walle | drawfn fn; |
88 | d23948b1 | Michael Walle | |
89 | d23948b1 | Michael Walle | if (!vgafb_enabled(s)) {
|
90 | d23948b1 | Michael Walle | return;
|
91 | d23948b1 | Michael Walle | } |
92 | d23948b1 | Michael Walle | |
93 | d23948b1 | Michael Walle | int dest_width = s->regs[R_HRES];
|
94 | d23948b1 | Michael Walle | |
95 | d23948b1 | Michael Walle | switch (ds_get_bits_per_pixel(s->ds)) {
|
96 | d23948b1 | Michael Walle | case 0: |
97 | d23948b1 | Michael Walle | return;
|
98 | d23948b1 | Michael Walle | case 8: |
99 | d23948b1 | Michael Walle | fn = draw_line_8; |
100 | d23948b1 | Michael Walle | break;
|
101 | d23948b1 | Michael Walle | case 15: |
102 | d23948b1 | Michael Walle | fn = draw_line_15; |
103 | d23948b1 | Michael Walle | dest_width *= 2;
|
104 | d23948b1 | Michael Walle | break;
|
105 | d23948b1 | Michael Walle | case 16: |
106 | d23948b1 | Michael Walle | fn = draw_line_16; |
107 | d23948b1 | Michael Walle | dest_width *= 2;
|
108 | d23948b1 | Michael Walle | break;
|
109 | d23948b1 | Michael Walle | case 24: |
110 | d23948b1 | Michael Walle | fn = draw_line_24; |
111 | d23948b1 | Michael Walle | dest_width *= 3;
|
112 | d23948b1 | Michael Walle | break;
|
113 | d23948b1 | Michael Walle | case 32: |
114 | d23948b1 | Michael Walle | fn = draw_line_32; |
115 | d23948b1 | Michael Walle | dest_width *= 4;
|
116 | d23948b1 | Michael Walle | break;
|
117 | d23948b1 | Michael Walle | default:
|
118 | d23948b1 | Michael Walle | hw_error("milkymist_vgafb: bad color depth\n");
|
119 | d23948b1 | Michael Walle | break;
|
120 | d23948b1 | Michael Walle | } |
121 | d23948b1 | Michael Walle | |
122 | d23948b1 | Michael Walle | framebuffer_update_display(s->ds, |
123 | d23948b1 | Michael Walle | s->regs[R_BASEADDRESS] + s->fb_offset, |
124 | d23948b1 | Michael Walle | s->regs[R_HRES], |
125 | d23948b1 | Michael Walle | s->regs[R_VRES], |
126 | d23948b1 | Michael Walle | s->regs[R_HRES] * 2,
|
127 | d23948b1 | Michael Walle | dest_width, |
128 | d23948b1 | Michael Walle | 0,
|
129 | d23948b1 | Michael Walle | s->invalidate, |
130 | d23948b1 | Michael Walle | fn, |
131 | d23948b1 | Michael Walle | NULL,
|
132 | d23948b1 | Michael Walle | &first, &last); |
133 | d23948b1 | Michael Walle | |
134 | d23948b1 | Michael Walle | if (first >= 0) { |
135 | d23948b1 | Michael Walle | dpy_update(s->ds, 0, first, s->regs[R_HRES], last - first + 1); |
136 | d23948b1 | Michael Walle | } |
137 | d23948b1 | Michael Walle | s->invalidate = 0;
|
138 | d23948b1 | Michael Walle | } |
139 | d23948b1 | Michael Walle | |
140 | d23948b1 | Michael Walle | static void vgafb_invalidate_display(void *opaque) |
141 | d23948b1 | Michael Walle | { |
142 | d23948b1 | Michael Walle | MilkymistVgafbState *s = opaque; |
143 | d23948b1 | Michael Walle | s->invalidate = 1;
|
144 | d23948b1 | Michael Walle | } |
145 | d23948b1 | Michael Walle | |
146 | d23948b1 | Michael Walle | static void vgafb_resize(MilkymistVgafbState *s) |
147 | d23948b1 | Michael Walle | { |
148 | d23948b1 | Michael Walle | if (!vgafb_enabled(s)) {
|
149 | d23948b1 | Michael Walle | return;
|
150 | d23948b1 | Michael Walle | } |
151 | d23948b1 | Michael Walle | |
152 | d23948b1 | Michael Walle | qemu_console_resize(s->ds, s->regs[R_HRES], s->regs[R_VRES]); |
153 | d23948b1 | Michael Walle | s->invalidate = 1;
|
154 | d23948b1 | Michael Walle | } |
155 | d23948b1 | Michael Walle | |
156 | d23948b1 | Michael Walle | static uint32_t vgafb_read(void *opaque, target_phys_addr_t addr) |
157 | d23948b1 | Michael Walle | { |
158 | d23948b1 | Michael Walle | MilkymistVgafbState *s = opaque; |
159 | d23948b1 | Michael Walle | uint32_t r = 0;
|
160 | d23948b1 | Michael Walle | |
161 | d23948b1 | Michael Walle | addr >>= 2;
|
162 | d23948b1 | Michael Walle | switch (addr) {
|
163 | d23948b1 | Michael Walle | case R_CTRL:
|
164 | d23948b1 | Michael Walle | case R_HRES:
|
165 | d23948b1 | Michael Walle | case R_HSYNC_START:
|
166 | d23948b1 | Michael Walle | case R_HSYNC_END:
|
167 | d23948b1 | Michael Walle | case R_HSCAN:
|
168 | d23948b1 | Michael Walle | case R_VRES:
|
169 | d23948b1 | Michael Walle | case R_VSYNC_START:
|
170 | d23948b1 | Michael Walle | case R_VSYNC_END:
|
171 | d23948b1 | Michael Walle | case R_VSCAN:
|
172 | d23948b1 | Michael Walle | case R_BASEADDRESS:
|
173 | d23948b1 | Michael Walle | case R_BURST_COUNT:
|
174 | d23948b1 | Michael Walle | case R_SOURCE_CLOCK:
|
175 | d23948b1 | Michael Walle | r = s->regs[addr]; |
176 | d23948b1 | Michael Walle | break;
|
177 | d23948b1 | Michael Walle | case R_BASEADDRESS_ACT:
|
178 | d23948b1 | Michael Walle | r = s->regs[R_BASEADDRESS]; |
179 | d23948b1 | Michael Walle | break;
|
180 | d23948b1 | Michael Walle | |
181 | d23948b1 | Michael Walle | default:
|
182 | d23948b1 | Michael Walle | error_report("milkymist_vgafb: read access to unknown register 0x"
|
183 | d23948b1 | Michael Walle | TARGET_FMT_plx, addr << 2);
|
184 | d23948b1 | Michael Walle | break;
|
185 | d23948b1 | Michael Walle | } |
186 | d23948b1 | Michael Walle | |
187 | d23948b1 | Michael Walle | trace_milkymist_vgafb_memory_read(addr << 2, r);
|
188 | d23948b1 | Michael Walle | |
189 | d23948b1 | Michael Walle | return r;
|
190 | d23948b1 | Michael Walle | } |
191 | d23948b1 | Michael Walle | |
192 | d23948b1 | Michael Walle | static void |
193 | d23948b1 | Michael Walle | vgafb_write(void *opaque, target_phys_addr_t addr, uint32_t value)
|
194 | d23948b1 | Michael Walle | { |
195 | d23948b1 | Michael Walle | MilkymistVgafbState *s = opaque; |
196 | d23948b1 | Michael Walle | |
197 | d23948b1 | Michael Walle | trace_milkymist_vgafb_memory_write(addr, value); |
198 | d23948b1 | Michael Walle | |
199 | d23948b1 | Michael Walle | addr >>= 2;
|
200 | d23948b1 | Michael Walle | switch (addr) {
|
201 | d23948b1 | Michael Walle | case R_CTRL:
|
202 | c07050dd | Michael Walle | s->regs[addr] = value; |
203 | c07050dd | Michael Walle | vgafb_resize(s); |
204 | c07050dd | Michael Walle | break;
|
205 | d23948b1 | Michael Walle | case R_HSYNC_START:
|
206 | d23948b1 | Michael Walle | case R_HSYNC_END:
|
207 | d23948b1 | Michael Walle | case R_HSCAN:
|
208 | d23948b1 | Michael Walle | case R_VSYNC_START:
|
209 | d23948b1 | Michael Walle | case R_VSYNC_END:
|
210 | d23948b1 | Michael Walle | case R_VSCAN:
|
211 | d23948b1 | Michael Walle | case R_BURST_COUNT:
|
212 | d23948b1 | Michael Walle | case R_SOURCE_CLOCK:
|
213 | d23948b1 | Michael Walle | s->regs[addr] = value; |
214 | d23948b1 | Michael Walle | break;
|
215 | d23948b1 | Michael Walle | case R_BASEADDRESS:
|
216 | d23948b1 | Michael Walle | if (value & 0x1f) { |
217 | d23948b1 | Michael Walle | error_report("milkymist_vgafb: framebuffer base address have to "
|
218 | d23948b1 | Michael Walle | "be 32 byte aligned");
|
219 | d23948b1 | Michael Walle | break;
|
220 | d23948b1 | Michael Walle | } |
221 | d23948b1 | Michael Walle | s->regs[addr] = value & s->fb_mask; |
222 | d23948b1 | Michael Walle | s->invalidate = 1;
|
223 | d23948b1 | Michael Walle | break;
|
224 | d23948b1 | Michael Walle | case R_HRES:
|
225 | d23948b1 | Michael Walle | case R_VRES:
|
226 | d23948b1 | Michael Walle | s->regs[addr] = value; |
227 | d23948b1 | Michael Walle | vgafb_resize(s); |
228 | d23948b1 | Michael Walle | break;
|
229 | d23948b1 | Michael Walle | case R_BASEADDRESS_ACT:
|
230 | d23948b1 | Michael Walle | error_report("milkymist_vgafb: write to read-only register 0x"
|
231 | d23948b1 | Michael Walle | TARGET_FMT_plx, addr << 2);
|
232 | d23948b1 | Michael Walle | break;
|
233 | d23948b1 | Michael Walle | |
234 | d23948b1 | Michael Walle | default:
|
235 | d23948b1 | Michael Walle | error_report("milkymist_vgafb: write access to unknown register 0x"
|
236 | d23948b1 | Michael Walle | TARGET_FMT_plx, addr << 2);
|
237 | d23948b1 | Michael Walle | break;
|
238 | d23948b1 | Michael Walle | } |
239 | d23948b1 | Michael Walle | } |
240 | d23948b1 | Michael Walle | |
241 | d23948b1 | Michael Walle | static CPUReadMemoryFunc * const vgafb_read_fn[] = { |
242 | d23948b1 | Michael Walle | NULL,
|
243 | d23948b1 | Michael Walle | NULL,
|
244 | d23948b1 | Michael Walle | &vgafb_read |
245 | d23948b1 | Michael Walle | }; |
246 | d23948b1 | Michael Walle | |
247 | d23948b1 | Michael Walle | static CPUWriteMemoryFunc * const vgafb_write_fn[] = { |
248 | d23948b1 | Michael Walle | NULL,
|
249 | d23948b1 | Michael Walle | NULL,
|
250 | d23948b1 | Michael Walle | &vgafb_write |
251 | d23948b1 | Michael Walle | }; |
252 | d23948b1 | Michael Walle | |
253 | d23948b1 | Michael Walle | static void milkymist_vgafb_reset(DeviceState *d) |
254 | d23948b1 | Michael Walle | { |
255 | d23948b1 | Michael Walle | MilkymistVgafbState *s = container_of(d, MilkymistVgafbState, busdev.qdev); |
256 | d23948b1 | Michael Walle | int i;
|
257 | d23948b1 | Michael Walle | |
258 | d23948b1 | Michael Walle | for (i = 0; i < R_MAX; i++) { |
259 | d23948b1 | Michael Walle | s->regs[i] = 0;
|
260 | d23948b1 | Michael Walle | } |
261 | d23948b1 | Michael Walle | |
262 | d23948b1 | Michael Walle | /* defaults */
|
263 | d23948b1 | Michael Walle | s->regs[R_CTRL] = CTRL_RESET; |
264 | d23948b1 | Michael Walle | s->regs[R_HRES] = 640;
|
265 | d23948b1 | Michael Walle | s->regs[R_VRES] = 480;
|
266 | d23948b1 | Michael Walle | s->regs[R_BASEADDRESS] = 0;
|
267 | d23948b1 | Michael Walle | } |
268 | d23948b1 | Michael Walle | |
269 | d23948b1 | Michael Walle | static int milkymist_vgafb_init(SysBusDevice *dev) |
270 | d23948b1 | Michael Walle | { |
271 | d23948b1 | Michael Walle | MilkymistVgafbState *s = FROM_SYSBUS(typeof(*s), dev); |
272 | d23948b1 | Michael Walle | int vgafb_regs;
|
273 | d23948b1 | Michael Walle | |
274 | d23948b1 | Michael Walle | vgafb_regs = cpu_register_io_memory(vgafb_read_fn, vgafb_write_fn, s, |
275 | d23948b1 | Michael Walle | DEVICE_NATIVE_ENDIAN); |
276 | d23948b1 | Michael Walle | sysbus_init_mmio(dev, R_MAX * 4, vgafb_regs);
|
277 | d23948b1 | Michael Walle | |
278 | d23948b1 | Michael Walle | s->ds = graphic_console_init(vgafb_update_display, |
279 | d23948b1 | Michael Walle | vgafb_invalidate_display, |
280 | d23948b1 | Michael Walle | NULL, NULL, s); |
281 | d23948b1 | Michael Walle | |
282 | d23948b1 | Michael Walle | return 0; |
283 | d23948b1 | Michael Walle | } |
284 | d23948b1 | Michael Walle | |
285 | d23948b1 | Michael Walle | static int vgafb_post_load(void *opaque, int version_id) |
286 | d23948b1 | Michael Walle | { |
287 | d23948b1 | Michael Walle | vgafb_invalidate_display(opaque); |
288 | d23948b1 | Michael Walle | return 0; |
289 | d23948b1 | Michael Walle | } |
290 | d23948b1 | Michael Walle | |
291 | d23948b1 | Michael Walle | static const VMStateDescription vmstate_milkymist_vgafb = { |
292 | d23948b1 | Michael Walle | .name = "milkymist-vgafb",
|
293 | d23948b1 | Michael Walle | .version_id = 1,
|
294 | d23948b1 | Michael Walle | .minimum_version_id = 1,
|
295 | d23948b1 | Michael Walle | .minimum_version_id_old = 1,
|
296 | d23948b1 | Michael Walle | .post_load = vgafb_post_load, |
297 | d23948b1 | Michael Walle | .fields = (VMStateField[]) { |
298 | d23948b1 | Michael Walle | VMSTATE_UINT32_ARRAY(regs, MilkymistVgafbState, R_MAX), |
299 | d23948b1 | Michael Walle | VMSTATE_END_OF_LIST() |
300 | d23948b1 | Michael Walle | } |
301 | d23948b1 | Michael Walle | }; |
302 | d23948b1 | Michael Walle | |
303 | d23948b1 | Michael Walle | static SysBusDeviceInfo milkymist_vgafb_info = {
|
304 | d23948b1 | Michael Walle | .init = milkymist_vgafb_init, |
305 | d23948b1 | Michael Walle | .qdev.name = "milkymist-vgafb",
|
306 | d23948b1 | Michael Walle | .qdev.size = sizeof(MilkymistVgafbState),
|
307 | d23948b1 | Michael Walle | .qdev.vmsd = &vmstate_milkymist_vgafb, |
308 | d23948b1 | Michael Walle | .qdev.reset = milkymist_vgafb_reset, |
309 | d23948b1 | Michael Walle | .qdev.props = (Property[]) { |
310 | d23948b1 | Michael Walle | DEFINE_PROP_UINT32("fb_offset", MilkymistVgafbState, fb_offset, 0x0), |
311 | d23948b1 | Michael Walle | DEFINE_PROP_UINT32("fb_mask", MilkymistVgafbState, fb_mask, 0xffffffff), |
312 | d23948b1 | Michael Walle | DEFINE_PROP_END_OF_LIST(), |
313 | d23948b1 | Michael Walle | } |
314 | d23948b1 | Michael Walle | }; |
315 | d23948b1 | Michael Walle | |
316 | d23948b1 | Michael Walle | static void milkymist_vgafb_register(void) |
317 | d23948b1 | Michael Walle | { |
318 | d23948b1 | Michael Walle | sysbus_register_withprop(&milkymist_vgafb_info); |
319 | d23948b1 | Michael Walle | } |
320 | d23948b1 | Michael Walle | |
321 | d23948b1 | Michael Walle | device_init(milkymist_vgafb_register) |