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/*
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 * Model of Petalogix linux reference design targeting Xilinx Spartan 3ADSP-1800
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 * boards.
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 *
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 * Copyright (c) 2009 Edgar E. Iglesias.
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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#include "sysbus.h"
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#include "hw.h"
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#include "net.h"
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#include "flash.h"
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#include "sysemu.h"
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#include "devices.h"
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#include "boards.h"
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#include "device_tree.h"
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#include "xilinx.h"
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#include "loader.h"
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#include "elf.h"
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#include "blockdev.h"
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#include "microblaze_pic_cpu.h"
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#define LMB_BRAM_SIZE  (128 * 1024)
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#define FLASH_SIZE     (16 * 1024 * 1024)
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static struct
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{
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    uint32_t bootstrap_pc;
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    uint32_t cmdline;
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    uint32_t fdt;
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} boot_info;
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static void main_cpu_reset(void *opaque)
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{
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    CPUState *env = opaque;
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    cpu_reset(env);
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    env->regs[5] = boot_info.cmdline;
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    env->regs[7] = boot_info.fdt;
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    env->sregs[SR_PC] = boot_info.bootstrap_pc;
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}
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#define BINARY_DEVICE_TREE_FILE "petalogix-s3adsp1800.dtb"
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static int petalogix_load_device_tree(target_phys_addr_t addr,
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                                      uint32_t ramsize,
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                                      target_phys_addr_t initrd_base,
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                                      target_phys_addr_t initrd_size,
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                                      const char *kernel_cmdline)
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{
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    char *path;
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    int fdt_size;
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#ifdef CONFIG_FDT
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    void *fdt;
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    int r;
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    /* Try the local "mb.dtb" override.  */
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    fdt = load_device_tree("mb.dtb", &fdt_size);
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    if (!fdt) {
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        path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
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        if (path) {
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            fdt = load_device_tree(path, &fdt_size);
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            g_free(path);
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        }
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        if (!fdt)
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            return 0;
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    }
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    r = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs", kernel_cmdline);
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    if (r < 0)
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        fprintf(stderr, "couldn't set /chosen/bootargs\n");
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    cpu_physical_memory_write (addr, (void *)fdt, fdt_size);
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#else
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    /* We lack libfdt so we cannot manipulate the fdt. Just pass on the blob
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       to the kernel.  */
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    fdt_size = load_image_targphys("mb.dtb", addr, 0x10000);
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    if (fdt_size < 0) {
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        path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
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        if (path) {
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            fdt_size = load_image_targphys(path, addr, 0x10000);
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            g_free(path);
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        }
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    }
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    if (kernel_cmdline) {
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        fprintf(stderr,
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                "Warning: missing libfdt, cannot pass cmdline to kernel!\n");
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    }
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#endif
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    return fdt_size;
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}
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static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
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{
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    return addr - 0x30000000LL;
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}
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static void
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petalogix_s3adsp1800_init(ram_addr_t ram_size,
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                          const char *boot_device,
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                          const char *kernel_filename,
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                          const char *kernel_cmdline,
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                          const char *initrd_filename, const char *cpu_model)
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{
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    DeviceState *dev;
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    CPUState *env;
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    int kernel_size;
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    DriveInfo *dinfo;
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    int i;
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    target_phys_addr_t ddr_base = 0x90000000;
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    ram_addr_t phys_lmb_bram;
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    ram_addr_t phys_ram;
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    qemu_irq irq[32], *cpu_irq;
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    /* init CPUs */
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    if (cpu_model == NULL) {
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        cpu_model = "microblaze";
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    }
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    env = cpu_init(cpu_model);
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    env->pvr.regs[10] = 0x0c000000; /* spartan 3a dsp family.  */
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    qemu_register_reset(main_cpu_reset, env);
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    /* Attach emulated BRAM through the LMB.  */
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    phys_lmb_bram = qemu_ram_alloc(NULL, "petalogix_s3adsp1800.lmb_bram",
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                                   LMB_BRAM_SIZE);
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    cpu_register_physical_memory(0x00000000, LMB_BRAM_SIZE,
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                                 phys_lmb_bram | IO_MEM_RAM);
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    phys_ram = qemu_ram_alloc(NULL, "petalogix_s3adsp1800.ram", ram_size);
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    cpu_register_physical_memory(ddr_base, ram_size, phys_ram | IO_MEM_RAM);
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    dinfo = drive_get(IF_PFLASH, 0, 0);
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    pflash_cfi01_register(0xa0000000,
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                          NULL, "petalogix_s3adsp1800.flash", FLASH_SIZE,
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                          dinfo ? dinfo->bdrv : NULL, (64 * 1024),
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                          FLASH_SIZE >> 16,
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                          1, 0x89, 0x18, 0x0000, 0x0, 1);
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    cpu_irq = microblaze_pic_init_cpu(env);
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    dev = xilinx_intc_create(0x81800000, cpu_irq[0], 2);
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    for (i = 0; i < 32; i++) {
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        irq[i] = qdev_get_gpio_in(dev, i);
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    }
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    sysbus_create_simple("xilinx,uartlite", 0x84000000, irq[3]);
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    /* 2 timers at irq 2 @ 62 Mhz.  */
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    xilinx_timer_create(0x83c00000, irq[0], 2, 62 * 1000000);
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    xilinx_ethlite_create(&nd_table[0], 0x81000000, irq[1], 0, 0);
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    if (kernel_filename) {
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        uint64_t entry, low, high;
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        uint32_t base32;
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        int big_endian = 0;
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#ifdef TARGET_WORDS_BIGENDIAN
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        big_endian = 1;
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#endif
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        /* Boots a kernel elf binary.  */
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        kernel_size = load_elf(kernel_filename, NULL, NULL,
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                               &entry, &low, &high,
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                               big_endian, ELF_MACHINE, 0);
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        base32 = entry;
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        if (base32 == 0xc0000000) {
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            kernel_size = load_elf(kernel_filename, translate_kernel_address,
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                                   NULL, &entry, NULL, NULL,
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                                   big_endian, ELF_MACHINE, 0);
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        }
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        /* Always boot into physical ram.  */
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        boot_info.bootstrap_pc = ddr_base + (entry & 0x0fffffff);
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        /* If it wasn't an ELF image, try an u-boot image.  */
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        if (kernel_size < 0) {
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            target_phys_addr_t uentry, loadaddr;
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            kernel_size = load_uimage(kernel_filename, &uentry, &loadaddr, 0);
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            boot_info.bootstrap_pc = uentry;
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            high = (loadaddr + kernel_size + 3) & ~3;
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        }
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        /* Not an ELF image nor an u-boot image, try a RAW image.  */
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        if (kernel_size < 0) {
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            kernel_size = load_image_targphys(kernel_filename, ddr_base,
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                                              ram_size);
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            boot_info.bootstrap_pc = ddr_base;
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            high = (ddr_base + kernel_size + 3) & ~3;
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        }
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        boot_info.cmdline = high + 4096;
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        if (kernel_cmdline && strlen(kernel_cmdline)) {
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            pstrcpy_targphys("cmdline", boot_info.cmdline, 256, kernel_cmdline);
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        }
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        /* Provide a device-tree.  */
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        boot_info.fdt = boot_info.cmdline + 4096; 
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        petalogix_load_device_tree(boot_info.fdt, ram_size,
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                                   0, 0,
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                                   kernel_cmdline);
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    }
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}
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static QEMUMachine petalogix_s3adsp1800_machine = {
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    .name = "petalogix-s3adsp1800",
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    .desc = "PetaLogix linux refdesign for xilinx Spartan 3ADSP1800",
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    .init = petalogix_s3adsp1800_init,
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    .is_default = 1
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};
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static void petalogix_s3adsp1800_machine_init(void)
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{
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    qemu_register_machine(&petalogix_s3adsp1800_machine);
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}
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machine_init(petalogix_s3adsp1800_machine_init);