root / tcg / TODO @ d4929d58
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1 | c896fe29 | bellard | - test macro system |
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2 | c896fe29 | bellard | |
3 | c896fe29 | bellard | - test conditional jumps |
4 | c896fe29 | bellard | |
5 | c896fe29 | bellard | - test mul, div, ext8s, ext16s, bswap |
6 | c896fe29 | bellard | |
7 | c896fe29 | bellard | - generate a global TB prologue and epilogue to save/restore registers |
8 | c896fe29 | bellard | to/from the CPU state and to reserve a stack frame to optimize |
9 | c896fe29 | bellard | helper calls. Modify cpu-exec.c so that it does not use global |
10 | c896fe29 | bellard | register variables (except maybe for 'env'). |
11 | c896fe29 | bellard | |
12 | c896fe29 | bellard | - fully convert the x86 target. The minimal amount of work includes: |
13 | c896fe29 | bellard | - add cc_src, cc_dst and cc_op as globals |
14 | c896fe29 | bellard | - disable its eflags optimization (the liveness analysis should |
15 | c896fe29 | bellard | suffice) |
16 | c896fe29 | bellard | - move complicated operations to helpers (in particular FPU, SSE, MMX). |
17 | c896fe29 | bellard | |
18 | c896fe29 | bellard | - optimize the x86 target: |
19 | c896fe29 | bellard | - move some or all the registers as globals |
20 | c896fe29 | bellard | - use the TB prologue and epilogue to have QEMU target registers in |
21 | c896fe29 | bellard | pre assigned host registers. |
22 | c896fe29 | bellard | |
23 | c896fe29 | bellard | Ideas: |
24 | c896fe29 | bellard | |
25 | c896fe29 | bellard | - Move the slow part of the qemu_ld/st ops after the end of the TB. |
26 | c896fe29 | bellard | |
27 | c896fe29 | bellard | - Experiment: change instruction storage to simplify macro handling |
28 | c896fe29 | bellard | and to handle dynamic allocation and see if the translation speed is |
29 | c896fe29 | bellard | OK. |
30 | c896fe29 | bellard | |
31 | c896fe29 | bellard | - change exception syntax to get closer to QOP system (exception |
32 | c896fe29 | bellard | parameters given with a specific instruction). |