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1 | 27503323 | bellard | /*
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2 | 27503323 | bellard | * QEMU Soundblaster 16 emulation
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3 | 27503323 | bellard | *
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4 | 27503323 | bellard | * Copyright (c) 2003 Vassili Karpov (malc)
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5 | 27503323 | bellard | *
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6 | 27503323 | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 27503323 | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | 27503323 | bellard | * in the Software without restriction, including without limitation the rights
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9 | 27503323 | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 27503323 | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | 27503323 | bellard | * furnished to do so, subject to the following conditions:
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12 | 27503323 | bellard | *
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13 | 27503323 | bellard | * The above copyright notice and this permission notice shall be included in
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14 | 27503323 | bellard | * all copies or substantial portions of the Software.
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15 | 27503323 | bellard | *
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16 | 27503323 | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 27503323 | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 27503323 | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 27503323 | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 27503323 | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 27503323 | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 27503323 | bellard | * THE SOFTWARE.
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23 | 27503323 | bellard | */
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24 | 27503323 | bellard | #include "vl.h" |
25 | 27503323 | bellard | |
26 | 27503323 | bellard | #define MIN(a, b) ((a)>(b)?(b):(a))
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27 | 27503323 | bellard | #define LENOFA(a) ((int) (sizeof(a)/sizeof(a[0]))) |
28 | 27503323 | bellard | |
29 | 27503323 | bellard | #define log(...) fprintf (stderr, "sb16: " __VA_ARGS__) |
30 | 27503323 | bellard | |
31 | bc0b1dc1 | bellard | /* #define DEBUG_SB16 */
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32 | 27503323 | bellard | #ifdef DEBUG_SB16
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33 | 27503323 | bellard | #define lwarn(...) fprintf (stderr, "sb16: " __VA_ARGS__) |
34 | 27503323 | bellard | #define linfo(...) fprintf (stderr, "sb16: " __VA_ARGS__) |
35 | 27503323 | bellard | #define ldebug(...) fprintf (stderr, "sb16: " __VA_ARGS__) |
36 | 27503323 | bellard | #else
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37 | 27503323 | bellard | #define lwarn(...)
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38 | 27503323 | bellard | #define linfo(...)
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39 | 27503323 | bellard | #define ldebug(...)
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40 | 27503323 | bellard | #endif
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41 | 27503323 | bellard | |
42 | 27503323 | bellard | #define IO_READ_PROTO(name) \
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43 | 7d977de7 | bellard | uint32_t name (void *opaque, uint32_t nport)
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44 | 27503323 | bellard | #define IO_WRITE_PROTO(name) \
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45 | 7d977de7 | bellard | void name (void *opaque, uint32_t nport, uint32_t val) |
46 | 27503323 | bellard | |
47 | 27503323 | bellard | static struct { |
48 | 27503323 | bellard | int ver_lo;
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49 | 27503323 | bellard | int ver_hi;
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50 | 27503323 | bellard | int irq;
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51 | 27503323 | bellard | int dma;
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52 | 27503323 | bellard | int hdma;
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53 | 27503323 | bellard | int port;
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54 | 27503323 | bellard | int mix_block;
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55 | bc0b1dc1 | bellard | } sb = {5, 4, 5, 1, 5, 0x220, -1}; |
56 | 27503323 | bellard | |
57 | 27503323 | bellard | static int mix_block, noirq; |
58 | 27503323 | bellard | |
59 | 5e2a6443 | bellard | typedef struct SB16State { |
60 | 27503323 | bellard | int in_index;
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61 | 27503323 | bellard | int out_data_len;
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62 | 27503323 | bellard | int fmt_stereo;
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63 | 27503323 | bellard | int fmt_signed;
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64 | 27503323 | bellard | int fmt_bits;
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65 | 27503323 | bellard | int dma_auto;
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66 | 27503323 | bellard | int dma_buffer_size;
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67 | 27503323 | bellard | int fifo;
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68 | 27503323 | bellard | int freq;
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69 | 27503323 | bellard | int time_const;
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70 | 27503323 | bellard | int speaker;
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71 | 27503323 | bellard | int needed_bytes;
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72 | 27503323 | bellard | int cmd;
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73 | 27503323 | bellard | int dma_pos;
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74 | 27503323 | bellard | int use_hdma;
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75 | 27503323 | bellard | |
76 | 27503323 | bellard | int v2x6;
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77 | 27503323 | bellard | |
78 | 27503323 | bellard | uint8_t in_data[10];
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79 | 27503323 | bellard | uint8_t out_data[10];
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80 | 27503323 | bellard | |
81 | 27503323 | bellard | int left_till_irq;
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82 | 27503323 | bellard | |
83 | 5e2a6443 | bellard | /* mixer state */
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84 | 5e2a6443 | bellard | int mixer_nreg;
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85 | 202a456a | bellard | uint8_t mixer_regs[256];
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86 | 5e2a6443 | bellard | } SB16State; |
87 | 27503323 | bellard | |
88 | 5e2a6443 | bellard | /* XXX: suppress that and use a context */
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89 | 5e2a6443 | bellard | static struct SB16State dsp; |
90 | 27503323 | bellard | |
91 | 5e2a6443 | bellard | static void log_dsp (SB16State *dsp) |
92 | 5e2a6443 | bellard | { |
93 | 27503323 | bellard | linfo ("%c:%c:%d:%c:dmabuf=%d:pos=%d:freq=%d:timeconst=%d:speaker=%d\n",
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94 | 5e2a6443 | bellard | dsp->fmt_stereo ? 'S' : 'M', |
95 | 5e2a6443 | bellard | dsp->fmt_signed ? 'S' : 'U', |
96 | 5e2a6443 | bellard | dsp->fmt_bits, |
97 | 5e2a6443 | bellard | dsp->dma_auto ? 'a' : 's', |
98 | 5e2a6443 | bellard | dsp->dma_buffer_size, |
99 | 5e2a6443 | bellard | dsp->dma_pos, |
100 | 5e2a6443 | bellard | dsp->freq, |
101 | 5e2a6443 | bellard | dsp->time_const, |
102 | 5e2a6443 | bellard | dsp->speaker); |
103 | 27503323 | bellard | } |
104 | 27503323 | bellard | |
105 | 27503323 | bellard | static void control (int hold) |
106 | 27503323 | bellard | { |
107 | 27503323 | bellard | linfo ("%d high %d\n", hold, dsp.use_hdma);
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108 | 27503323 | bellard | if (hold) {
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109 | 27503323 | bellard | if (dsp.use_hdma)
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110 | 27503323 | bellard | DMA_hold_DREQ (sb.hdma); |
111 | 27503323 | bellard | else
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112 | 27503323 | bellard | DMA_hold_DREQ (sb.dma); |
113 | 27503323 | bellard | } |
114 | 27503323 | bellard | else {
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115 | 27503323 | bellard | if (dsp.use_hdma)
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116 | 27503323 | bellard | DMA_release_DREQ (sb.hdma); |
117 | 27503323 | bellard | else
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118 | 27503323 | bellard | DMA_release_DREQ (sb.dma); |
119 | 27503323 | bellard | } |
120 | 27503323 | bellard | } |
121 | 27503323 | bellard | |
122 | 27503323 | bellard | static void dma_cmd (uint8_t cmd, uint8_t d0, int dma_len) |
123 | 27503323 | bellard | { |
124 | 27503323 | bellard | int bps;
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125 | 27503323 | bellard | audfmt_e fmt; |
126 | 27503323 | bellard | |
127 | 27503323 | bellard | dsp.use_hdma = cmd < 0xc0;
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128 | 27503323 | bellard | dsp.fifo = (cmd >> 1) & 1; |
129 | 27503323 | bellard | dsp.dma_auto = (cmd >> 2) & 1; |
130 | 27503323 | bellard | |
131 | 27503323 | bellard | switch (cmd >> 4) { |
132 | 27503323 | bellard | case 11: |
133 | 27503323 | bellard | dsp.fmt_bits = 16;
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134 | 27503323 | bellard | break;
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135 | 27503323 | bellard | |
136 | 27503323 | bellard | case 12: |
137 | 27503323 | bellard | dsp.fmt_bits = 8;
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138 | 27503323 | bellard | break;
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139 | 27503323 | bellard | } |
140 | 27503323 | bellard | |
141 | 27503323 | bellard | dsp.fmt_signed = (d0 >> 4) & 1; |
142 | 27503323 | bellard | dsp.fmt_stereo = (d0 >> 5) & 1; |
143 | 27503323 | bellard | |
144 | 27503323 | bellard | if (-1 != dsp.time_const) { |
145 | 27503323 | bellard | int tmp;
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146 | 27503323 | bellard | |
147 | 27503323 | bellard | tmp = 256 - dsp.time_const;
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148 | 27503323 | bellard | dsp.freq = (1000000 + (tmp / 2)) / tmp; |
149 | 27503323 | bellard | } |
150 | 27503323 | bellard | bps = 1 << (16 == dsp.fmt_bits); |
151 | 27503323 | bellard | |
152 | 27503323 | bellard | if (-1 != dma_len) |
153 | 27503323 | bellard | dsp.dma_buffer_size = (dma_len + 1) * bps;
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154 | 27503323 | bellard | |
155 | 27503323 | bellard | linfo ("frequency %d, stereo %d, signed %d, bits %d, size %d, auto %d\n",
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156 | 27503323 | bellard | dsp.freq, dsp.fmt_stereo, dsp.fmt_signed, dsp.fmt_bits, |
157 | 27503323 | bellard | dsp.dma_buffer_size, dsp.dma_auto); |
158 | 27503323 | bellard | |
159 | 27503323 | bellard | if (16 == dsp.fmt_bits) { |
160 | 27503323 | bellard | if (dsp.fmt_signed) {
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161 | 27503323 | bellard | fmt = AUD_FMT_S16; |
162 | 27503323 | bellard | } |
163 | 27503323 | bellard | else {
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164 | 27503323 | bellard | fmt = AUD_FMT_U16; |
165 | 27503323 | bellard | } |
166 | 27503323 | bellard | } |
167 | 27503323 | bellard | else {
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168 | 27503323 | bellard | if (dsp.fmt_signed) {
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169 | 27503323 | bellard | fmt = AUD_FMT_S8; |
170 | 27503323 | bellard | } |
171 | 27503323 | bellard | else {
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172 | 27503323 | bellard | fmt = AUD_FMT_U8; |
173 | 27503323 | bellard | } |
174 | 27503323 | bellard | } |
175 | 27503323 | bellard | |
176 | 27503323 | bellard | dsp.dma_pos = 0;
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177 | 27503323 | bellard | dsp.left_till_irq = dsp.dma_buffer_size; |
178 | 27503323 | bellard | |
179 | 27503323 | bellard | if (sb.mix_block) {
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180 | 27503323 | bellard | mix_block = sb.mix_block; |
181 | 27503323 | bellard | } |
182 | 27503323 | bellard | else {
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183 | 27503323 | bellard | int align;
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184 | 27503323 | bellard | |
185 | 27503323 | bellard | align = bps << dsp.fmt_stereo; |
186 | 27503323 | bellard | mix_block = ((dsp.freq * align) / 100) & ~(align - 1); |
187 | 27503323 | bellard | } |
188 | 27503323 | bellard | |
189 | 27503323 | bellard | AUD_reset (dsp.freq, 1 << dsp.fmt_stereo, fmt);
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190 | 27503323 | bellard | control (1);
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191 | 27503323 | bellard | dsp.speaker = 1;
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192 | 27503323 | bellard | } |
193 | 27503323 | bellard | |
194 | 202a456a | bellard | static inline void dsp_out_data(SB16State *dsp, int val) |
195 | 202a456a | bellard | { |
196 | 202a456a | bellard | if (dsp->out_data_len < sizeof(dsp->out_data)) |
197 | 202a456a | bellard | dsp->out_data[dsp->out_data_len++] = val; |
198 | 202a456a | bellard | } |
199 | 202a456a | bellard | |
200 | 5e2a6443 | bellard | static void command (SB16State *dsp, uint8_t cmd) |
201 | 27503323 | bellard | { |
202 | 27503323 | bellard | linfo ("%#x\n", cmd);
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203 | 27503323 | bellard | |
204 | 27503323 | bellard | if (cmd > 0xaf && cmd < 0xd0) { |
205 | 27503323 | bellard | if (cmd & 8) |
206 | 27503323 | bellard | goto error;
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207 | 27503323 | bellard | |
208 | 27503323 | bellard | switch (cmd >> 4) { |
209 | 27503323 | bellard | case 11: |
210 | 27503323 | bellard | case 12: |
211 | 27503323 | bellard | break;
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212 | 27503323 | bellard | default:
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213 | 5e2a6443 | bellard | log("%#x wrong bits", cmd);
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214 | 27503323 | bellard | goto error;
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215 | 27503323 | bellard | } |
216 | 5e2a6443 | bellard | dsp->needed_bytes = 3;
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217 | 27503323 | bellard | } |
218 | 27503323 | bellard | else {
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219 | 27503323 | bellard | switch (cmd) {
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220 | bc0b1dc1 | bellard | case 0x00: |
221 | bc0b1dc1 | bellard | case 0x03: |
222 | bc0b1dc1 | bellard | case 0xe7: |
223 | bc0b1dc1 | bellard | /* IMS uses those when probing for sound devices */
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224 | bc0b1dc1 | bellard | return;
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225 | bc0b1dc1 | bellard | |
226 | 27503323 | bellard | case 0x10: |
227 | 5e2a6443 | bellard | dsp->needed_bytes = 1;
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228 | 27503323 | bellard | break;
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229 | 27503323 | bellard | |
230 | 27503323 | bellard | case 0x14: |
231 | 5e2a6443 | bellard | dsp->needed_bytes = 2;
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232 | 5e2a6443 | bellard | dsp->dma_buffer_size = 0;
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233 | 27503323 | bellard | break;
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234 | 27503323 | bellard | |
235 | 27503323 | bellard | case 0x20: |
236 | 202a456a | bellard | dsp_out_data(dsp, 0xff);
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237 | 27503323 | bellard | break;
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238 | 27503323 | bellard | |
239 | 27503323 | bellard | case 0x35: |
240 | 27503323 | bellard | lwarn ("MIDI commands not implemented\n");
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241 | 27503323 | bellard | break;
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242 | 27503323 | bellard | |
243 | 27503323 | bellard | case 0x40: |
244 | 5e2a6443 | bellard | dsp->freq = -1;
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245 | 5e2a6443 | bellard | dsp->time_const = -1;
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246 | 5e2a6443 | bellard | dsp->needed_bytes = 1;
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247 | 27503323 | bellard | break;
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248 | 27503323 | bellard | |
249 | 27503323 | bellard | case 0x41: |
250 | 27503323 | bellard | case 0x42: |
251 | 5e2a6443 | bellard | dsp->freq = -1;
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252 | 5e2a6443 | bellard | dsp->time_const = -1;
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253 | 5e2a6443 | bellard | dsp->needed_bytes = 2;
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254 | 27503323 | bellard | break;
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255 | 27503323 | bellard | |
256 | 27503323 | bellard | case 0x47: /* Continue Auto-Initialize DMA 16bit */ |
257 | 27503323 | bellard | break;
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258 | 27503323 | bellard | |
259 | 27503323 | bellard | case 0x48: |
260 | 5e2a6443 | bellard | dsp->needed_bytes = 2;
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261 | 27503323 | bellard | break;
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262 | 27503323 | bellard | |
263 | 27503323 | bellard | case 0x27: /* ????????? */ |
264 | 27503323 | bellard | case 0x4e: |
265 | 27503323 | bellard | return;
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266 | 27503323 | bellard | |
267 | 27503323 | bellard | case 0x80: |
268 | 5e2a6443 | bellard | cmd = -1;
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269 | 27503323 | bellard | break;
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270 | 27503323 | bellard | |
271 | 27503323 | bellard | case 0x90: |
272 | 27503323 | bellard | case 0x91: |
273 | 27503323 | bellard | { |
274 | 27503323 | bellard | uint8_t d0; |
275 | 27503323 | bellard | |
276 | 27503323 | bellard | d0 = 4;
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277 | 5e2a6443 | bellard | if (dsp->fmt_signed) d0 |= 16; |
278 | 5e2a6443 | bellard | if (dsp->fmt_stereo) d0 |= 32; |
279 | 27503323 | bellard | dma_cmd (cmd == 0x90 ? 0xc4 : 0xc0, d0, -1); |
280 | 5e2a6443 | bellard | cmd = -1;
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281 | 27503323 | bellard | break;
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282 | 27503323 | bellard | } |
283 | 27503323 | bellard | |
284 | 27503323 | bellard | case 0xd0: /* XXX */ |
285 | 27503323 | bellard | control (0);
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286 | 27503323 | bellard | return;
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287 | 27503323 | bellard | |
288 | 27503323 | bellard | case 0xd1: |
289 | 5e2a6443 | bellard | dsp->speaker = 1;
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290 | 27503323 | bellard | break;
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291 | 27503323 | bellard | |
292 | 27503323 | bellard | case 0xd3: |
293 | 5e2a6443 | bellard | dsp->speaker = 0;
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294 | 27503323 | bellard | return;
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295 | 27503323 | bellard | |
296 | 27503323 | bellard | case 0xd4: |
297 | 27503323 | bellard | control (1);
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298 | 27503323 | bellard | break;
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299 | 27503323 | bellard | |
300 | 27503323 | bellard | case 0xd5: |
301 | 27503323 | bellard | control (0);
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302 | 27503323 | bellard | break;
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303 | 27503323 | bellard | |
304 | 27503323 | bellard | case 0xd6: |
305 | 27503323 | bellard | control (1);
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306 | 27503323 | bellard | break;
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307 | 27503323 | bellard | |
308 | 27503323 | bellard | case 0xd9: |
309 | 27503323 | bellard | control (0);
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310 | 5e2a6443 | bellard | dsp->dma_auto = 0;
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311 | 27503323 | bellard | return;
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312 | 27503323 | bellard | |
313 | 27503323 | bellard | case 0xda: |
314 | 27503323 | bellard | control (0);
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315 | 5e2a6443 | bellard | dsp->dma_auto = 0;
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316 | 27503323 | bellard | break;
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317 | 27503323 | bellard | |
318 | 27503323 | bellard | case 0xe0: |
319 | 5e2a6443 | bellard | dsp->needed_bytes = 1;
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320 | 27503323 | bellard | break;
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321 | 27503323 | bellard | |
322 | 27503323 | bellard | case 0xe1: |
323 | 202a456a | bellard | dsp_out_data(dsp, sb.ver_lo); |
324 | 202a456a | bellard | dsp_out_data(dsp, sb.ver_hi); |
325 | 27503323 | bellard | return;
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326 | 27503323 | bellard | |
327 | 27503323 | bellard | case 0xf2: |
328 | 202a456a | bellard | dsp_out_data(dsp, 0xaa);
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329 | 5e2a6443 | bellard | dsp->mixer_regs[0x82] |= dsp->mixer_regs[0x80]; |
330 | 27503323 | bellard | pic_set_irq (sb.irq, 1);
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331 | 27503323 | bellard | return;
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332 | 27503323 | bellard | |
333 | 27503323 | bellard | default:
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334 | 5e2a6443 | bellard | log("%#x is unknown", cmd);
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335 | 27503323 | bellard | goto error;
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336 | 27503323 | bellard | } |
337 | 27503323 | bellard | } |
338 | 5e2a6443 | bellard | dsp->cmd = cmd; |
339 | 27503323 | bellard | return;
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340 | 27503323 | bellard | |
341 | 27503323 | bellard | error:
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342 | 27503323 | bellard | return;
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343 | 27503323 | bellard | } |
344 | 27503323 | bellard | |
345 | 5e2a6443 | bellard | static void complete (SB16State *dsp) |
346 | 27503323 | bellard | { |
347 | 27503323 | bellard | linfo ("complete command %#x, in_index %d, needed_bytes %d\n",
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348 | 5e2a6443 | bellard | dsp->cmd, dsp->in_index, dsp->needed_bytes); |
349 | 27503323 | bellard | |
350 | 5e2a6443 | bellard | if (dsp->cmd > 0xaf && dsp->cmd < 0xd0) { |
351 | 27503323 | bellard | int d0, d1, d2;
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352 | 27503323 | bellard | |
353 | 5e2a6443 | bellard | d0 = dsp->in_data[0];
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354 | 5e2a6443 | bellard | d1 = dsp->in_data[1];
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355 | 5e2a6443 | bellard | d2 = dsp->in_data[2];
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356 | 27503323 | bellard | |
357 | 27503323 | bellard | ldebug ("d0 = %d, d1 = %d, d2 = %d\n",
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358 | 27503323 | bellard | d0, d1, d2); |
359 | 5e2a6443 | bellard | dma_cmd (dsp->cmd, d0, d1 + (d2 << 8));
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360 | 27503323 | bellard | } |
361 | 27503323 | bellard | else {
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362 | 5e2a6443 | bellard | switch (dsp->cmd) {
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363 | 27503323 | bellard | |
364 | 27503323 | bellard | case 0x10: |
365 | 27503323 | bellard | break;
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366 | 27503323 | bellard | |
367 | 27503323 | bellard | case 0x14: |
368 | 27503323 | bellard | { |
369 | 27503323 | bellard | int d0, d1;
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370 | 27503323 | bellard | int save_left;
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371 | 27503323 | bellard | int save_pos;
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372 | 27503323 | bellard | |
373 | 5e2a6443 | bellard | d0 = dsp->in_data[0];
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374 | 5e2a6443 | bellard | d1 = dsp->in_data[1];
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375 | 27503323 | bellard | |
376 | 5e2a6443 | bellard | save_left = dsp->left_till_irq; |
377 | 5e2a6443 | bellard | save_pos = dsp->dma_pos; |
378 | 27503323 | bellard | dma_cmd (0xc0, 0, d0 + (d1 << 8)); |
379 | 5e2a6443 | bellard | dsp->left_till_irq = save_left; |
380 | 5e2a6443 | bellard | dsp->dma_pos = save_pos; |
381 | 27503323 | bellard | |
382 | 27503323 | bellard | linfo ("set buffer size data[%d, %d] %d pos %d\n",
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383 | 5e2a6443 | bellard | d0, d1, dsp->dma_buffer_size, dsp->dma_pos); |
384 | 27503323 | bellard | break;
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385 | 27503323 | bellard | } |
386 | 27503323 | bellard | |
387 | 27503323 | bellard | case 0x40: |
388 | 5e2a6443 | bellard | dsp->time_const = dsp->in_data[0];
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389 | 5e2a6443 | bellard | linfo ("set time const %d\n", dsp->time_const);
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390 | 27503323 | bellard | break;
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391 | 27503323 | bellard | |
392 | 27503323 | bellard | case 0x41: |
393 | 27503323 | bellard | case 0x42: |
394 | 5e2a6443 | bellard | dsp->freq = dsp->in_data[1] + (dsp->in_data[0] << 8); |
395 | 27503323 | bellard | linfo ("set freq %#x, %#x = %d\n",
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396 | 5e2a6443 | bellard | dsp->in_data[1], dsp->in_data[0], dsp->freq); |
397 | 27503323 | bellard | break;
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398 | 27503323 | bellard | |
399 | 27503323 | bellard | case 0x48: |
400 | 5e2a6443 | bellard | dsp->dma_buffer_size = dsp->in_data[1] + (dsp->in_data[0] << 8); |
401 | 27503323 | bellard | linfo ("set dma len %#x, %#x = %d\n",
|
402 | 5e2a6443 | bellard | dsp->in_data[1], dsp->in_data[0], dsp->dma_buffer_size); |
403 | 27503323 | bellard | break;
|
404 | 27503323 | bellard | |
405 | 27503323 | bellard | case 0xe0: |
406 | 202a456a | bellard | dsp->out_data_len = 0;
|
407 | 5e2a6443 | bellard | linfo ("data = %#x\n", dsp->in_data[0]); |
408 | 202a456a | bellard | dsp_out_data(dsp, dsp->in_data[0] ^ 0xff); |
409 | 27503323 | bellard | break;
|
410 | 27503323 | bellard | |
411 | 27503323 | bellard | default:
|
412 | 5e2a6443 | bellard | log ("unrecognized command %#x", dsp->cmd);
|
413 | 5e2a6443 | bellard | return;
|
414 | 27503323 | bellard | } |
415 | 27503323 | bellard | } |
416 | 27503323 | bellard | |
417 | 5e2a6443 | bellard | dsp->cmd = -1;
|
418 | 27503323 | bellard | return;
|
419 | 27503323 | bellard | } |
420 | 27503323 | bellard | |
421 | 27503323 | bellard | static IO_WRITE_PROTO (dsp_write)
|
422 | 27503323 | bellard | { |
423 | 5e2a6443 | bellard | SB16State *dsp = opaque; |
424 | 27503323 | bellard | int iport;
|
425 | 27503323 | bellard | |
426 | 27503323 | bellard | iport = nport - sb.port; |
427 | 27503323 | bellard | |
428 | 27503323 | bellard | switch (iport) {
|
429 | 27503323 | bellard | case 0x6: |
430 | 27503323 | bellard | if (0 == val) |
431 | 5e2a6443 | bellard | dsp->v2x6 = 0;
|
432 | 5e2a6443 | bellard | else if ((1 == val) && (0 == dsp->v2x6)) { |
433 | 5e2a6443 | bellard | dsp->v2x6 = 1;
|
434 | 202a456a | bellard | dsp_out_data(dsp, 0xaa);
|
435 | 27503323 | bellard | } |
436 | 27503323 | bellard | else
|
437 | 5e2a6443 | bellard | dsp->v2x6 = ~0;
|
438 | 27503323 | bellard | break;
|
439 | 27503323 | bellard | |
440 | 27503323 | bellard | case 0xc: /* write data or command | write status */ |
441 | 5e2a6443 | bellard | if (0 == dsp->needed_bytes) { |
442 | 5e2a6443 | bellard | command (dsp, val); |
443 | 5e2a6443 | bellard | if (0 == dsp->needed_bytes) { |
444 | 5e2a6443 | bellard | log_dsp (dsp); |
445 | 27503323 | bellard | } |
446 | 27503323 | bellard | } |
447 | 27503323 | bellard | else {
|
448 | 5e2a6443 | bellard | dsp->in_data[dsp->in_index++] = val; |
449 | 5e2a6443 | bellard | if (dsp->in_index == dsp->needed_bytes) {
|
450 | 5e2a6443 | bellard | dsp->needed_bytes = 0;
|
451 | 5e2a6443 | bellard | dsp->in_index = 0;
|
452 | 5e2a6443 | bellard | complete (dsp); |
453 | 5e2a6443 | bellard | log_dsp (dsp); |
454 | 27503323 | bellard | } |
455 | 27503323 | bellard | } |
456 | 27503323 | bellard | break;
|
457 | 27503323 | bellard | |
458 | 27503323 | bellard | default:
|
459 | 5e2a6443 | bellard | log ("(nport=%#x, val=%#x)", nport, val);
|
460 | 5e2a6443 | bellard | break;
|
461 | 27503323 | bellard | } |
462 | 27503323 | bellard | } |
463 | 27503323 | bellard | |
464 | 27503323 | bellard | static IO_READ_PROTO (dsp_read)
|
465 | 27503323 | bellard | { |
466 | 5e2a6443 | bellard | SB16State *dsp = opaque; |
467 | 27503323 | bellard | int iport, retval;
|
468 | 27503323 | bellard | |
469 | 27503323 | bellard | iport = nport - sb.port; |
470 | 27503323 | bellard | |
471 | 27503323 | bellard | switch (iport) {
|
472 | 27503323 | bellard | |
473 | 27503323 | bellard | case 0x6: /* reset */ |
474 | 27503323 | bellard | return 0; |
475 | 27503323 | bellard | |
476 | 27503323 | bellard | case 0xa: /* read data */ |
477 | 5e2a6443 | bellard | if (dsp->out_data_len) {
|
478 | 5e2a6443 | bellard | retval = dsp->out_data[--dsp->out_data_len]; |
479 | 5e2a6443 | bellard | } else {
|
480 | 5e2a6443 | bellard | log("empty output buffer\n");
|
481 | 27503323 | bellard | goto error;
|
482 | 27503323 | bellard | } |
483 | 27503323 | bellard | break;
|
484 | 27503323 | bellard | |
485 | 27503323 | bellard | case 0xc: /* 0 can write */ |
486 | 27503323 | bellard | retval = 0;
|
487 | 27503323 | bellard | break;
|
488 | 27503323 | bellard | |
489 | 27503323 | bellard | case 0xd: /* timer interrupt clear */ |
490 | 5e2a6443 | bellard | log("timer interrupt clear\n");
|
491 | 27503323 | bellard | goto error;
|
492 | 27503323 | bellard | |
493 | 27503323 | bellard | case 0xe: /* data available status | irq 8 ack */ |
494 | bc0b1dc1 | bellard | /* XXX drop pic irq line here? */
|
495 | bc0b1dc1 | bellard | ldebug ("8 ack\n");
|
496 | 5e2a6443 | bellard | retval = (0 == dsp->out_data_len) ? 0 : 0x80; |
497 | 5e2a6443 | bellard | dsp->mixer_regs[0x82] &= ~dsp->mixer_regs[0x80]; |
498 | bc0b1dc1 | bellard | pic_set_irq (sb.irq, 0);
|
499 | 27503323 | bellard | break;
|
500 | 27503323 | bellard | |
501 | 27503323 | bellard | case 0xf: /* irq 16 ack */ |
502 | bc0b1dc1 | bellard | /* XXX drop pic irq line here? */
|
503 | 27503323 | bellard | ldebug ("16 ack\n");
|
504 | bc0b1dc1 | bellard | retval = 0xff;
|
505 | 5e2a6443 | bellard | dsp->mixer_regs[0x82] &= ~dsp->mixer_regs[0x80]; |
506 | bc0b1dc1 | bellard | pic_set_irq (sb.irq, 0);
|
507 | 27503323 | bellard | break;
|
508 | 27503323 | bellard | |
509 | 27503323 | bellard | default:
|
510 | 27503323 | bellard | goto error;
|
511 | 27503323 | bellard | } |
512 | 27503323 | bellard | |
513 | 27503323 | bellard | if ((0xc != iport) && (0xe != iport)) { |
514 | bc0b1dc1 | bellard | ldebug ("nport=%#x iport %#x = %#x\n",
|
515 | bc0b1dc1 | bellard | nport, iport, retval); |
516 | 27503323 | bellard | } |
517 | 27503323 | bellard | |
518 | 27503323 | bellard | return retval;
|
519 | 27503323 | bellard | |
520 | 27503323 | bellard | error:
|
521 | 5e2a6443 | bellard | return 0; |
522 | 27503323 | bellard | } |
523 | 27503323 | bellard | |
524 | 27503323 | bellard | static IO_WRITE_PROTO(mixer_write_indexb)
|
525 | 27503323 | bellard | { |
526 | 5e2a6443 | bellard | SB16State *dsp = opaque; |
527 | 202a456a | bellard | dsp->mixer_nreg = val; |
528 | 27503323 | bellard | } |
529 | 27503323 | bellard | |
530 | 27503323 | bellard | static IO_WRITE_PROTO(mixer_write_datab)
|
531 | 27503323 | bellard | { |
532 | 5e2a6443 | bellard | SB16State *dsp = opaque; |
533 | 202a456a | bellard | |
534 | 202a456a | bellard | if (dsp->mixer_nreg > 0x83) |
535 | 202a456a | bellard | return;
|
536 | 5e2a6443 | bellard | dsp->mixer_regs[dsp->mixer_nreg] = val; |
537 | 27503323 | bellard | } |
538 | 27503323 | bellard | |
539 | 27503323 | bellard | static IO_WRITE_PROTO(mixer_write_indexw)
|
540 | 27503323 | bellard | { |
541 | 7d977de7 | bellard | mixer_write_indexb (opaque, nport, val & 0xff);
|
542 | 7d977de7 | bellard | mixer_write_datab (opaque, nport, (val >> 8) & 0xff); |
543 | 27503323 | bellard | } |
544 | 27503323 | bellard | |
545 | 27503323 | bellard | static IO_READ_PROTO(mixer_read)
|
546 | 27503323 | bellard | { |
547 | 5e2a6443 | bellard | SB16State *dsp = opaque; |
548 | 5e2a6443 | bellard | return dsp->mixer_regs[dsp->mixer_nreg];
|
549 | 27503323 | bellard | } |
550 | 27503323 | bellard | |
551 | 27503323 | bellard | void SB16_run (void) |
552 | 27503323 | bellard | { |
553 | 27503323 | bellard | if (0 == dsp.speaker) |
554 | 27503323 | bellard | return;
|
555 | 27503323 | bellard | |
556 | 27503323 | bellard | AUD_run (); |
557 | 27503323 | bellard | } |
558 | 27503323 | bellard | |
559 | 27503323 | bellard | static int write_audio (uint32_t addr, int len, int size) |
560 | 27503323 | bellard | { |
561 | 27503323 | bellard | int temp, net;
|
562 | f9e92e97 | bellard | uint8_t tmpbuf[4096];
|
563 | 27503323 | bellard | |
564 | 27503323 | bellard | temp = size; |
565 | 27503323 | bellard | |
566 | 27503323 | bellard | net = 0;
|
567 | 27503323 | bellard | |
568 | 27503323 | bellard | while (temp) {
|
569 | 27503323 | bellard | int left_till_end;
|
570 | 27503323 | bellard | int to_copy;
|
571 | 27503323 | bellard | int copied;
|
572 | 27503323 | bellard | |
573 | 27503323 | bellard | left_till_end = len - dsp.dma_pos; |
574 | 27503323 | bellard | |
575 | 27503323 | bellard | to_copy = MIN (temp, left_till_end); |
576 | f9e92e97 | bellard | if (to_copy > sizeof(tmpbuf)) |
577 | f9e92e97 | bellard | to_copy = sizeof(tmpbuf);
|
578 | f9e92e97 | bellard | cpu_physical_memory_read(addr + dsp.dma_pos, tmpbuf, to_copy); |
579 | f9e92e97 | bellard | copied = AUD_write (tmpbuf, to_copy); |
580 | 27503323 | bellard | |
581 | 27503323 | bellard | temp -= copied; |
582 | 27503323 | bellard | dsp.dma_pos += copied; |
583 | 27503323 | bellard | |
584 | 27503323 | bellard | if (dsp.dma_pos == len) {
|
585 | 27503323 | bellard | dsp.dma_pos = 0;
|
586 | 27503323 | bellard | } |
587 | 27503323 | bellard | |
588 | 27503323 | bellard | net += copied; |
589 | 27503323 | bellard | |
590 | 27503323 | bellard | if (copied != to_copy)
|
591 | 27503323 | bellard | return net;
|
592 | 27503323 | bellard | } |
593 | 27503323 | bellard | |
594 | 27503323 | bellard | return net;
|
595 | 27503323 | bellard | } |
596 | 27503323 | bellard | |
597 | f9e92e97 | bellard | static int SB_read_DMA (void *opaque, target_ulong addr, int size) |
598 | 27503323 | bellard | { |
599 | 5e2a6443 | bellard | SB16State *dsp = opaque; |
600 | 27503323 | bellard | int free, till, copy, written;
|
601 | 27503323 | bellard | |
602 | 5e2a6443 | bellard | if (0 == dsp->speaker) |
603 | 27503323 | bellard | return 0; |
604 | 27503323 | bellard | |
605 | 5e2a6443 | bellard | if (dsp->left_till_irq < 0) { |
606 | 5e2a6443 | bellard | dsp->left_till_irq += dsp->dma_buffer_size; |
607 | 5e2a6443 | bellard | return dsp->dma_pos;
|
608 | 27503323 | bellard | } |
609 | 27503323 | bellard | |
610 | 27503323 | bellard | free = AUD_get_free (); |
611 | 27503323 | bellard | |
612 | 27503323 | bellard | if ((free <= 0) || (0 == size)) { |
613 | 5e2a6443 | bellard | return dsp->dma_pos;
|
614 | 27503323 | bellard | } |
615 | 27503323 | bellard | |
616 | 27503323 | bellard | if (mix_block > 0) { |
617 | 27503323 | bellard | copy = MIN (free, mix_block); |
618 | 27503323 | bellard | } |
619 | 27503323 | bellard | else {
|
620 | 27503323 | bellard | copy = free; |
621 | 27503323 | bellard | } |
622 | 27503323 | bellard | |
623 | 5e2a6443 | bellard | till = dsp->left_till_irq; |
624 | 27503323 | bellard | |
625 | 27503323 | bellard | ldebug ("addr:%#010x free:%d till:%d size:%d\n",
|
626 | 27503323 | bellard | addr, free, till, size); |
627 | 27503323 | bellard | if (till <= copy) {
|
628 | 5e2a6443 | bellard | if (0 == dsp->dma_auto) { |
629 | 27503323 | bellard | copy = till; |
630 | 27503323 | bellard | } |
631 | 27503323 | bellard | } |
632 | 27503323 | bellard | |
633 | 27503323 | bellard | written = write_audio (addr, size, copy); |
634 | 5e2a6443 | bellard | dsp->left_till_irq -= written; |
635 | 27503323 | bellard | AUD_adjust_estimate (free - written); |
636 | 27503323 | bellard | |
637 | 5e2a6443 | bellard | if (dsp->left_till_irq <= 0) { |
638 | 5e2a6443 | bellard | dsp->mixer_regs[0x82] |= dsp->mixer_regs[0x80]; |
639 | bc0b1dc1 | bellard | if (0 == noirq) { |
640 | bc0b1dc1 | bellard | ldebug ("request irq\n");
|
641 | f9e92e97 | bellard | pic_set_irq(sb.irq, 1);
|
642 | bc0b1dc1 | bellard | } |
643 | 27503323 | bellard | |
644 | 5e2a6443 | bellard | if (0 == dsp->dma_auto) { |
645 | 27503323 | bellard | control (0);
|
646 | 27503323 | bellard | } |
647 | 27503323 | bellard | } |
648 | 27503323 | bellard | |
649 | 27503323 | bellard | ldebug ("pos %5d free %5d size %5d till % 5d copy %5d dma size %5d\n",
|
650 | 5e2a6443 | bellard | dsp->dma_pos, free, size, dsp->left_till_irq, copy, |
651 | 5e2a6443 | bellard | dsp->dma_buffer_size); |
652 | 27503323 | bellard | |
653 | 5e2a6443 | bellard | if (dsp->left_till_irq <= 0) { |
654 | 5e2a6443 | bellard | dsp->left_till_irq += dsp->dma_buffer_size; |
655 | 27503323 | bellard | } |
656 | 27503323 | bellard | |
657 | 5e2a6443 | bellard | return dsp->dma_pos;
|
658 | 27503323 | bellard | } |
659 | 27503323 | bellard | |
660 | 27503323 | bellard | static int magic_of_irq (int irq) |
661 | 27503323 | bellard | { |
662 | 27503323 | bellard | switch (irq) {
|
663 | 27503323 | bellard | case 2: |
664 | 27503323 | bellard | return 1; |
665 | 27503323 | bellard | case 5: |
666 | 27503323 | bellard | return 2; |
667 | 27503323 | bellard | case 7: |
668 | 27503323 | bellard | return 4; |
669 | 27503323 | bellard | case 10: |
670 | 27503323 | bellard | return 8; |
671 | 27503323 | bellard | default:
|
672 | 27503323 | bellard | log ("bad irq %d\n", irq);
|
673 | 27503323 | bellard | return 2; |
674 | 27503323 | bellard | } |
675 | 27503323 | bellard | } |
676 | 27503323 | bellard | |
677 | 202a456a | bellard | #if 0
|
678 | 27503323 | bellard | static int irq_of_magic (int magic)
|
679 | 27503323 | bellard | {
|
680 | 27503323 | bellard | switch (magic) {
|
681 | 27503323 | bellard | case 1:
|
682 | 27503323 | bellard | return 2;
|
683 | 27503323 | bellard | case 2:
|
684 | 27503323 | bellard | return 5;
|
685 | 27503323 | bellard | case 4:
|
686 | 27503323 | bellard | return 7;
|
687 | 27503323 | bellard | case 8:
|
688 | 27503323 | bellard | return 10;
|
689 | 27503323 | bellard | default:
|
690 | 27503323 | bellard | log ("bad irq magic %d\n", magic);
|
691 | 27503323 | bellard | return 2;
|
692 | 27503323 | bellard | }
|
693 | 27503323 | bellard | }
|
694 | 202a456a | bellard | #endif
|
695 | 27503323 | bellard | |
696 | 27503323 | bellard | void SB16_init (void) |
697 | 27503323 | bellard | { |
698 | 5e2a6443 | bellard | SB16State *s = &dsp; |
699 | 27503323 | bellard | int i;
|
700 | 27503323 | bellard | static const uint8_t dsp_write_ports[] = {0x6, 0xc}; |
701 | 27503323 | bellard | static const uint8_t dsp_read_ports[] = {0x6, 0xa, 0xc, 0xd, 0xe, 0xf}; |
702 | 27503323 | bellard | |
703 | 202a456a | bellard | memset(s->mixer_regs, 0xff, sizeof(s->mixer_regs)); |
704 | 202a456a | bellard | |
705 | 5e2a6443 | bellard | s->mixer_regs[0x0e] = ~0; |
706 | 5e2a6443 | bellard | s->mixer_regs[0x80] = magic_of_irq (sb.irq);
|
707 | 5e2a6443 | bellard | s->mixer_regs[0x81] = 0x20 | (sb.dma << 1); |
708 | 27503323 | bellard | |
709 | 27503323 | bellard | for (i = 0x30; i < 0x48; i++) { |
710 | 5e2a6443 | bellard | s->mixer_regs[i] = 0x20;
|
711 | 27503323 | bellard | } |
712 | 27503323 | bellard | |
713 | 27503323 | bellard | for (i = 0; i < LENOFA (dsp_write_ports); i++) { |
714 | 5e2a6443 | bellard | register_ioport_write (sb.port + dsp_write_ports[i], 1, 1, dsp_write, s); |
715 | 27503323 | bellard | } |
716 | 27503323 | bellard | |
717 | 27503323 | bellard | for (i = 0; i < LENOFA (dsp_read_ports); i++) { |
718 | 5e2a6443 | bellard | register_ioport_read (sb.port + dsp_read_ports[i], 1, 1, dsp_read, s); |
719 | 27503323 | bellard | } |
720 | 27503323 | bellard | |
721 | 5e2a6443 | bellard | register_ioport_write (sb.port + 0x4, 1, 1, mixer_write_indexb, s); |
722 | 5e2a6443 | bellard | register_ioport_write (sb.port + 0x4, 1, 2, mixer_write_indexw, s); |
723 | 5e2a6443 | bellard | register_ioport_read (sb.port + 0x5, 1, 1, mixer_read, s); |
724 | 5e2a6443 | bellard | register_ioport_write (sb.port + 0x5, 1, 1, mixer_write_datab, s); |
725 | 27503323 | bellard | |
726 | 5e2a6443 | bellard | DMA_register_channel (sb.hdma, SB_read_DMA, s); |
727 | 5e2a6443 | bellard | DMA_register_channel (sb.dma, SB_read_DMA, s); |
728 | 27503323 | bellard | } |