Statistics
| Branch: | Revision:

root / linux-user / main.c @ d64477af

History | View | Annotate | Download (33.4 kB)

1 31e31b8a bellard
/*
2 93ac68bc bellard
 *  qemu user main
3 31e31b8a bellard
 * 
4 31e31b8a bellard
 *  Copyright (c) 2003 Fabrice Bellard
5 31e31b8a bellard
 *
6 31e31b8a bellard
 *  This program is free software; you can redistribute it and/or modify
7 31e31b8a bellard
 *  it under the terms of the GNU General Public License as published by
8 31e31b8a bellard
 *  the Free Software Foundation; either version 2 of the License, or
9 31e31b8a bellard
 *  (at your option) any later version.
10 31e31b8a bellard
 *
11 31e31b8a bellard
 *  This program is distributed in the hope that it will be useful,
12 31e31b8a bellard
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13 31e31b8a bellard
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 31e31b8a bellard
 *  GNU General Public License for more details.
15 31e31b8a bellard
 *
16 31e31b8a bellard
 *  You should have received a copy of the GNU General Public License
17 31e31b8a bellard
 *  along with this program; if not, write to the Free Software
18 31e31b8a bellard
 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 31e31b8a bellard
 */
20 31e31b8a bellard
#include <stdlib.h>
21 31e31b8a bellard
#include <stdio.h>
22 31e31b8a bellard
#include <stdarg.h>
23 04369ff2 bellard
#include <string.h>
24 31e31b8a bellard
#include <errno.h>
25 0ecfa993 bellard
#include <unistd.h>
26 31e31b8a bellard
27 3ef693a0 bellard
#include "qemu.h"
28 31e31b8a bellard
29 3ef693a0 bellard
#define DEBUG_LOGFILE "/tmp/qemu.log"
30 586314f2 bellard
31 74cd30b8 bellard
static const char *interp_prefix = CONFIG_QEMU_PREFIX;
32 586314f2 bellard
33 3a4739d6 bellard
#if defined(__i386__) && !defined(CONFIG_STATIC)
34 f801f97e bellard
/* Force usage of an ELF interpreter even if it is an ELF shared
35 f801f97e bellard
   object ! */
36 f801f97e bellard
const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
37 4304763b bellard
#endif
38 74cd30b8 bellard
39 93ac68bc bellard
/* for recent libc, we add these dummy symbols which are not declared
40 74cd30b8 bellard
   when generating a linked object (bug in ld ?) */
41 74cd30b8 bellard
#if __GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)
42 c6981055 bellard
long __preinit_array_start[0];
43 c6981055 bellard
long __preinit_array_end[0];
44 74cd30b8 bellard
long __init_array_start[0];
45 74cd30b8 bellard
long __init_array_end[0];
46 74cd30b8 bellard
long __fini_array_start[0];
47 74cd30b8 bellard
long __fini_array_end[0];
48 74cd30b8 bellard
#endif
49 74cd30b8 bellard
50 9de5e440 bellard
/* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
51 9de5e440 bellard
   we allocate a bigger stack. Need a better solution, for example
52 9de5e440 bellard
   by remapping the process stack directly at the right place */
53 9de5e440 bellard
unsigned long x86_stack_size = 512 * 1024;
54 31e31b8a bellard
55 31e31b8a bellard
void gemu_log(const char *fmt, ...)
56 31e31b8a bellard
{
57 31e31b8a bellard
    va_list ap;
58 31e31b8a bellard
59 31e31b8a bellard
    va_start(ap, fmt);
60 31e31b8a bellard
    vfprintf(stderr, fmt, ap);
61 31e31b8a bellard
    va_end(ap);
62 31e31b8a bellard
}
63 31e31b8a bellard
64 61190b14 bellard
void cpu_outb(CPUState *env, int addr, int val)
65 367e86e8 bellard
{
66 367e86e8 bellard
    fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
67 367e86e8 bellard
}
68 367e86e8 bellard
69 61190b14 bellard
void cpu_outw(CPUState *env, int addr, int val)
70 367e86e8 bellard
{
71 367e86e8 bellard
    fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
72 367e86e8 bellard
}
73 367e86e8 bellard
74 61190b14 bellard
void cpu_outl(CPUState *env, int addr, int val)
75 367e86e8 bellard
{
76 367e86e8 bellard
    fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
77 367e86e8 bellard
}
78 367e86e8 bellard
79 61190b14 bellard
int cpu_inb(CPUState *env, int addr)
80 367e86e8 bellard
{
81 367e86e8 bellard
    fprintf(stderr, "inb: port=0x%04x\n", addr);
82 367e86e8 bellard
    return 0;
83 367e86e8 bellard
}
84 367e86e8 bellard
85 61190b14 bellard
int cpu_inw(CPUState *env, int addr)
86 367e86e8 bellard
{
87 367e86e8 bellard
    fprintf(stderr, "inw: port=0x%04x\n", addr);
88 367e86e8 bellard
    return 0;
89 367e86e8 bellard
}
90 367e86e8 bellard
91 61190b14 bellard
int cpu_inl(CPUState *env, int addr)
92 367e86e8 bellard
{
93 367e86e8 bellard
    fprintf(stderr, "inl: port=0x%04x\n", addr);
94 367e86e8 bellard
    return 0;
95 367e86e8 bellard
}
96 367e86e8 bellard
97 a541f297 bellard
int cpu_get_pic_interrupt(CPUState *env)
98 92ccca6a bellard
{
99 92ccca6a bellard
    return -1;
100 92ccca6a bellard
}
101 92ccca6a bellard
102 a541f297 bellard
#ifdef TARGET_I386
103 a541f297 bellard
/***********************************************************/
104 a541f297 bellard
/* CPUX86 core interface */
105 a541f297 bellard
106 f4beb510 bellard
static void write_dt(void *ptr, unsigned long addr, unsigned long limit, 
107 f4beb510 bellard
                     int flags)
108 6dbad63e bellard
{
109 f4beb510 bellard
    unsigned int e1, e2;
110 6dbad63e bellard
    e1 = (addr << 16) | (limit & 0xffff);
111 6dbad63e bellard
    e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
112 f4beb510 bellard
    e2 |= flags;
113 f4beb510 bellard
    stl((uint8_t *)ptr, e1);
114 f4beb510 bellard
    stl((uint8_t *)ptr + 4, e2);
115 f4beb510 bellard
}
116 f4beb510 bellard
117 f4beb510 bellard
static void set_gate(void *ptr, unsigned int type, unsigned int dpl, 
118 f4beb510 bellard
                     unsigned long addr, unsigned int sel)
119 f4beb510 bellard
{
120 f4beb510 bellard
    unsigned int e1, e2;
121 f4beb510 bellard
    e1 = (addr & 0xffff) | (sel << 16);
122 f4beb510 bellard
    e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
123 6dbad63e bellard
    stl((uint8_t *)ptr, e1);
124 6dbad63e bellard
    stl((uint8_t *)ptr + 4, e2);
125 6dbad63e bellard
}
126 6dbad63e bellard
127 6dbad63e bellard
uint64_t gdt_table[6];
128 f4beb510 bellard
uint64_t idt_table[256];
129 f4beb510 bellard
130 f4beb510 bellard
/* only dpl matters as we do only user space emulation */
131 f4beb510 bellard
static void set_idt(int n, unsigned int dpl)
132 f4beb510 bellard
{
133 f4beb510 bellard
    set_gate(idt_table + n, 0, dpl, 0, 0);
134 f4beb510 bellard
}
135 31e31b8a bellard
136 89e957e7 bellard
void cpu_loop(CPUX86State *env)
137 1b6b029e bellard
{
138 bc8a22cc bellard
    int trapnr;
139 9de5e440 bellard
    uint8_t *pc;
140 9de5e440 bellard
    target_siginfo_t info;
141 851e67a1 bellard
142 1b6b029e bellard
    for(;;) {
143 bc8a22cc bellard
        trapnr = cpu_x86_exec(env);
144 bc8a22cc bellard
        switch(trapnr) {
145 f4beb510 bellard
        case 0x80:
146 f4beb510 bellard
            /* linux syscall */
147 f4beb510 bellard
            env->regs[R_EAX] = do_syscall(env, 
148 f4beb510 bellard
                                          env->regs[R_EAX], 
149 f4beb510 bellard
                                          env->regs[R_EBX],
150 f4beb510 bellard
                                          env->regs[R_ECX],
151 f4beb510 bellard
                                          env->regs[R_EDX],
152 f4beb510 bellard
                                          env->regs[R_ESI],
153 f4beb510 bellard
                                          env->regs[R_EDI],
154 f4beb510 bellard
                                          env->regs[R_EBP]);
155 f4beb510 bellard
            break;
156 f4beb510 bellard
        case EXCP0B_NOSEG:
157 f4beb510 bellard
        case EXCP0C_STACK:
158 f4beb510 bellard
            info.si_signo = SIGBUS;
159 f4beb510 bellard
            info.si_errno = 0;
160 f4beb510 bellard
            info.si_code = TARGET_SI_KERNEL;
161 f4beb510 bellard
            info._sifields._sigfault._addr = 0;
162 f4beb510 bellard
            queue_signal(info.si_signo, &info);
163 f4beb510 bellard
            break;
164 1b6b029e bellard
        case EXCP0D_GPF:
165 851e67a1 bellard
            if (env->eflags & VM_MASK) {
166 89e957e7 bellard
                handle_vm86_fault(env);
167 1b6b029e bellard
            } else {
168 f4beb510 bellard
                info.si_signo = SIGSEGV;
169 f4beb510 bellard
                info.si_errno = 0;
170 f4beb510 bellard
                info.si_code = TARGET_SI_KERNEL;
171 f4beb510 bellard
                info._sifields._sigfault._addr = 0;
172 f4beb510 bellard
                queue_signal(info.si_signo, &info);
173 1b6b029e bellard
            }
174 1b6b029e bellard
            break;
175 b689bc57 bellard
        case EXCP0E_PAGE:
176 b689bc57 bellard
            info.si_signo = SIGSEGV;
177 b689bc57 bellard
            info.si_errno = 0;
178 b689bc57 bellard
            if (!(env->error_code & 1))
179 b689bc57 bellard
                info.si_code = TARGET_SEGV_MAPERR;
180 b689bc57 bellard
            else
181 b689bc57 bellard
                info.si_code = TARGET_SEGV_ACCERR;
182 970a87a6 bellard
            info._sifields._sigfault._addr = env->cr[2];
183 b689bc57 bellard
            queue_signal(info.si_signo, &info);
184 b689bc57 bellard
            break;
185 9de5e440 bellard
        case EXCP00_DIVZ:
186 bc8a22cc bellard
            if (env->eflags & VM_MASK) {
187 447db213 bellard
                handle_vm86_trap(env, trapnr);
188 bc8a22cc bellard
            } else {
189 bc8a22cc bellard
                /* division by zero */
190 bc8a22cc bellard
                info.si_signo = SIGFPE;
191 bc8a22cc bellard
                info.si_errno = 0;
192 bc8a22cc bellard
                info.si_code = TARGET_FPE_INTDIV;
193 bc8a22cc bellard
                info._sifields._sigfault._addr = env->eip;
194 bc8a22cc bellard
                queue_signal(info.si_signo, &info);
195 bc8a22cc bellard
            }
196 9de5e440 bellard
            break;
197 447db213 bellard
        case EXCP01_SSTP:
198 447db213 bellard
        case EXCP03_INT3:
199 447db213 bellard
            if (env->eflags & VM_MASK) {
200 447db213 bellard
                handle_vm86_trap(env, trapnr);
201 447db213 bellard
            } else {
202 447db213 bellard
                info.si_signo = SIGTRAP;
203 447db213 bellard
                info.si_errno = 0;
204 447db213 bellard
                if (trapnr == EXCP01_SSTP) {
205 447db213 bellard
                    info.si_code = TARGET_TRAP_BRKPT;
206 447db213 bellard
                    info._sifields._sigfault._addr = env->eip;
207 447db213 bellard
                } else {
208 447db213 bellard
                    info.si_code = TARGET_SI_KERNEL;
209 447db213 bellard
                    info._sifields._sigfault._addr = 0;
210 447db213 bellard
                }
211 447db213 bellard
                queue_signal(info.si_signo, &info);
212 447db213 bellard
            }
213 447db213 bellard
            break;
214 9de5e440 bellard
        case EXCP04_INTO:
215 9de5e440 bellard
        case EXCP05_BOUND:
216 bc8a22cc bellard
            if (env->eflags & VM_MASK) {
217 447db213 bellard
                handle_vm86_trap(env, trapnr);
218 bc8a22cc bellard
            } else {
219 bc8a22cc bellard
                info.si_signo = SIGSEGV;
220 bc8a22cc bellard
                info.si_errno = 0;
221 b689bc57 bellard
                info.si_code = TARGET_SI_KERNEL;
222 bc8a22cc bellard
                info._sifields._sigfault._addr = 0;
223 bc8a22cc bellard
                queue_signal(info.si_signo, &info);
224 bc8a22cc bellard
            }
225 9de5e440 bellard
            break;
226 9de5e440 bellard
        case EXCP06_ILLOP:
227 9de5e440 bellard
            info.si_signo = SIGILL;
228 9de5e440 bellard
            info.si_errno = 0;
229 9de5e440 bellard
            info.si_code = TARGET_ILL_ILLOPN;
230 9de5e440 bellard
            info._sifields._sigfault._addr = env->eip;
231 9de5e440 bellard
            queue_signal(info.si_signo, &info);
232 9de5e440 bellard
            break;
233 9de5e440 bellard
        case EXCP_INTERRUPT:
234 9de5e440 bellard
            /* just indicate that signals should be handled asap */
235 9de5e440 bellard
            break;
236 1b6b029e bellard
        default:
237 970a87a6 bellard
            pc = env->segs[R_CS].base + env->eip;
238 bc8a22cc bellard
            fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n", 
239 bc8a22cc bellard
                    (long)pc, trapnr);
240 1b6b029e bellard
            abort();
241 1b6b029e bellard
        }
242 66fb9763 bellard
        process_pending_signals(env);
243 1b6b029e bellard
    }
244 1b6b029e bellard
}
245 b346ff46 bellard
#endif
246 b346ff46 bellard
247 b346ff46 bellard
#ifdef TARGET_ARM
248 b346ff46 bellard
249 b346ff46 bellard
void cpu_loop(CPUARMState *env)
250 b346ff46 bellard
{
251 b346ff46 bellard
    int trapnr;
252 b346ff46 bellard
    unsigned int n, insn;
253 b346ff46 bellard
    target_siginfo_t info;
254 b346ff46 bellard
    
255 b346ff46 bellard
    for(;;) {
256 b346ff46 bellard
        trapnr = cpu_arm_exec(env);
257 b346ff46 bellard
        switch(trapnr) {
258 b346ff46 bellard
        case EXCP_UDEF:
259 c6981055 bellard
            {
260 c6981055 bellard
                TaskState *ts = env->opaque;
261 c6981055 bellard
                uint32_t opcode;
262 c6981055 bellard
263 c6981055 bellard
                /* we handle the FPU emulation here, as Linux */
264 c6981055 bellard
                /* we get the opcode */
265 c6981055 bellard
                opcode = ldl_raw((uint8_t *)env->regs[15]);
266 c6981055 bellard
                
267 c6981055 bellard
                if (EmulateAll(opcode, &ts->fpa, env->regs) == 0) {
268 c6981055 bellard
                    info.si_signo = SIGILL;
269 c6981055 bellard
                    info.si_errno = 0;
270 c6981055 bellard
                    info.si_code = TARGET_ILL_ILLOPN;
271 c6981055 bellard
                    info._sifields._sigfault._addr = env->regs[15];
272 c6981055 bellard
                    queue_signal(info.si_signo, &info);
273 c6981055 bellard
                } else {
274 c6981055 bellard
                    /* increment PC */
275 c6981055 bellard
                    env->regs[15] += 4;
276 c6981055 bellard
                }
277 c6981055 bellard
            }
278 b346ff46 bellard
            break;
279 b346ff46 bellard
        case EXCP_SWI:
280 b346ff46 bellard
            {
281 b346ff46 bellard
                /* system call */
282 b346ff46 bellard
                insn = ldl((void *)(env->regs[15] - 4));
283 b346ff46 bellard
                n = insn & 0xffffff;
284 b346ff46 bellard
                if (n >= ARM_SYSCALL_BASE) {
285 b346ff46 bellard
                    /* linux syscall */
286 b346ff46 bellard
                    n -= ARM_SYSCALL_BASE;
287 b346ff46 bellard
                    env->regs[0] = do_syscall(env, 
288 b346ff46 bellard
                                              n, 
289 b346ff46 bellard
                                              env->regs[0],
290 b346ff46 bellard
                                              env->regs[1],
291 b346ff46 bellard
                                              env->regs[2],
292 b346ff46 bellard
                                              env->regs[3],
293 b346ff46 bellard
                                              env->regs[4],
294 b346ff46 bellard
                                              0);
295 b346ff46 bellard
                } else {
296 b346ff46 bellard
                    goto error;
297 b346ff46 bellard
                }
298 b346ff46 bellard
            }
299 b346ff46 bellard
            break;
300 43fff238 bellard
        case EXCP_INTERRUPT:
301 43fff238 bellard
            /* just indicate that signals should be handled asap */
302 43fff238 bellard
            break;
303 b346ff46 bellard
        default:
304 b346ff46 bellard
        error:
305 b346ff46 bellard
            fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", 
306 b346ff46 bellard
                    trapnr);
307 b346ff46 bellard
            cpu_arm_dump_state(env, stderr, 0);
308 b346ff46 bellard
            abort();
309 b346ff46 bellard
        }
310 b346ff46 bellard
        process_pending_signals(env);
311 b346ff46 bellard
    }
312 b346ff46 bellard
}
313 b346ff46 bellard
314 b346ff46 bellard
#endif
315 1b6b029e bellard
316 93ac68bc bellard
#ifdef TARGET_SPARC
317 93ac68bc bellard
318 060366c5 bellard
//#define DEBUG_WIN
319 060366c5 bellard
320 060366c5 bellard
/* WARNING: dealing with register windows _is_ complicated */
321 060366c5 bellard
static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
322 060366c5 bellard
{
323 060366c5 bellard
    index = (index + cwp * 16) & (16 * NWINDOWS - 1);
324 060366c5 bellard
    /* wrap handling : if cwp is on the last window, then we use the
325 060366c5 bellard
       registers 'after' the end */
326 060366c5 bellard
    if (index < 8 && env->cwp == (NWINDOWS - 1))
327 060366c5 bellard
        index += (16 * NWINDOWS);
328 060366c5 bellard
    return index;
329 060366c5 bellard
}
330 060366c5 bellard
331 060366c5 bellard
static inline void save_window_offset(CPUSPARCState *env, int offset)
332 060366c5 bellard
{
333 060366c5 bellard
    unsigned int new_wim, i, cwp1;
334 060366c5 bellard
    uint32_t *sp_ptr;
335 060366c5 bellard
    
336 060366c5 bellard
    new_wim = ((env->wim >> 1) | (env->wim << (NWINDOWS - 1))) &
337 060366c5 bellard
        ((1LL << NWINDOWS) - 1);
338 060366c5 bellard
    /* save the window */
339 060366c5 bellard
    cwp1 = (env->cwp + offset) & (NWINDOWS - 1);
340 060366c5 bellard
    sp_ptr = (uint32_t *)(env->regbase[get_reg_index(env, cwp1, 6)]);
341 060366c5 bellard
#if defined(DEBUG_WIN)
342 060366c5 bellard
    printf("win_overflow: sp_ptr=0x%x save_cwp=%d\n", 
343 060366c5 bellard
           (int)sp_ptr, cwp1);
344 060366c5 bellard
#endif
345 060366c5 bellard
    for(i = 0; i < 16; i++)
346 060366c5 bellard
        stl_raw(sp_ptr + i, env->regbase[get_reg_index(env, cwp1, 8 + i)]);
347 060366c5 bellard
    env->wim = new_wim;
348 060366c5 bellard
}
349 060366c5 bellard
350 060366c5 bellard
static void save_window(CPUSPARCState *env)
351 060366c5 bellard
{
352 060366c5 bellard
    save_window_offset(env, 2);
353 060366c5 bellard
}
354 060366c5 bellard
355 060366c5 bellard
static void restore_window(CPUSPARCState *env)
356 060366c5 bellard
{
357 060366c5 bellard
    unsigned int new_wim, i, cwp1;
358 060366c5 bellard
    uint32_t *sp_ptr;
359 060366c5 bellard
    
360 060366c5 bellard
    new_wim = ((env->wim << 1) | (env->wim >> (NWINDOWS - 1))) &
361 060366c5 bellard
        ((1LL << NWINDOWS) - 1);
362 060366c5 bellard
    
363 060366c5 bellard
    /* restore the invalid window */
364 060366c5 bellard
    cwp1 = (env->cwp + 1) & (NWINDOWS - 1);
365 060366c5 bellard
    sp_ptr = (uint32_t *)(env->regbase[get_reg_index(env, cwp1, 6)]);
366 060366c5 bellard
#if defined(DEBUG_WIN)
367 060366c5 bellard
    printf("win_underflow: sp_ptr=0x%x load_cwp=%d\n", 
368 060366c5 bellard
           (int)sp_ptr, cwp1);
369 060366c5 bellard
#endif
370 060366c5 bellard
    for(i = 0; i < 16; i++)
371 060366c5 bellard
        env->regbase[get_reg_index(env, cwp1, 8 + i)] = ldl_raw(sp_ptr + i);
372 060366c5 bellard
    env->wim = new_wim;
373 060366c5 bellard
}
374 060366c5 bellard
375 060366c5 bellard
static void flush_windows(CPUSPARCState *env)
376 060366c5 bellard
{
377 060366c5 bellard
    int offset, cwp1;
378 060366c5 bellard
#if defined(DEBUG_WIN)
379 060366c5 bellard
    printf("flush_windows:\n");
380 060366c5 bellard
#endif
381 060366c5 bellard
    offset = 2;
382 060366c5 bellard
    for(;;) {
383 060366c5 bellard
        /* if restore would invoke restore_window(), then we can stop */
384 060366c5 bellard
        cwp1 = (env->cwp + 1) & (NWINDOWS - 1);
385 060366c5 bellard
        if (env->wim & (1 << cwp1))
386 060366c5 bellard
            break;
387 060366c5 bellard
#if defined(DEBUG_WIN)
388 060366c5 bellard
        printf("offset=%d: ", offset);
389 060366c5 bellard
#endif
390 060366c5 bellard
        save_window_offset(env, offset);
391 060366c5 bellard
        offset++;
392 060366c5 bellard
    }
393 060366c5 bellard
}
394 060366c5 bellard
395 93ac68bc bellard
void cpu_loop (CPUSPARCState *env)
396 93ac68bc bellard
{
397 060366c5 bellard
    int trapnr, ret;
398 060366c5 bellard
    
399 060366c5 bellard
    while (1) {
400 060366c5 bellard
        trapnr = cpu_sparc_exec (env);
401 060366c5 bellard
        
402 060366c5 bellard
        switch (trapnr) {
403 060366c5 bellard
        case 0x88: 
404 060366c5 bellard
        case 0x90:
405 060366c5 bellard
            ret = do_syscall (env, env->gregs[1],
406 060366c5 bellard
                              env->regwptr[0], env->regwptr[1], 
407 060366c5 bellard
                              env->regwptr[2], env->regwptr[3], 
408 060366c5 bellard
                              env->regwptr[4], env->regwptr[5]);
409 060366c5 bellard
            if ((unsigned int)ret >= (unsigned int)(-515)) {
410 060366c5 bellard
                env->psr |= PSR_CARRY;
411 060366c5 bellard
                ret = -ret;
412 060366c5 bellard
            } else {
413 060366c5 bellard
                env->psr &= ~PSR_CARRY;
414 060366c5 bellard
            }
415 060366c5 bellard
            env->regwptr[0] = ret;
416 060366c5 bellard
            /* next instruction */
417 060366c5 bellard
            env->pc = env->npc;
418 060366c5 bellard
            env->npc = env->npc + 4;
419 060366c5 bellard
            break;
420 060366c5 bellard
        case 0x83: /* flush windows */
421 060366c5 bellard
            //            flush_windows(env);
422 060366c5 bellard
            /* next instruction */
423 060366c5 bellard
            env->pc = env->npc;
424 060366c5 bellard
            env->npc = env->npc + 4;
425 060366c5 bellard
            break;
426 060366c5 bellard
        case TT_WIN_OVF: /* window overflow */
427 060366c5 bellard
            save_window(env);
428 060366c5 bellard
            break;
429 060366c5 bellard
        case TT_WIN_UNF: /* window underflow */
430 060366c5 bellard
            restore_window(env);
431 060366c5 bellard
            break;
432 060366c5 bellard
        default:
433 060366c5 bellard
            printf ("Unhandled trap: 0x%x\n", trapnr);
434 060366c5 bellard
            cpu_sparc_dump_state(env, stderr, 0);
435 060366c5 bellard
            exit (1);
436 060366c5 bellard
        }
437 060366c5 bellard
        process_pending_signals (env);
438 060366c5 bellard
    }
439 93ac68bc bellard
}
440 93ac68bc bellard
441 93ac68bc bellard
#endif
442 93ac68bc bellard
443 67867308 bellard
#ifdef TARGET_PPC
444 67867308 bellard
void cpu_loop(CPUPPCState *env)
445 67867308 bellard
{
446 67867308 bellard
    target_siginfo_t info;
447 61190b14 bellard
    int trapnr;
448 61190b14 bellard
    uint32_t ret;
449 67867308 bellard
    
450 67867308 bellard
    for(;;) {
451 67867308 bellard
        trapnr = cpu_ppc_exec(env);
452 61190b14 bellard
        if (trapnr != EXCP_SYSCALL_USER && trapnr != EXCP_BRANCH &&
453 61190b14 bellard
            trapnr != EXCP_TRACE) {
454 61190b14 bellard
            if (loglevel > 0) {
455 61190b14 bellard
                cpu_ppc_dump_state(env, logfile, 0);
456 61190b14 bellard
            }
457 61190b14 bellard
        }
458 67867308 bellard
        switch(trapnr) {
459 67867308 bellard
        case EXCP_NONE:
460 67867308 bellard
            break;
461 61190b14 bellard
        case EXCP_SYSCALL_USER:
462 61190b14 bellard
            /* system call */
463 61190b14 bellard
            /* WARNING:
464 61190b14 bellard
             * PPC ABI uses overflow flag in cr0 to signal an error
465 61190b14 bellard
             * in syscalls.
466 61190b14 bellard
             */
467 67867308 bellard
#if 0
468 61190b14 bellard
            printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
469 61190b14 bellard
                   env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
470 67867308 bellard
#endif
471 61190b14 bellard
            env->crf[0] &= ~0x1;
472 61190b14 bellard
            ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
473 61190b14 bellard
                             env->gpr[5], env->gpr[6], env->gpr[7],
474 61190b14 bellard
                             env->gpr[8]);
475 61190b14 bellard
            if (ret > (uint32_t)(-515)) {
476 61190b14 bellard
                env->crf[0] |= 0x1;
477 61190b14 bellard
                ret = -ret;
478 61190b14 bellard
            }
479 61190b14 bellard
            env->gpr[3] = ret;
480 61190b14 bellard
#if 0
481 61190b14 bellard
            printf("syscall returned 0x%08x (%d)\n", ret, ret);
482 61190b14 bellard
#endif
483 61190b14 bellard
            break;
484 61190b14 bellard
        case EXCP_RESET:
485 61190b14 bellard
            /* Should not happen ! */
486 61190b14 bellard
            fprintf(stderr, "RESET asked... Stop emulation\n");
487 61190b14 bellard
            if (loglevel)
488 61190b14 bellard
                fprintf(logfile, "RESET asked... Stop emulation\n");
489 67867308 bellard
            abort();
490 61190b14 bellard
        case EXCP_MACHINE_CHECK:
491 61190b14 bellard
            fprintf(stderr, "Machine check exeption...  Stop emulation\n");
492 61190b14 bellard
            if (loglevel)
493 61190b14 bellard
                fprintf(logfile, "RESET asked... Stop emulation\n");
494 61190b14 bellard
            info.si_signo = TARGET_SIGBUS;
495 67867308 bellard
            info.si_errno = 0;
496 61190b14 bellard
            info.si_code = TARGET_BUS_OBJERR;
497 61190b14 bellard
            info._sifields._sigfault._addr = env->nip - 4;
498 61190b14 bellard
            queue_signal(info.si_signo, &info);
499 61190b14 bellard
        case EXCP_DSI:
500 61190b14 bellard
            fprintf(stderr, "Invalid data memory access: 0x%08x\n", env->spr[DAR]);
501 61190b14 bellard
            if (loglevel) {
502 61190b14 bellard
                fprintf(logfile, "Invalid data memory access: 0x%08x\n",
503 61190b14 bellard
                        env->spr[DAR]);
504 61190b14 bellard
            }
505 61190b14 bellard
            switch (env->error_code & 0xF) {
506 61190b14 bellard
            case EXCP_DSI_TRANSLATE:
507 61190b14 bellard
                info.si_signo = TARGET_SIGSEGV;
508 61190b14 bellard
                info.si_errno = 0;
509 61190b14 bellard
                info.si_code = TARGET_SEGV_MAPERR;
510 61190b14 bellard
                break;
511 61190b14 bellard
            case EXCP_DSI_NOTSUP:
512 61190b14 bellard
            case EXCP_DSI_EXTERNAL:
513 61190b14 bellard
                info.si_signo = TARGET_SIGILL;
514 61190b14 bellard
                info.si_errno = 0;
515 61190b14 bellard
                info.si_code = TARGET_ILL_ILLADR;
516 61190b14 bellard
                break;
517 61190b14 bellard
            case EXCP_DSI_PROT: 
518 61190b14 bellard
                info.si_signo = TARGET_SIGSEGV;
519 61190b14 bellard
                info.si_errno = 0;
520 61190b14 bellard
                info.si_code = TARGET_SEGV_ACCERR;
521 61190b14 bellard
                break;
522 61190b14 bellard
            case EXCP_DSI_DABR:
523 61190b14 bellard
                info.si_signo = TARGET_SIGTRAP;
524 61190b14 bellard
                info.si_errno = 0;
525 61190b14 bellard
                info.si_code = TARGET_TRAP_BRKPT;
526 61190b14 bellard
                break;
527 61190b14 bellard
            default:
528 61190b14 bellard
                /* Let's send a regular segfault... */
529 61190b14 bellard
                fprintf(stderr, "Invalid segfault errno (%02x)\n",
530 61190b14 bellard
                        env->error_code);
531 61190b14 bellard
                if (loglevel) {
532 61190b14 bellard
                    fprintf(logfile, "Invalid segfault errno (%02x)\n",
533 61190b14 bellard
                            env->error_code);
534 61190b14 bellard
                }
535 61190b14 bellard
                info.si_signo = TARGET_SIGSEGV;
536 61190b14 bellard
                info.si_errno = 0;
537 61190b14 bellard
                info.si_code = TARGET_SEGV_MAPERR;
538 61190b14 bellard
                break;
539 61190b14 bellard
            }
540 67867308 bellard
            info._sifields._sigfault._addr = env->nip;
541 67867308 bellard
            queue_signal(info.si_signo, &info);
542 67867308 bellard
            break;
543 61190b14 bellard
        case EXCP_ISI:
544 67867308 bellard
            fprintf(stderr, "Invalid instruction fetch\n");
545 61190b14 bellard
            if (loglevel)
546 61190b14 bellard
                fprintf(logfile, "Invalid instruction fetch\n");
547 61190b14 bellard
            switch (env->error_code) {
548 61190b14 bellard
            case EXCP_ISI_TRANSLATE:
549 61190b14 bellard
                info.si_signo = TARGET_SIGSEGV;
550 67867308 bellard
            info.si_errno = 0;
551 61190b14 bellard
                info.si_code = TARGET_SEGV_MAPERR;
552 61190b14 bellard
                break;
553 61190b14 bellard
            case EXCP_ISI_GUARD:
554 61190b14 bellard
                info.si_signo = TARGET_SIGILL;
555 61190b14 bellard
                info.si_errno = 0;
556 61190b14 bellard
                info.si_code = TARGET_ILL_ILLADR;
557 61190b14 bellard
                break;
558 61190b14 bellard
            case EXCP_ISI_NOEXEC:
559 61190b14 bellard
            case EXCP_ISI_PROT:
560 61190b14 bellard
                info.si_signo = TARGET_SIGSEGV;
561 61190b14 bellard
                info.si_errno = 0;
562 61190b14 bellard
                info.si_code = TARGET_SEGV_ACCERR;
563 61190b14 bellard
                break;
564 61190b14 bellard
            default:
565 61190b14 bellard
                /* Let's send a regular segfault... */
566 61190b14 bellard
                fprintf(stderr, "Invalid segfault errno (%02x)\n",
567 61190b14 bellard
                        env->error_code);
568 61190b14 bellard
                if (loglevel) {
569 61190b14 bellard
                    fprintf(logfile, "Invalid segfault errno (%02x)\n",
570 61190b14 bellard
                            env->error_code);
571 61190b14 bellard
                }
572 61190b14 bellard
                info.si_signo = TARGET_SIGSEGV;
573 61190b14 bellard
                info.si_errno = 0;
574 61190b14 bellard
                info.si_code = TARGET_SEGV_MAPERR;
575 61190b14 bellard
                break;
576 61190b14 bellard
            }
577 61190b14 bellard
            info._sifields._sigfault._addr = env->nip - 4;
578 67867308 bellard
            queue_signal(info.si_signo, &info);
579 67867308 bellard
            break;
580 61190b14 bellard
        case EXCP_EXTERNAL:
581 61190b14 bellard
            /* Should not happen ! */
582 61190b14 bellard
            fprintf(stderr, "External interruption... Stop emulation\n");
583 61190b14 bellard
            if (loglevel)
584 61190b14 bellard
                fprintf(logfile, "External interruption... Stop emulation\n");
585 67867308 bellard
            abort();
586 61190b14 bellard
        case EXCP_ALIGN:
587 61190b14 bellard
            fprintf(stderr, "Invalid unaligned memory access\n");
588 61190b14 bellard
            if (loglevel)
589 61190b14 bellard
                fprintf(logfile, "Invalid unaligned memory access\n");
590 61190b14 bellard
            info.si_signo = TARGET_SIGBUS;
591 67867308 bellard
            info.si_errno = 0;
592 61190b14 bellard
            info.si_code = TARGET_BUS_ADRALN;
593 61190b14 bellard
            info._sifields._sigfault._addr = env->nip - 4;
594 67867308 bellard
            queue_signal(info.si_signo, &info);
595 67867308 bellard
            break;
596 61190b14 bellard
        case EXCP_PROGRAM:
597 61190b14 bellard
            switch (env->error_code & ~0xF) {
598 61190b14 bellard
            case EXCP_FP:
599 61190b14 bellard
            fprintf(stderr, "Program exception\n");
600 61190b14 bellard
                if (loglevel)
601 61190b14 bellard
                    fprintf(logfile, "Program exception\n");
602 61190b14 bellard
                /* Set FX */
603 61190b14 bellard
                env->fpscr[7] |= 0x8;
604 61190b14 bellard
                /* Finally, update FEX */
605 61190b14 bellard
                if ((((env->fpscr[7] & 0x3) << 3) | (env->fpscr[6] >> 1)) &
606 61190b14 bellard
                    ((env->fpscr[1] << 1) | (env->fpscr[0] >> 3)))
607 61190b14 bellard
                    env->fpscr[7] |= 0x4;
608 61190b14 bellard
                info.si_signo = TARGET_SIGFPE;
609 61190b14 bellard
                info.si_errno = 0;
610 61190b14 bellard
                switch (env->error_code & 0xF) {
611 61190b14 bellard
                case EXCP_FP_OX:
612 61190b14 bellard
                    info.si_code = TARGET_FPE_FLTOVF;
613 61190b14 bellard
                    break;
614 61190b14 bellard
                case EXCP_FP_UX:
615 61190b14 bellard
                    info.si_code = TARGET_FPE_FLTUND;
616 61190b14 bellard
                    break;
617 61190b14 bellard
                case EXCP_FP_ZX:
618 61190b14 bellard
                case EXCP_FP_VXZDZ:
619 61190b14 bellard
                    info.si_code = TARGET_FPE_FLTDIV;
620 61190b14 bellard
                    break;
621 61190b14 bellard
                case EXCP_FP_XX:
622 61190b14 bellard
                    info.si_code = TARGET_FPE_FLTRES;
623 61190b14 bellard
                    break;
624 61190b14 bellard
                case EXCP_FP_VXSOFT:
625 61190b14 bellard
                    info.si_code = TARGET_FPE_FLTINV;
626 61190b14 bellard
                    break;
627 61190b14 bellard
                case EXCP_FP_VXNAN:
628 61190b14 bellard
                case EXCP_FP_VXISI:
629 61190b14 bellard
                case EXCP_FP_VXIDI:
630 61190b14 bellard
                case EXCP_FP_VXIMZ:
631 61190b14 bellard
                case EXCP_FP_VXVC:
632 61190b14 bellard
                case EXCP_FP_VXSQRT:
633 61190b14 bellard
                case EXCP_FP_VXCVI:
634 61190b14 bellard
                    info.si_code = TARGET_FPE_FLTSUB;
635 61190b14 bellard
                    break;
636 61190b14 bellard
                default:
637 61190b14 bellard
                    fprintf(stderr, "Unknown floating point exception "
638 61190b14 bellard
                            "(%02x)\n", env->error_code);
639 61190b14 bellard
                    if (loglevel) {
640 61190b14 bellard
                        fprintf(logfile, "Unknown floating point exception "
641 61190b14 bellard
                                "(%02x)\n", env->error_code & 0xF);
642 61190b14 bellard
                    }
643 61190b14 bellard
                }
644 61190b14 bellard
            break;
645 67867308 bellard
        case EXCP_INVAL:
646 61190b14 bellard
                fprintf(stderr, "Invalid instruction\n");
647 61190b14 bellard
                if (loglevel)
648 61190b14 bellard
                    fprintf(logfile, "Invalid instruction\n");
649 61190b14 bellard
                info.si_signo = TARGET_SIGILL;
650 61190b14 bellard
                info.si_errno = 0;
651 61190b14 bellard
                switch (env->error_code & 0xF) {
652 61190b14 bellard
                case EXCP_INVAL_INVAL:
653 61190b14 bellard
                    info.si_code = TARGET_ILL_ILLOPC;
654 61190b14 bellard
                    break;
655 61190b14 bellard
                case EXCP_INVAL_LSWX:
656 67867308 bellard
            info.si_code = TARGET_ILL_ILLOPN;
657 61190b14 bellard
                    break;
658 61190b14 bellard
                case EXCP_INVAL_SPR:
659 61190b14 bellard
                    info.si_code = TARGET_ILL_PRVREG;
660 61190b14 bellard
                    break;
661 61190b14 bellard
                case EXCP_INVAL_FP:
662 61190b14 bellard
                    info.si_code = TARGET_ILL_COPROC;
663 61190b14 bellard
                    break;
664 61190b14 bellard
                default:
665 61190b14 bellard
                    fprintf(stderr, "Unknown invalid operation (%02x)\n",
666 61190b14 bellard
                            env->error_code & 0xF);
667 61190b14 bellard
                    if (loglevel) {
668 61190b14 bellard
                        fprintf(logfile, "Unknown invalid operation (%02x)\n",
669 61190b14 bellard
                                env->error_code & 0xF);
670 61190b14 bellard
                    }
671 61190b14 bellard
                    info.si_code = TARGET_ILL_ILLADR;
672 61190b14 bellard
                    break;
673 61190b14 bellard
                }
674 61190b14 bellard
                break;
675 61190b14 bellard
            case EXCP_PRIV:
676 61190b14 bellard
                fprintf(stderr, "Privilege violation\n");
677 61190b14 bellard
                if (loglevel)
678 61190b14 bellard
                    fprintf(logfile, "Privilege violation\n");
679 61190b14 bellard
                info.si_signo = TARGET_SIGILL;
680 61190b14 bellard
                info.si_errno = 0;
681 61190b14 bellard
                switch (env->error_code & 0xF) {
682 61190b14 bellard
                case EXCP_PRIV_OPC:
683 61190b14 bellard
                    info.si_code = TARGET_ILL_PRVOPC;
684 61190b14 bellard
                    break;
685 61190b14 bellard
                case EXCP_PRIV_REG:
686 61190b14 bellard
                    info.si_code = TARGET_ILL_PRVREG;
687 61190b14 bellard
                break;
688 61190b14 bellard
                default:
689 61190b14 bellard
                    fprintf(stderr, "Unknown privilege violation (%02x)\n",
690 61190b14 bellard
                            env->error_code & 0xF);
691 61190b14 bellard
                    info.si_code = TARGET_ILL_PRVOPC;
692 61190b14 bellard
                    break;
693 61190b14 bellard
                }
694 61190b14 bellard
                break;
695 61190b14 bellard
            case EXCP_TRAP:
696 61190b14 bellard
                fprintf(stderr, "Tried to call a TRAP\n");
697 61190b14 bellard
                if (loglevel)
698 61190b14 bellard
                    fprintf(logfile, "Tried to call a TRAP\n");
699 61190b14 bellard
                abort();
700 61190b14 bellard
            default:
701 61190b14 bellard
                /* Should not happen ! */
702 61190b14 bellard
                fprintf(stderr, "Unknown program exception (%02x)\n",
703 61190b14 bellard
                        env->error_code);
704 61190b14 bellard
                if (loglevel) {
705 61190b14 bellard
                    fprintf(logfile, "Unknwon program exception (%02x)\n",
706 61190b14 bellard
                            env->error_code);
707 61190b14 bellard
                }
708 61190b14 bellard
                abort();
709 61190b14 bellard
            }
710 61190b14 bellard
            info._sifields._sigfault._addr = env->nip - 4;
711 67867308 bellard
            queue_signal(info.si_signo, &info);
712 67867308 bellard
            break;
713 61190b14 bellard
        case EXCP_NO_FP:
714 61190b14 bellard
            fprintf(stderr, "No floating point allowed\n");
715 61190b14 bellard
            if (loglevel)
716 61190b14 bellard
                fprintf(logfile, "No floating point allowed\n");
717 61190b14 bellard
            info.si_signo = TARGET_SIGILL;
718 67867308 bellard
            info.si_errno = 0;
719 61190b14 bellard
            info.si_code = TARGET_ILL_COPROC;
720 61190b14 bellard
            info._sifields._sigfault._addr = env->nip - 4;
721 67867308 bellard
            queue_signal(info.si_signo, &info);
722 67867308 bellard
            break;
723 61190b14 bellard
        case EXCP_DECR:
724 61190b14 bellard
            /* Should not happen ! */
725 61190b14 bellard
            fprintf(stderr, "Decrementer exception\n");
726 61190b14 bellard
            if (loglevel)
727 61190b14 bellard
                fprintf(logfile, "Decrementer exception\n");
728 61190b14 bellard
            abort();
729 67867308 bellard
        case EXCP_RESA: /* Implementation specific          */
730 61190b14 bellard
            /* Should not happen ! */
731 61190b14 bellard
            fprintf(stderr, "RESA exception should never happen !\n");
732 61190b14 bellard
            if (loglevel)
733 61190b14 bellard
                fprintf(logfile, "RESA exception should never happen !\n");
734 61190b14 bellard
            abort();
735 67867308 bellard
        case EXCP_RESB: /* Implementation specific          */
736 61190b14 bellard
            /* Should not happen ! */
737 61190b14 bellard
            fprintf(stderr, "RESB exception should never happen !\n");
738 61190b14 bellard
            if (loglevel)
739 61190b14 bellard
                fprintf(logfile, "RESB exception should never happen !\n");
740 67867308 bellard
            abort();
741 61190b14 bellard
        case EXCP_TRACE:
742 61190b14 bellard
            /* Do nothing: we use this to trace execution */
743 67867308 bellard
            break;
744 61190b14 bellard
        case EXCP_FP_ASSIST:
745 61190b14 bellard
            /* Should not happen ! */
746 61190b14 bellard
            fprintf(stderr, "Floating point assist exception\n");
747 61190b14 bellard
            if (loglevel)
748 61190b14 bellard
                fprintf(logfile, "Floating point assist exception\n");
749 61190b14 bellard
            abort();
750 61190b14 bellard
        case EXCP_MTMSR:
751 61190b14 bellard
            /* We reloaded the msr, just go on */
752 61190b14 bellard
            if (msr_pr) {
753 61190b14 bellard
                fprintf(stderr, "Tried to go into supervisor mode !\n");
754 61190b14 bellard
                if (loglevel)
755 61190b14 bellard
                    fprintf(logfile, "Tried to go into supervisor mode !\n");
756 61190b14 bellard
                abort();
757 67867308 bellard
        }
758 61190b14 bellard
            break;
759 61190b14 bellard
        case EXCP_BRANCH:
760 61190b14 bellard
            /* We stopped because of a jump... */
761 61190b14 bellard
            break;
762 61190b14 bellard
        case EXCP_RFI:
763 61190b14 bellard
            /* Should not occur: we always are in user mode */
764 61190b14 bellard
            fprintf(stderr, "Return from interrupt ?\n");
765 61190b14 bellard
            if (loglevel)
766 61190b14 bellard
                fprintf(logfile, "Return from interrupt ?\n");
767 61190b14 bellard
            abort();
768 61190b14 bellard
        case EXCP_INTERRUPT:
769 61190b14 bellard
            /* Don't know why this should ever happen... */
770 61190b14 bellard
            break;
771 a541f297 bellard
        case EXCP_DEBUG:
772 a541f297 bellard
            break;
773 67867308 bellard
        default:
774 67867308 bellard
            fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", 
775 67867308 bellard
                    trapnr);
776 61190b14 bellard
            if (loglevel) {
777 61190b14 bellard
                fprintf(logfile, "qemu: unhandled CPU exception 0x%02x - "
778 61190b14 bellard
                        "0x%02x - aborting\n", trapnr, env->error_code);
779 61190b14 bellard
            }
780 67867308 bellard
            abort();
781 67867308 bellard
        }
782 61190b14 bellard
        if (trapnr < EXCP_PPC_MAX)
783 61190b14 bellard
            env->exceptions &= ~(1 << trapnr);
784 67867308 bellard
        process_pending_signals(env);
785 61190b14 bellard
        if (env->exceptions != 0) {
786 61190b14 bellard
            check_exception_state(env);
787 61190b14 bellard
        }
788 67867308 bellard
    }
789 67867308 bellard
}
790 67867308 bellard
#endif
791 67867308 bellard
792 31e31b8a bellard
void usage(void)
793 31e31b8a bellard
{
794 93ac68bc bellard
    printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003 Fabrice Bellard\n"
795 93ac68bc bellard
           "usage: qemu-" TARGET_ARCH " [-h] [-d] [-L path] [-s size] program [arguments...]\n"
796 b346ff46 bellard
           "Linux CPU emulator (compiled for %s emulation)\n"
797 d691f669 bellard
           "\n"
798 54936004 bellard
           "-h           print this help\n"
799 b346ff46 bellard
           "-L path      set the elf interpreter prefix (default=%s)\n"
800 b346ff46 bellard
           "-s size      set the stack size in bytes (default=%ld)\n"
801 54936004 bellard
           "\n"
802 54936004 bellard
           "debug options:\n"
803 c6981055 bellard
#ifdef USE_CODE_COPY
804 c6981055 bellard
           "-no-code-copy   disable code copy acceleration\n"
805 c6981055 bellard
#endif
806 54936004 bellard
           "-d           activate log (logfile=%s)\n"
807 54936004 bellard
           "-p pagesize  set the host page size to 'pagesize'\n",
808 b346ff46 bellard
           TARGET_ARCH,
809 d691f669 bellard
           interp_prefix, 
810 54936004 bellard
           x86_stack_size,
811 54936004 bellard
           DEBUG_LOGFILE);
812 74cd30b8 bellard
    _exit(1);
813 31e31b8a bellard
}
814 31e31b8a bellard
815 9de5e440 bellard
/* XXX: currently only used for async signals (see signal.c) */
816 b346ff46 bellard
CPUState *global_env;
817 59faf6d6 bellard
/* used only if single thread */
818 59faf6d6 bellard
CPUState *cpu_single_env = NULL;
819 59faf6d6 bellard
820 851e67a1 bellard
/* used to free thread contexts */
821 851e67a1 bellard
TaskState *first_task_state;
822 9de5e440 bellard
823 31e31b8a bellard
int main(int argc, char **argv)
824 31e31b8a bellard
{
825 31e31b8a bellard
    const char *filename;
826 01ffc75b bellard
    struct target_pt_regs regs1, *regs = &regs1;
827 31e31b8a bellard
    struct image_info info1, *info = &info1;
828 851e67a1 bellard
    TaskState ts1, *ts = &ts1;
829 b346ff46 bellard
    CPUState *env;
830 586314f2 bellard
    int optind;
831 d691f669 bellard
    const char *r;
832 d691f669 bellard
    
833 31e31b8a bellard
    if (argc <= 1)
834 31e31b8a bellard
        usage();
835 f801f97e bellard
836 cc38b844 bellard
    /* init debug */
837 cc38b844 bellard
    cpu_set_log_filename(DEBUG_LOGFILE);
838 cc38b844 bellard
839 586314f2 bellard
    optind = 1;
840 d691f669 bellard
    for(;;) {
841 d691f669 bellard
        if (optind >= argc)
842 d691f669 bellard
            break;
843 d691f669 bellard
        r = argv[optind];
844 d691f669 bellard
        if (r[0] != '-')
845 d691f669 bellard
            break;
846 586314f2 bellard
        optind++;
847 d691f669 bellard
        r++;
848 d691f669 bellard
        if (!strcmp(r, "-")) {
849 d691f669 bellard
            break;
850 d691f669 bellard
        } else if (!strcmp(r, "d")) {
851 e19e89a5 bellard
            int mask;
852 e19e89a5 bellard
            CPULogItem *item;
853 e19e89a5 bellard
            
854 e19e89a5 bellard
            mask = cpu_str_to_log_mask(optarg);
855 e19e89a5 bellard
            if (!mask) {
856 e19e89a5 bellard
                printf("Log items (comma separated):\n");
857 e19e89a5 bellard
                for(item = cpu_log_items; item->mask != 0; item++) {
858 e19e89a5 bellard
                    printf("%-10s %s\n", item->name, item->help);
859 e19e89a5 bellard
                }
860 e19e89a5 bellard
                exit(1);
861 e19e89a5 bellard
            }
862 e19e89a5 bellard
            cpu_set_log(mask);
863 d691f669 bellard
        } else if (!strcmp(r, "s")) {
864 d691f669 bellard
            r = argv[optind++];
865 d691f669 bellard
            x86_stack_size = strtol(r, (char **)&r, 0);
866 d691f669 bellard
            if (x86_stack_size <= 0)
867 d691f669 bellard
                usage();
868 d691f669 bellard
            if (*r == 'M')
869 d691f669 bellard
                x86_stack_size *= 1024 * 1024;
870 d691f669 bellard
            else if (*r == 'k' || *r == 'K')
871 d691f669 bellard
                x86_stack_size *= 1024;
872 d691f669 bellard
        } else if (!strcmp(r, "L")) {
873 d691f669 bellard
            interp_prefix = argv[optind++];
874 54936004 bellard
        } else if (!strcmp(r, "p")) {
875 54936004 bellard
            host_page_size = atoi(argv[optind++]);
876 54936004 bellard
            if (host_page_size == 0 ||
877 54936004 bellard
                (host_page_size & (host_page_size - 1)) != 0) {
878 54936004 bellard
                fprintf(stderr, "page size must be a power of two\n");
879 54936004 bellard
                exit(1);
880 54936004 bellard
            }
881 c6981055 bellard
        } else 
882 c6981055 bellard
#ifdef USE_CODE_COPY
883 c6981055 bellard
        if (!strcmp(r, "no-code-copy")) {
884 c6981055 bellard
            code_copy_enabled = 0;
885 c6981055 bellard
        } else 
886 c6981055 bellard
#endif
887 c6981055 bellard
        {
888 d691f669 bellard
            usage();
889 d691f669 bellard
        }
890 586314f2 bellard
    }
891 d691f669 bellard
    if (optind >= argc)
892 d691f669 bellard
        usage();
893 586314f2 bellard
    filename = argv[optind];
894 586314f2 bellard
895 31e31b8a bellard
    /* Zero out regs */
896 01ffc75b bellard
    memset(regs, 0, sizeof(struct target_pt_regs));
897 31e31b8a bellard
898 31e31b8a bellard
    /* Zero out image_info */
899 31e31b8a bellard
    memset(info, 0, sizeof(struct image_info));
900 31e31b8a bellard
901 74cd30b8 bellard
    /* Scan interp_prefix dir for replacement files. */
902 74cd30b8 bellard
    init_paths(interp_prefix);
903 74cd30b8 bellard
904 54936004 bellard
    /* NOTE: we need to init the CPU at this stage to get the
905 54936004 bellard
       host_page_size */
906 b346ff46 bellard
    env = cpu_init();
907 92ccca6a bellard
    
908 74cd30b8 bellard
    if (elf_exec(filename, argv+optind, environ, regs, info) != 0) {
909 31e31b8a bellard
        printf("Error loading %s\n", filename);
910 74cd30b8 bellard
        _exit(1);
911 31e31b8a bellard
    }
912 31e31b8a bellard
    
913 4b74fe1f bellard
    if (loglevel) {
914 54936004 bellard
        page_dump(logfile);
915 54936004 bellard
    
916 4b74fe1f bellard
        fprintf(logfile, "start_brk   0x%08lx\n" , info->start_brk);
917 4b74fe1f bellard
        fprintf(logfile, "end_code    0x%08lx\n" , info->end_code);
918 4b74fe1f bellard
        fprintf(logfile, "start_code  0x%08lx\n" , info->start_code);
919 4b74fe1f bellard
        fprintf(logfile, "end_data    0x%08lx\n" , info->end_data);
920 4b74fe1f bellard
        fprintf(logfile, "start_stack 0x%08lx\n" , info->start_stack);
921 4b74fe1f bellard
        fprintf(logfile, "brk         0x%08lx\n" , info->brk);
922 b346ff46 bellard
        fprintf(logfile, "entry       0x%08lx\n" , info->entry);
923 4b74fe1f bellard
    }
924 31e31b8a bellard
925 31e31b8a bellard
    target_set_brk((char *)info->brk);
926 31e31b8a bellard
    syscall_init();
927 66fb9763 bellard
    signal_init();
928 31e31b8a bellard
929 9de5e440 bellard
    global_env = env;
930 0ecfa993 bellard
931 851e67a1 bellard
    /* build Task State */
932 851e67a1 bellard
    memset(ts, 0, sizeof(TaskState));
933 851e67a1 bellard
    env->opaque = ts;
934 851e67a1 bellard
    ts->used = 1;
935 59faf6d6 bellard
    env->user_mode_only = 1;
936 851e67a1 bellard
    
937 b346ff46 bellard
#if defined(TARGET_I386)
938 2e255c6b bellard
    cpu_x86_set_cpl(env, 3);
939 2e255c6b bellard
940 3802ce26 bellard
    env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
941 75c6215f bellard
    env->hflags |= HF_PE_MASK;
942 3802ce26 bellard
943 415e561f bellard
    /* flags setup : we activate the IRQs by default as in user mode */
944 415e561f bellard
    env->eflags |= IF_MASK;
945 415e561f bellard
    
946 6dbad63e bellard
    /* linux register setup */
947 0ecfa993 bellard
    env->regs[R_EAX] = regs->eax;
948 0ecfa993 bellard
    env->regs[R_EBX] = regs->ebx;
949 0ecfa993 bellard
    env->regs[R_ECX] = regs->ecx;
950 0ecfa993 bellard
    env->regs[R_EDX] = regs->edx;
951 0ecfa993 bellard
    env->regs[R_ESI] = regs->esi;
952 0ecfa993 bellard
    env->regs[R_EDI] = regs->edi;
953 0ecfa993 bellard
    env->regs[R_EBP] = regs->ebp;
954 0ecfa993 bellard
    env->regs[R_ESP] = regs->esp;
955 dab2ed99 bellard
    env->eip = regs->eip;
956 31e31b8a bellard
957 f4beb510 bellard
    /* linux interrupt setup */
958 f4beb510 bellard
    env->idt.base = (void *)idt_table;
959 f4beb510 bellard
    env->idt.limit = sizeof(idt_table) - 1;
960 f4beb510 bellard
    set_idt(0, 0);
961 f4beb510 bellard
    set_idt(1, 0);
962 f4beb510 bellard
    set_idt(2, 0);
963 f4beb510 bellard
    set_idt(3, 3);
964 f4beb510 bellard
    set_idt(4, 3);
965 f4beb510 bellard
    set_idt(5, 3);
966 f4beb510 bellard
    set_idt(6, 0);
967 f4beb510 bellard
    set_idt(7, 0);
968 f4beb510 bellard
    set_idt(8, 0);
969 f4beb510 bellard
    set_idt(9, 0);
970 f4beb510 bellard
    set_idt(10, 0);
971 f4beb510 bellard
    set_idt(11, 0);
972 f4beb510 bellard
    set_idt(12, 0);
973 f4beb510 bellard
    set_idt(13, 0);
974 f4beb510 bellard
    set_idt(14, 0);
975 f4beb510 bellard
    set_idt(15, 0);
976 f4beb510 bellard
    set_idt(16, 0);
977 f4beb510 bellard
    set_idt(17, 0);
978 f4beb510 bellard
    set_idt(18, 0);
979 f4beb510 bellard
    set_idt(19, 0);
980 f4beb510 bellard
    set_idt(0x80, 3);
981 f4beb510 bellard
982 6dbad63e bellard
    /* linux segment setup */
983 6dbad63e bellard
    env->gdt.base = (void *)gdt_table;
984 6dbad63e bellard
    env->gdt.limit = sizeof(gdt_table) - 1;
985 f4beb510 bellard
    write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
986 f4beb510 bellard
             DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | 
987 f4beb510 bellard
             (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
988 f4beb510 bellard
    write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
989 f4beb510 bellard
             DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | 
990 f4beb510 bellard
             (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
991 6dbad63e bellard
    cpu_x86_load_seg(env, R_CS, __USER_CS);
992 6dbad63e bellard
    cpu_x86_load_seg(env, R_DS, __USER_DS);
993 6dbad63e bellard
    cpu_x86_load_seg(env, R_ES, __USER_DS);
994 6dbad63e bellard
    cpu_x86_load_seg(env, R_SS, __USER_DS);
995 6dbad63e bellard
    cpu_x86_load_seg(env, R_FS, __USER_DS);
996 6dbad63e bellard
    cpu_x86_load_seg(env, R_GS, __USER_DS);
997 92ccca6a bellard
998 b346ff46 bellard
#elif defined(TARGET_ARM)
999 b346ff46 bellard
    {
1000 b346ff46 bellard
        int i;
1001 b346ff46 bellard
        for(i = 0; i < 16; i++) {
1002 b346ff46 bellard
            env->regs[i] = regs->uregs[i];
1003 b346ff46 bellard
        }
1004 b346ff46 bellard
        env->cpsr = regs->uregs[16];
1005 b346ff46 bellard
    }
1006 93ac68bc bellard
#elif defined(TARGET_SPARC)
1007 060366c5 bellard
    {
1008 060366c5 bellard
        int i;
1009 060366c5 bellard
        env->pc = regs->pc;
1010 060366c5 bellard
        env->npc = regs->npc;
1011 060366c5 bellard
        env->y = regs->y;
1012 060366c5 bellard
        for(i = 0; i < 8; i++)
1013 060366c5 bellard
            env->gregs[i] = regs->u_regs[i];
1014 060366c5 bellard
        for(i = 0; i < 8; i++)
1015 060366c5 bellard
            env->regwptr[i] = regs->u_regs[i + 8];
1016 060366c5 bellard
    }
1017 67867308 bellard
#elif defined(TARGET_PPC)
1018 67867308 bellard
    {
1019 67867308 bellard
        int i;
1020 61190b14 bellard
        for (i = 0; i < 32; i++) {
1021 61190b14 bellard
            if (i != 12 && i != 6)
1022 61190b14 bellard
                env->msr[i] = (regs->msr >> i) & 1;
1023 61190b14 bellard
        }
1024 67867308 bellard
        env->nip = regs->nip;
1025 67867308 bellard
        for(i = 0; i < 32; i++) {
1026 67867308 bellard
            env->gpr[i] = regs->gpr[i];
1027 67867308 bellard
        }
1028 67867308 bellard
    }
1029 b346ff46 bellard
#else
1030 b346ff46 bellard
#error unsupported target CPU
1031 b346ff46 bellard
#endif
1032 31e31b8a bellard
1033 1b6b029e bellard
    cpu_loop(env);
1034 1b6b029e bellard
    /* never exits */
1035 31e31b8a bellard
    return 0;
1036 31e31b8a bellard
}