root / arch_init.c @ d7582078
History | View | Annotate | Download (18.4 kB)
1 | ad96090a | Blue Swirl | /*
|
---|---|---|---|
2 | ad96090a | Blue Swirl | * QEMU System Emulator
|
3 | ad96090a | Blue Swirl | *
|
4 | ad96090a | Blue Swirl | * Copyright (c) 2003-2008 Fabrice Bellard
|
5 | ad96090a | Blue Swirl | *
|
6 | ad96090a | Blue Swirl | * Permission is hereby granted, free of charge, to any person obtaining a copy
|
7 | ad96090a | Blue Swirl | * of this software and associated documentation files (the "Software"), to deal
|
8 | ad96090a | Blue Swirl | * in the Software without restriction, including without limitation the rights
|
9 | ad96090a | Blue Swirl | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
10 | ad96090a | Blue Swirl | * copies of the Software, and to permit persons to whom the Software is
|
11 | ad96090a | Blue Swirl | * furnished to do so, subject to the following conditions:
|
12 | ad96090a | Blue Swirl | *
|
13 | ad96090a | Blue Swirl | * The above copyright notice and this permission notice shall be included in
|
14 | ad96090a | Blue Swirl | * all copies or substantial portions of the Software.
|
15 | ad96090a | Blue Swirl | *
|
16 | ad96090a | Blue Swirl | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
17 | ad96090a | Blue Swirl | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
18 | ad96090a | Blue Swirl | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
19 | ad96090a | Blue Swirl | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
20 | ad96090a | Blue Swirl | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
21 | ad96090a | Blue Swirl | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
22 | ad96090a | Blue Swirl | * THE SOFTWARE.
|
23 | ad96090a | Blue Swirl | */
|
24 | ad96090a | Blue Swirl | #include <stdint.h> |
25 | ad96090a | Blue Swirl | #include <stdarg.h> |
26 | b2e0a138 | Michael S. Tsirkin | #include <stdlib.h> |
27 | ad96090a | Blue Swirl | #ifndef _WIN32
|
28 | 1c47cb16 | Blue Swirl | #include <sys/types.h> |
29 | ad96090a | Blue Swirl | #include <sys/mman.h> |
30 | ad96090a | Blue Swirl | #endif
|
31 | ad96090a | Blue Swirl | #include "config.h" |
32 | ad96090a | Blue Swirl | #include "monitor.h" |
33 | ad96090a | Blue Swirl | #include "sysemu.h" |
34 | ad96090a | Blue Swirl | #include "arch_init.h" |
35 | ad96090a | Blue Swirl | #include "audio/audio.h" |
36 | ad96090a | Blue Swirl | #include "hw/pc.h" |
37 | ad96090a | Blue Swirl | #include "hw/pci.h" |
38 | ad96090a | Blue Swirl | #include "hw/audiodev.h" |
39 | ad96090a | Blue Swirl | #include "kvm.h" |
40 | ad96090a | Blue Swirl | #include "migration.h" |
41 | ad96090a | Blue Swirl | #include "net.h" |
42 | ad96090a | Blue Swirl | #include "gdbstub.h" |
43 | ad96090a | Blue Swirl | #include "hw/smbios.h" |
44 | 86e775c6 | Avi Kivity | #include "exec-memory.h" |
45 | 302fe51b | Jan Kiszka | #include "hw/pcspk.h" |
46 | ad96090a | Blue Swirl | |
47 | ad96090a | Blue Swirl | #ifdef TARGET_SPARC
|
48 | ad96090a | Blue Swirl | int graphic_width = 1024; |
49 | ad96090a | Blue Swirl | int graphic_height = 768; |
50 | ad96090a | Blue Swirl | int graphic_depth = 8; |
51 | ad96090a | Blue Swirl | #else
|
52 | ad96090a | Blue Swirl | int graphic_width = 800; |
53 | ad96090a | Blue Swirl | int graphic_height = 600; |
54 | ad96090a | Blue Swirl | int graphic_depth = 15; |
55 | ad96090a | Blue Swirl | #endif
|
56 | ad96090a | Blue Swirl | |
57 | ad96090a | Blue Swirl | |
58 | ad96090a | Blue Swirl | #if defined(TARGET_ALPHA)
|
59 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_ALPHA
|
60 | ad96090a | Blue Swirl | #elif defined(TARGET_ARM)
|
61 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_ARM
|
62 | ad96090a | Blue Swirl | #elif defined(TARGET_CRIS)
|
63 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_CRIS
|
64 | ad96090a | Blue Swirl | #elif defined(TARGET_I386)
|
65 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_I386
|
66 | ad96090a | Blue Swirl | #elif defined(TARGET_M68K)
|
67 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_M68K
|
68 | 81ea0e13 | Michael Walle | #elif defined(TARGET_LM32)
|
69 | 81ea0e13 | Michael Walle | #define QEMU_ARCH QEMU_ARCH_LM32
|
70 | ad96090a | Blue Swirl | #elif defined(TARGET_MICROBLAZE)
|
71 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_MICROBLAZE
|
72 | ad96090a | Blue Swirl | #elif defined(TARGET_MIPS)
|
73 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_MIPS
|
74 | ad96090a | Blue Swirl | #elif defined(TARGET_PPC)
|
75 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_PPC
|
76 | ad96090a | Blue Swirl | #elif defined(TARGET_S390X)
|
77 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_S390X
|
78 | ad96090a | Blue Swirl | #elif defined(TARGET_SH4)
|
79 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_SH4
|
80 | ad96090a | Blue Swirl | #elif defined(TARGET_SPARC)
|
81 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_SPARC
|
82 | 2328826b | Max Filippov | #elif defined(TARGET_XTENSA)
|
83 | 2328826b | Max Filippov | #define QEMU_ARCH QEMU_ARCH_XTENSA
|
84 | ad96090a | Blue Swirl | #endif
|
85 | ad96090a | Blue Swirl | |
86 | ad96090a | Blue Swirl | const uint32_t arch_type = QEMU_ARCH;
|
87 | ad96090a | Blue Swirl | |
88 | ad96090a | Blue Swirl | /***********************************************************/
|
89 | ad96090a | Blue Swirl | /* ram save/restore */
|
90 | ad96090a | Blue Swirl | |
91 | d20878d2 | Yoshiaki Tamura | #define RAM_SAVE_FLAG_FULL 0x01 /* Obsolete, not used anymore */ |
92 | d20878d2 | Yoshiaki Tamura | #define RAM_SAVE_FLAG_COMPRESS 0x02 |
93 | d20878d2 | Yoshiaki Tamura | #define RAM_SAVE_FLAG_MEM_SIZE 0x04 |
94 | d20878d2 | Yoshiaki Tamura | #define RAM_SAVE_FLAG_PAGE 0x08 |
95 | d20878d2 | Yoshiaki Tamura | #define RAM_SAVE_FLAG_EOS 0x10 |
96 | d20878d2 | Yoshiaki Tamura | #define RAM_SAVE_FLAG_CONTINUE 0x20 |
97 | ad96090a | Blue Swirl | |
98 | 86003615 | Paolo Bonzini | #ifdef __ALTIVEC__
|
99 | 86003615 | Paolo Bonzini | #include <altivec.h> |
100 | 86003615 | Paolo Bonzini | #define VECTYPE vector unsigned char |
101 | 86003615 | Paolo Bonzini | #define SPLAT(p) vec_splat(vec_ld(0, p), 0) |
102 | 86003615 | Paolo Bonzini | #define ALL_EQ(v1, v2) vec_all_eq(v1, v2)
|
103 | f283edc4 | Andreas Färber | /* altivec.h may redefine the bool macro as vector type.
|
104 | f283edc4 | Andreas Färber | * Reset it to POSIX semantics. */
|
105 | f283edc4 | Andreas Färber | #undef bool |
106 | f283edc4 | Andreas Färber | #define bool _Bool |
107 | 86003615 | Paolo Bonzini | #elif defined __SSE2__
|
108 | 86003615 | Paolo Bonzini | #include <emmintrin.h> |
109 | 86003615 | Paolo Bonzini | #define VECTYPE __m128i
|
110 | 86003615 | Paolo Bonzini | #define SPLAT(p) _mm_set1_epi8(*(p))
|
111 | 86003615 | Paolo Bonzini | #define ALL_EQ(v1, v2) (_mm_movemask_epi8(_mm_cmpeq_epi8(v1, v2)) == 0xFFFF) |
112 | 86003615 | Paolo Bonzini | #else
|
113 | 86003615 | Paolo Bonzini | #define VECTYPE unsigned long |
114 | 86003615 | Paolo Bonzini | #define SPLAT(p) (*(p) * (~0UL / 255)) |
115 | 86003615 | Paolo Bonzini | #define ALL_EQ(v1, v2) ((v1) == (v2))
|
116 | 86003615 | Paolo Bonzini | #endif
|
117 | 86003615 | Paolo Bonzini | |
118 | b5a8fe5e | Eduardo Habkost | |
119 | 756557de | Eduardo Habkost | static struct defconfig_file { |
120 | 756557de | Eduardo Habkost | const char *filename; |
121 | f29a5614 | Eduardo Habkost | /* Indicates it is an user config file (disabled by -no-user-config) */
|
122 | f29a5614 | Eduardo Habkost | bool userconfig;
|
123 | 756557de | Eduardo Habkost | } default_config_files[] = { |
124 | e2d87bff | Eduardo Habkost | { CONFIG_QEMU_DATADIR "/cpus-" TARGET_ARCH ".conf", false }, |
125 | f29a5614 | Eduardo Habkost | { CONFIG_QEMU_CONFDIR "/qemu.conf", true }, |
126 | f29a5614 | Eduardo Habkost | { CONFIG_QEMU_CONFDIR "/target-" TARGET_ARCH ".conf", true }, |
127 | 756557de | Eduardo Habkost | { NULL }, /* end of list */ |
128 | 756557de | Eduardo Habkost | }; |
129 | 756557de | Eduardo Habkost | |
130 | 756557de | Eduardo Habkost | |
131 | f29a5614 | Eduardo Habkost | int qemu_read_default_config_files(bool userconfig) |
132 | b5a8fe5e | Eduardo Habkost | { |
133 | b5a8fe5e | Eduardo Habkost | int ret;
|
134 | 756557de | Eduardo Habkost | struct defconfig_file *f;
|
135 | b5a8fe5e | Eduardo Habkost | |
136 | 756557de | Eduardo Habkost | for (f = default_config_files; f->filename; f++) {
|
137 | f29a5614 | Eduardo Habkost | if (!userconfig && f->userconfig) {
|
138 | f29a5614 | Eduardo Habkost | continue;
|
139 | f29a5614 | Eduardo Habkost | } |
140 | 756557de | Eduardo Habkost | ret = qemu_read_config_file(f->filename); |
141 | 756557de | Eduardo Habkost | if (ret < 0 && ret != -ENOENT) { |
142 | 756557de | Eduardo Habkost | return ret;
|
143 | 756557de | Eduardo Habkost | } |
144 | b5a8fe5e | Eduardo Habkost | } |
145 | 756557de | Eduardo Habkost | |
146 | b5a8fe5e | Eduardo Habkost | return 0; |
147 | b5a8fe5e | Eduardo Habkost | } |
148 | b5a8fe5e | Eduardo Habkost | |
149 | 86003615 | Paolo Bonzini | static int is_dup_page(uint8_t *page) |
150 | ad96090a | Blue Swirl | { |
151 | 86003615 | Paolo Bonzini | VECTYPE *p = (VECTYPE *)page; |
152 | 86003615 | Paolo Bonzini | VECTYPE val = SPLAT(page); |
153 | ad96090a | Blue Swirl | int i;
|
154 | ad96090a | Blue Swirl | |
155 | 86003615 | Paolo Bonzini | for (i = 0; i < TARGET_PAGE_SIZE / sizeof(VECTYPE); i++) { |
156 | 86003615 | Paolo Bonzini | if (!ALL_EQ(val, p[i])) {
|
157 | ad96090a | Blue Swirl | return 0; |
158 | ad96090a | Blue Swirl | } |
159 | ad96090a | Blue Swirl | } |
160 | ad96090a | Blue Swirl | |
161 | ad96090a | Blue Swirl | return 1; |
162 | ad96090a | Blue Swirl | } |
163 | ad96090a | Blue Swirl | |
164 | 760e77ea | Alex Williamson | static RAMBlock *last_block;
|
165 | 760e77ea | Alex Williamson | static ram_addr_t last_offset;
|
166 | 760e77ea | Alex Williamson | |
167 | ad96090a | Blue Swirl | static int ram_save_block(QEMUFile *f) |
168 | ad96090a | Blue Swirl | { |
169 | e44359c3 | Alex Williamson | RAMBlock *block = last_block; |
170 | e44359c3 | Alex Williamson | ram_addr_t offset = last_offset; |
171 | 3fc250b4 | Pierre Riteau | int bytes_sent = 0; |
172 | 71c510e2 | Avi Kivity | MemoryRegion *mr; |
173 | ad96090a | Blue Swirl | |
174 | e44359c3 | Alex Williamson | if (!block)
|
175 | e44359c3 | Alex Williamson | block = QLIST_FIRST(&ram_list.blocks); |
176 | e44359c3 | Alex Williamson | |
177 | e44359c3 | Alex Williamson | do {
|
178 | 71c510e2 | Avi Kivity | mr = block->mr; |
179 | cd7a45c9 | Blue Swirl | if (memory_region_get_dirty(mr, offset, TARGET_PAGE_SIZE,
|
180 | cd7a45c9 | Blue Swirl | DIRTY_MEMORY_MIGRATION)) { |
181 | ad96090a | Blue Swirl | uint8_t *p; |
182 | a55bbe31 | Alex Williamson | int cont = (block == last_block) ? RAM_SAVE_FLAG_CONTINUE : 0; |
183 | ad96090a | Blue Swirl | |
184 | 71c510e2 | Avi Kivity | memory_region_reset_dirty(mr, offset, TARGET_PAGE_SIZE, |
185 | 71c510e2 | Avi Kivity | DIRTY_MEMORY_MIGRATION); |
186 | ad96090a | Blue Swirl | |
187 | 71c510e2 | Avi Kivity | p = memory_region_get_ram_ptr(mr) + offset; |
188 | ad96090a | Blue Swirl | |
189 | 86003615 | Paolo Bonzini | if (is_dup_page(p)) {
|
190 | a55bbe31 | Alex Williamson | qemu_put_be64(f, offset | cont | RAM_SAVE_FLAG_COMPRESS); |
191 | a55bbe31 | Alex Williamson | if (!cont) {
|
192 | a55bbe31 | Alex Williamson | qemu_put_byte(f, strlen(block->idstr)); |
193 | a55bbe31 | Alex Williamson | qemu_put_buffer(f, (uint8_t *)block->idstr, |
194 | a55bbe31 | Alex Williamson | strlen(block->idstr)); |
195 | a55bbe31 | Alex Williamson | } |
196 | ad96090a | Blue Swirl | qemu_put_byte(f, *p); |
197 | 3fc250b4 | Pierre Riteau | bytes_sent = 1;
|
198 | ad96090a | Blue Swirl | } else {
|
199 | a55bbe31 | Alex Williamson | qemu_put_be64(f, offset | cont | RAM_SAVE_FLAG_PAGE); |
200 | a55bbe31 | Alex Williamson | if (!cont) {
|
201 | a55bbe31 | Alex Williamson | qemu_put_byte(f, strlen(block->idstr)); |
202 | a55bbe31 | Alex Williamson | qemu_put_buffer(f, (uint8_t *)block->idstr, |
203 | a55bbe31 | Alex Williamson | strlen(block->idstr)); |
204 | a55bbe31 | Alex Williamson | } |
205 | ad96090a | Blue Swirl | qemu_put_buffer(f, p, TARGET_PAGE_SIZE); |
206 | 3fc250b4 | Pierre Riteau | bytes_sent = TARGET_PAGE_SIZE; |
207 | ad96090a | Blue Swirl | } |
208 | ad96090a | Blue Swirl | |
209 | ad96090a | Blue Swirl | break;
|
210 | ad96090a | Blue Swirl | } |
211 | e44359c3 | Alex Williamson | |
212 | e44359c3 | Alex Williamson | offset += TARGET_PAGE_SIZE; |
213 | e44359c3 | Alex Williamson | if (offset >= block->length) {
|
214 | e44359c3 | Alex Williamson | offset = 0;
|
215 | e44359c3 | Alex Williamson | block = QLIST_NEXT(block, next); |
216 | e44359c3 | Alex Williamson | if (!block)
|
217 | e44359c3 | Alex Williamson | block = QLIST_FIRST(&ram_list.blocks); |
218 | e44359c3 | Alex Williamson | } |
219 | 71c510e2 | Avi Kivity | } while (block != last_block || offset != last_offset);
|
220 | e44359c3 | Alex Williamson | |
221 | e44359c3 | Alex Williamson | last_block = block; |
222 | e44359c3 | Alex Williamson | last_offset = offset; |
223 | ad96090a | Blue Swirl | |
224 | 3fc250b4 | Pierre Riteau | return bytes_sent;
|
225 | ad96090a | Blue Swirl | } |
226 | ad96090a | Blue Swirl | |
227 | ad96090a | Blue Swirl | static uint64_t bytes_transferred;
|
228 | ad96090a | Blue Swirl | |
229 | ad96090a | Blue Swirl | static ram_addr_t ram_save_remaining(void) |
230 | ad96090a | Blue Swirl | { |
231 | e44359c3 | Alex Williamson | RAMBlock *block; |
232 | ad96090a | Blue Swirl | ram_addr_t count = 0;
|
233 | ad96090a | Blue Swirl | |
234 | e44359c3 | Alex Williamson | QLIST_FOREACH(block, &ram_list.blocks, next) { |
235 | e44359c3 | Alex Williamson | ram_addr_t addr; |
236 | 71c510e2 | Avi Kivity | for (addr = 0; addr < block->length; addr += TARGET_PAGE_SIZE) { |
237 | cd7a45c9 | Blue Swirl | if (memory_region_get_dirty(block->mr, addr, TARGET_PAGE_SIZE,
|
238 | 71c510e2 | Avi Kivity | DIRTY_MEMORY_MIGRATION)) { |
239 | e44359c3 | Alex Williamson | count++; |
240 | e44359c3 | Alex Williamson | } |
241 | ad96090a | Blue Swirl | } |
242 | ad96090a | Blue Swirl | } |
243 | ad96090a | Blue Swirl | |
244 | ad96090a | Blue Swirl | return count;
|
245 | ad96090a | Blue Swirl | } |
246 | ad96090a | Blue Swirl | |
247 | ad96090a | Blue Swirl | uint64_t ram_bytes_remaining(void)
|
248 | ad96090a | Blue Swirl | { |
249 | ad96090a | Blue Swirl | return ram_save_remaining() * TARGET_PAGE_SIZE;
|
250 | ad96090a | Blue Swirl | } |
251 | ad96090a | Blue Swirl | |
252 | ad96090a | Blue Swirl | uint64_t ram_bytes_transferred(void)
|
253 | ad96090a | Blue Swirl | { |
254 | ad96090a | Blue Swirl | return bytes_transferred;
|
255 | ad96090a | Blue Swirl | } |
256 | ad96090a | Blue Swirl | |
257 | ad96090a | Blue Swirl | uint64_t ram_bytes_total(void)
|
258 | ad96090a | Blue Swirl | { |
259 | d17b5288 | Alex Williamson | RAMBlock *block; |
260 | d17b5288 | Alex Williamson | uint64_t total = 0;
|
261 | d17b5288 | Alex Williamson | |
262 | d17b5288 | Alex Williamson | QLIST_FOREACH(block, &ram_list.blocks, next) |
263 | d17b5288 | Alex Williamson | total += block->length; |
264 | d17b5288 | Alex Williamson | |
265 | d17b5288 | Alex Williamson | return total;
|
266 | ad96090a | Blue Swirl | } |
267 | ad96090a | Blue Swirl | |
268 | b2e0a138 | Michael S. Tsirkin | static int block_compar(const void *a, const void *b) |
269 | b2e0a138 | Michael S. Tsirkin | { |
270 | b2e0a138 | Michael S. Tsirkin | RAMBlock * const *ablock = a;
|
271 | b2e0a138 | Michael S. Tsirkin | RAMBlock * const *bblock = b;
|
272 | 8fec98b4 | Avi Kivity | |
273 | 8fec98b4 | Avi Kivity | return strcmp((*ablock)->idstr, (*bblock)->idstr);
|
274 | b2e0a138 | Michael S. Tsirkin | } |
275 | b2e0a138 | Michael S. Tsirkin | |
276 | b2e0a138 | Michael S. Tsirkin | static void sort_ram_list(void) |
277 | b2e0a138 | Michael S. Tsirkin | { |
278 | b2e0a138 | Michael S. Tsirkin | RAMBlock *block, *nblock, **blocks; |
279 | b2e0a138 | Michael S. Tsirkin | int n;
|
280 | b2e0a138 | Michael S. Tsirkin | n = 0;
|
281 | b2e0a138 | Michael S. Tsirkin | QLIST_FOREACH(block, &ram_list.blocks, next) { |
282 | b2e0a138 | Michael S. Tsirkin | ++n; |
283 | b2e0a138 | Michael S. Tsirkin | } |
284 | 7267c094 | Anthony Liguori | blocks = g_malloc(n * sizeof *blocks);
|
285 | b2e0a138 | Michael S. Tsirkin | n = 0;
|
286 | b2e0a138 | Michael S. Tsirkin | QLIST_FOREACH_SAFE(block, &ram_list.blocks, next, nblock) { |
287 | b2e0a138 | Michael S. Tsirkin | blocks[n++] = block; |
288 | b2e0a138 | Michael S. Tsirkin | QLIST_REMOVE(block, next); |
289 | b2e0a138 | Michael S. Tsirkin | } |
290 | b2e0a138 | Michael S. Tsirkin | qsort(blocks, n, sizeof *blocks, block_compar);
|
291 | b2e0a138 | Michael S. Tsirkin | while (--n >= 0) { |
292 | b2e0a138 | Michael S. Tsirkin | QLIST_INSERT_HEAD(&ram_list.blocks, blocks[n], next); |
293 | b2e0a138 | Michael S. Tsirkin | } |
294 | 7267c094 | Anthony Liguori | g_free(blocks); |
295 | b2e0a138 | Michael S. Tsirkin | } |
296 | b2e0a138 | Michael S. Tsirkin | |
297 | 539de124 | Luiz Capitulino | int ram_save_live(QEMUFile *f, int stage, void *opaque) |
298 | ad96090a | Blue Swirl | { |
299 | ad96090a | Blue Swirl | ram_addr_t addr; |
300 | ad96090a | Blue Swirl | uint64_t bytes_transferred_last; |
301 | ad96090a | Blue Swirl | double bwidth = 0; |
302 | ad96090a | Blue Swirl | uint64_t expected_time = 0;
|
303 | 2975725f | Juan Quintela | int ret;
|
304 | ad96090a | Blue Swirl | |
305 | ad96090a | Blue Swirl | if (stage < 0) { |
306 | 8f77558f | Avi Kivity | memory_global_dirty_log_stop(); |
307 | ad96090a | Blue Swirl | return 0; |
308 | ad96090a | Blue Swirl | } |
309 | ad96090a | Blue Swirl | |
310 | 86e775c6 | Avi Kivity | memory_global_sync_dirty_bitmap(get_system_memory()); |
311 | ad96090a | Blue Swirl | |
312 | ad96090a | Blue Swirl | if (stage == 1) { |
313 | 97ab12d4 | Alex Williamson | RAMBlock *block; |
314 | ad96090a | Blue Swirl | bytes_transferred = 0;
|
315 | 760e77ea | Alex Williamson | last_block = NULL;
|
316 | 760e77ea | Alex Williamson | last_offset = 0;
|
317 | b2e0a138 | Michael S. Tsirkin | sort_ram_list(); |
318 | ad96090a | Blue Swirl | |
319 | ad96090a | Blue Swirl | /* Make sure all dirty bits are set */
|
320 | e44359c3 | Alex Williamson | QLIST_FOREACH(block, &ram_list.blocks, next) { |
321 | 71c510e2 | Avi Kivity | for (addr = 0; addr < block->length; addr += TARGET_PAGE_SIZE) { |
322 | cd7a45c9 | Blue Swirl | if (!memory_region_get_dirty(block->mr, addr, TARGET_PAGE_SIZE,
|
323 | 71c510e2 | Avi Kivity | DIRTY_MEMORY_MIGRATION)) { |
324 | fd4aa979 | Blue Swirl | memory_region_set_dirty(block->mr, addr, TARGET_PAGE_SIZE); |
325 | e44359c3 | Alex Williamson | } |
326 | ad96090a | Blue Swirl | } |
327 | ad96090a | Blue Swirl | } |
328 | ad96090a | Blue Swirl | |
329 | 8f77558f | Avi Kivity | memory_global_dirty_log_start(); |
330 | ad96090a | Blue Swirl | |
331 | e44359c3 | Alex Williamson | qemu_put_be64(f, ram_bytes_total() | RAM_SAVE_FLAG_MEM_SIZE); |
332 | 97ab12d4 | Alex Williamson | |
333 | 97ab12d4 | Alex Williamson | QLIST_FOREACH(block, &ram_list.blocks, next) { |
334 | 97ab12d4 | Alex Williamson | qemu_put_byte(f, strlen(block->idstr)); |
335 | 97ab12d4 | Alex Williamson | qemu_put_buffer(f, (uint8_t *)block->idstr, strlen(block->idstr)); |
336 | 97ab12d4 | Alex Williamson | qemu_put_be64(f, block->length); |
337 | 97ab12d4 | Alex Williamson | } |
338 | ad96090a | Blue Swirl | } |
339 | ad96090a | Blue Swirl | |
340 | ad96090a | Blue Swirl | bytes_transferred_last = bytes_transferred; |
341 | ad96090a | Blue Swirl | bwidth = qemu_get_clock_ns(rt_clock); |
342 | ad96090a | Blue Swirl | |
343 | 2975725f | Juan Quintela | while ((ret = qemu_file_rate_limit(f)) == 0) { |
344 | 3fc250b4 | Pierre Riteau | int bytes_sent;
|
345 | ad96090a | Blue Swirl | |
346 | 3fc250b4 | Pierre Riteau | bytes_sent = ram_save_block(f); |
347 | 3fc250b4 | Pierre Riteau | bytes_transferred += bytes_sent; |
348 | 3fc250b4 | Pierre Riteau | if (bytes_sent == 0) { /* no more blocks */ |
349 | ad96090a | Blue Swirl | break;
|
350 | ad96090a | Blue Swirl | } |
351 | ad96090a | Blue Swirl | } |
352 | ad96090a | Blue Swirl | |
353 | 2975725f | Juan Quintela | if (ret < 0) { |
354 | 2975725f | Juan Quintela | return ret;
|
355 | 2975725f | Juan Quintela | } |
356 | 2975725f | Juan Quintela | |
357 | ad96090a | Blue Swirl | bwidth = qemu_get_clock_ns(rt_clock) - bwidth; |
358 | ad96090a | Blue Swirl | bwidth = (bytes_transferred - bytes_transferred_last) / bwidth; |
359 | ad96090a | Blue Swirl | |
360 | ad96090a | Blue Swirl | /* if we haven't transferred anything this round, force expected_time to a
|
361 | ad96090a | Blue Swirl | * a very high value, but without crashing */
|
362 | ad96090a | Blue Swirl | if (bwidth == 0) { |
363 | ad96090a | Blue Swirl | bwidth = 0.000001; |
364 | ad96090a | Blue Swirl | } |
365 | ad96090a | Blue Swirl | |
366 | ad96090a | Blue Swirl | /* try transferring iterative blocks of memory */
|
367 | ad96090a | Blue Swirl | if (stage == 3) { |
368 | 3fc250b4 | Pierre Riteau | int bytes_sent;
|
369 | 3fc250b4 | Pierre Riteau | |
370 | ad96090a | Blue Swirl | /* flush all remaining blocks regardless of rate limiting */
|
371 | 3fc250b4 | Pierre Riteau | while ((bytes_sent = ram_save_block(f)) != 0) { |
372 | 3fc250b4 | Pierre Riteau | bytes_transferred += bytes_sent; |
373 | ad96090a | Blue Swirl | } |
374 | 8f77558f | Avi Kivity | memory_global_dirty_log_stop(); |
375 | ad96090a | Blue Swirl | } |
376 | ad96090a | Blue Swirl | |
377 | ad96090a | Blue Swirl | qemu_put_be64(f, RAM_SAVE_FLAG_EOS); |
378 | ad96090a | Blue Swirl | |
379 | ad96090a | Blue Swirl | expected_time = ram_save_remaining() * TARGET_PAGE_SIZE / bwidth; |
380 | ad96090a | Blue Swirl | |
381 | ad96090a | Blue Swirl | return (stage == 2) && (expected_time <= migrate_max_downtime()); |
382 | ad96090a | Blue Swirl | } |
383 | ad96090a | Blue Swirl | |
384 | a55bbe31 | Alex Williamson | static inline void *host_from_stream_offset(QEMUFile *f, |
385 | a55bbe31 | Alex Williamson | ram_addr_t offset, |
386 | a55bbe31 | Alex Williamson | int flags)
|
387 | a55bbe31 | Alex Williamson | { |
388 | a55bbe31 | Alex Williamson | static RAMBlock *block = NULL; |
389 | a55bbe31 | Alex Williamson | char id[256]; |
390 | a55bbe31 | Alex Williamson | uint8_t len; |
391 | a55bbe31 | Alex Williamson | |
392 | a55bbe31 | Alex Williamson | if (flags & RAM_SAVE_FLAG_CONTINUE) {
|
393 | a55bbe31 | Alex Williamson | if (!block) {
|
394 | a55bbe31 | Alex Williamson | fprintf(stderr, "Ack, bad migration stream!\n");
|
395 | a55bbe31 | Alex Williamson | return NULL; |
396 | a55bbe31 | Alex Williamson | } |
397 | a55bbe31 | Alex Williamson | |
398 | dc94a7ed | Avi Kivity | return memory_region_get_ram_ptr(block->mr) + offset;
|
399 | a55bbe31 | Alex Williamson | } |
400 | a55bbe31 | Alex Williamson | |
401 | a55bbe31 | Alex Williamson | len = qemu_get_byte(f); |
402 | a55bbe31 | Alex Williamson | qemu_get_buffer(f, (uint8_t *)id, len); |
403 | a55bbe31 | Alex Williamson | id[len] = 0;
|
404 | a55bbe31 | Alex Williamson | |
405 | a55bbe31 | Alex Williamson | QLIST_FOREACH(block, &ram_list.blocks, next) { |
406 | a55bbe31 | Alex Williamson | if (!strncmp(id, block->idstr, sizeof(id))) |
407 | dc94a7ed | Avi Kivity | return memory_region_get_ram_ptr(block->mr) + offset;
|
408 | a55bbe31 | Alex Williamson | } |
409 | a55bbe31 | Alex Williamson | |
410 | a55bbe31 | Alex Williamson | fprintf(stderr, "Can't find block %s!\n", id);
|
411 | a55bbe31 | Alex Williamson | return NULL; |
412 | a55bbe31 | Alex Williamson | } |
413 | a55bbe31 | Alex Williamson | |
414 | ad96090a | Blue Swirl | int ram_load(QEMUFile *f, void *opaque, int version_id) |
415 | ad96090a | Blue Swirl | { |
416 | ad96090a | Blue Swirl | ram_addr_t addr; |
417 | ad96090a | Blue Swirl | int flags;
|
418 | 42802d47 | Juan Quintela | int error;
|
419 | ad96090a | Blue Swirl | |
420 | f09f2189 | Avi Kivity | if (version_id < 4 || version_id > 4) { |
421 | ad96090a | Blue Swirl | return -EINVAL;
|
422 | ad96090a | Blue Swirl | } |
423 | ad96090a | Blue Swirl | |
424 | ad96090a | Blue Swirl | do {
|
425 | ad96090a | Blue Swirl | addr = qemu_get_be64(f); |
426 | ad96090a | Blue Swirl | |
427 | ad96090a | Blue Swirl | flags = addr & ~TARGET_PAGE_MASK; |
428 | ad96090a | Blue Swirl | addr &= TARGET_PAGE_MASK; |
429 | ad96090a | Blue Swirl | |
430 | ad96090a | Blue Swirl | if (flags & RAM_SAVE_FLAG_MEM_SIZE) {
|
431 | f09f2189 | Avi Kivity | if (version_id == 4) { |
432 | 97ab12d4 | Alex Williamson | /* Synchronize RAM block list */
|
433 | 97ab12d4 | Alex Williamson | char id[256]; |
434 | 97ab12d4 | Alex Williamson | ram_addr_t length; |
435 | 97ab12d4 | Alex Williamson | ram_addr_t total_ram_bytes = addr; |
436 | 97ab12d4 | Alex Williamson | |
437 | 97ab12d4 | Alex Williamson | while (total_ram_bytes) {
|
438 | 97ab12d4 | Alex Williamson | RAMBlock *block; |
439 | 97ab12d4 | Alex Williamson | uint8_t len; |
440 | 97ab12d4 | Alex Williamson | |
441 | 97ab12d4 | Alex Williamson | len = qemu_get_byte(f); |
442 | 97ab12d4 | Alex Williamson | qemu_get_buffer(f, (uint8_t *)id, len); |
443 | 97ab12d4 | Alex Williamson | id[len] = 0;
|
444 | 97ab12d4 | Alex Williamson | length = qemu_get_be64(f); |
445 | 97ab12d4 | Alex Williamson | |
446 | 97ab12d4 | Alex Williamson | QLIST_FOREACH(block, &ram_list.blocks, next) { |
447 | 97ab12d4 | Alex Williamson | if (!strncmp(id, block->idstr, sizeof(id))) { |
448 | 97ab12d4 | Alex Williamson | if (block->length != length)
|
449 | 97ab12d4 | Alex Williamson | return -EINVAL;
|
450 | 97ab12d4 | Alex Williamson | break;
|
451 | 97ab12d4 | Alex Williamson | } |
452 | 97ab12d4 | Alex Williamson | } |
453 | 97ab12d4 | Alex Williamson | |
454 | 97ab12d4 | Alex Williamson | if (!block) {
|
455 | fb787f81 | Alex Williamson | fprintf(stderr, "Unknown ramblock \"%s\", cannot "
|
456 | fb787f81 | Alex Williamson | "accept migration\n", id);
|
457 | fb787f81 | Alex Williamson | return -EINVAL;
|
458 | 97ab12d4 | Alex Williamson | } |
459 | 97ab12d4 | Alex Williamson | |
460 | 97ab12d4 | Alex Williamson | total_ram_bytes -= length; |
461 | 97ab12d4 | Alex Williamson | } |
462 | ad96090a | Blue Swirl | } |
463 | ad96090a | Blue Swirl | } |
464 | ad96090a | Blue Swirl | |
465 | ad96090a | Blue Swirl | if (flags & RAM_SAVE_FLAG_COMPRESS) {
|
466 | 97ab12d4 | Alex Williamson | void *host;
|
467 | 97ab12d4 | Alex Williamson | uint8_t ch; |
468 | 97ab12d4 | Alex Williamson | |
469 | f09f2189 | Avi Kivity | host = host_from_stream_offset(f, addr, flags); |
470 | 492fb99c | Michael S. Tsirkin | if (!host) {
|
471 | 492fb99c | Michael S. Tsirkin | return -EINVAL;
|
472 | 492fb99c | Michael S. Tsirkin | } |
473 | 97ab12d4 | Alex Williamson | |
474 | 97ab12d4 | Alex Williamson | ch = qemu_get_byte(f); |
475 | 97ab12d4 | Alex Williamson | memset(host, ch, TARGET_PAGE_SIZE); |
476 | ad96090a | Blue Swirl | #ifndef _WIN32
|
477 | ad96090a | Blue Swirl | if (ch == 0 && |
478 | ad96090a | Blue Swirl | (!kvm_enabled() || kvm_has_sync_mmu())) { |
479 | e78815a5 | Andreas Färber | qemu_madvise(host, TARGET_PAGE_SIZE, QEMU_MADV_DONTNEED); |
480 | ad96090a | Blue Swirl | } |
481 | ad96090a | Blue Swirl | #endif
|
482 | ad96090a | Blue Swirl | } else if (flags & RAM_SAVE_FLAG_PAGE) { |
483 | 97ab12d4 | Alex Williamson | void *host;
|
484 | 97ab12d4 | Alex Williamson | |
485 | f09f2189 | Avi Kivity | host = host_from_stream_offset(f, addr, flags); |
486 | 97ab12d4 | Alex Williamson | |
487 | 97ab12d4 | Alex Williamson | qemu_get_buffer(f, host, TARGET_PAGE_SIZE); |
488 | ad96090a | Blue Swirl | } |
489 | 42802d47 | Juan Quintela | error = qemu_file_get_error(f); |
490 | 42802d47 | Juan Quintela | if (error) {
|
491 | 42802d47 | Juan Quintela | return error;
|
492 | ad96090a | Blue Swirl | } |
493 | ad96090a | Blue Swirl | } while (!(flags & RAM_SAVE_FLAG_EOS));
|
494 | ad96090a | Blue Swirl | |
495 | ad96090a | Blue Swirl | return 0; |
496 | ad96090a | Blue Swirl | } |
497 | ad96090a | Blue Swirl | |
498 | ad96090a | Blue Swirl | #ifdef HAS_AUDIO
|
499 | 0dfa5ef9 | Isaku Yamahata | struct soundhw {
|
500 | 0dfa5ef9 | Isaku Yamahata | const char *name; |
501 | 0dfa5ef9 | Isaku Yamahata | const char *descr; |
502 | 0dfa5ef9 | Isaku Yamahata | int enabled;
|
503 | 0dfa5ef9 | Isaku Yamahata | int isa;
|
504 | 0dfa5ef9 | Isaku Yamahata | union {
|
505 | 4a0f031d | Hervé Poussineau | int (*init_isa) (ISABus *bus);
|
506 | 0dfa5ef9 | Isaku Yamahata | int (*init_pci) (PCIBus *bus);
|
507 | 0dfa5ef9 | Isaku Yamahata | } init; |
508 | 0dfa5ef9 | Isaku Yamahata | }; |
509 | 0dfa5ef9 | Isaku Yamahata | |
510 | 0dfa5ef9 | Isaku Yamahata | static struct soundhw soundhw[] = { |
511 | ad96090a | Blue Swirl | #ifdef HAS_AUDIO_CHOICE
|
512 | da12872a | Hervé Poussineau | #ifdef CONFIG_PCSPK
|
513 | ad96090a | Blue Swirl | { |
514 | ad96090a | Blue Swirl | "pcspk",
|
515 | ad96090a | Blue Swirl | "PC speaker",
|
516 | ad96090a | Blue Swirl | 0,
|
517 | ad96090a | Blue Swirl | 1,
|
518 | ad96090a | Blue Swirl | { .init_isa = pcspk_audio_init } |
519 | ad96090a | Blue Swirl | }, |
520 | ad96090a | Blue Swirl | #endif
|
521 | ad96090a | Blue Swirl | |
522 | ad96090a | Blue Swirl | #ifdef CONFIG_SB16
|
523 | ad96090a | Blue Swirl | { |
524 | ad96090a | Blue Swirl | "sb16",
|
525 | ad96090a | Blue Swirl | "Creative Sound Blaster 16",
|
526 | ad96090a | Blue Swirl | 0,
|
527 | ad96090a | Blue Swirl | 1,
|
528 | ad96090a | Blue Swirl | { .init_isa = SB16_init } |
529 | ad96090a | Blue Swirl | }, |
530 | ad96090a | Blue Swirl | #endif
|
531 | ad96090a | Blue Swirl | |
532 | ad96090a | Blue Swirl | #ifdef CONFIG_CS4231A
|
533 | ad96090a | Blue Swirl | { |
534 | ad96090a | Blue Swirl | "cs4231a",
|
535 | ad96090a | Blue Swirl | "CS4231A",
|
536 | ad96090a | Blue Swirl | 0,
|
537 | ad96090a | Blue Swirl | 1,
|
538 | ad96090a | Blue Swirl | { .init_isa = cs4231a_init } |
539 | ad96090a | Blue Swirl | }, |
540 | ad96090a | Blue Swirl | #endif
|
541 | ad96090a | Blue Swirl | |
542 | ad96090a | Blue Swirl | #ifdef CONFIG_ADLIB
|
543 | ad96090a | Blue Swirl | { |
544 | ad96090a | Blue Swirl | "adlib",
|
545 | ad96090a | Blue Swirl | #ifdef HAS_YMF262
|
546 | ad96090a | Blue Swirl | "Yamaha YMF262 (OPL3)",
|
547 | ad96090a | Blue Swirl | #else
|
548 | ad96090a | Blue Swirl | "Yamaha YM3812 (OPL2)",
|
549 | ad96090a | Blue Swirl | #endif
|
550 | ad96090a | Blue Swirl | 0,
|
551 | ad96090a | Blue Swirl | 1,
|
552 | ad96090a | Blue Swirl | { .init_isa = Adlib_init } |
553 | ad96090a | Blue Swirl | }, |
554 | ad96090a | Blue Swirl | #endif
|
555 | ad96090a | Blue Swirl | |
556 | ad96090a | Blue Swirl | #ifdef CONFIG_GUS
|
557 | ad96090a | Blue Swirl | { |
558 | ad96090a | Blue Swirl | "gus",
|
559 | ad96090a | Blue Swirl | "Gravis Ultrasound GF1",
|
560 | ad96090a | Blue Swirl | 0,
|
561 | ad96090a | Blue Swirl | 1,
|
562 | ad96090a | Blue Swirl | { .init_isa = GUS_init } |
563 | ad96090a | Blue Swirl | }, |
564 | ad96090a | Blue Swirl | #endif
|
565 | ad96090a | Blue Swirl | |
566 | ad96090a | Blue Swirl | #ifdef CONFIG_AC97
|
567 | ad96090a | Blue Swirl | { |
568 | ad96090a | Blue Swirl | "ac97",
|
569 | ad96090a | Blue Swirl | "Intel 82801AA AC97 Audio",
|
570 | ad96090a | Blue Swirl | 0,
|
571 | ad96090a | Blue Swirl | 0,
|
572 | ad96090a | Blue Swirl | { .init_pci = ac97_init } |
573 | ad96090a | Blue Swirl | }, |
574 | ad96090a | Blue Swirl | #endif
|
575 | ad96090a | Blue Swirl | |
576 | ad96090a | Blue Swirl | #ifdef CONFIG_ES1370
|
577 | ad96090a | Blue Swirl | { |
578 | ad96090a | Blue Swirl | "es1370",
|
579 | ad96090a | Blue Swirl | "ENSONIQ AudioPCI ES1370",
|
580 | ad96090a | Blue Swirl | 0,
|
581 | ad96090a | Blue Swirl | 0,
|
582 | ad96090a | Blue Swirl | { .init_pci = es1370_init } |
583 | ad96090a | Blue Swirl | }, |
584 | ad96090a | Blue Swirl | #endif
|
585 | ad96090a | Blue Swirl | |
586 | d61a4ce8 | Gerd Hoffmann | #ifdef CONFIG_HDA
|
587 | d61a4ce8 | Gerd Hoffmann | { |
588 | d61a4ce8 | Gerd Hoffmann | "hda",
|
589 | d61a4ce8 | Gerd Hoffmann | "Intel HD Audio",
|
590 | d61a4ce8 | Gerd Hoffmann | 0,
|
591 | d61a4ce8 | Gerd Hoffmann | 0,
|
592 | d61a4ce8 | Gerd Hoffmann | { .init_pci = intel_hda_and_codec_init } |
593 | d61a4ce8 | Gerd Hoffmann | }, |
594 | d61a4ce8 | Gerd Hoffmann | #endif
|
595 | d61a4ce8 | Gerd Hoffmann | |
596 | ad96090a | Blue Swirl | #endif /* HAS_AUDIO_CHOICE */ |
597 | ad96090a | Blue Swirl | |
598 | ad96090a | Blue Swirl | { NULL, NULL, 0, 0, { NULL } } |
599 | ad96090a | Blue Swirl | }; |
600 | ad96090a | Blue Swirl | |
601 | ad96090a | Blue Swirl | void select_soundhw(const char *optarg) |
602 | ad96090a | Blue Swirl | { |
603 | ad96090a | Blue Swirl | struct soundhw *c;
|
604 | ad96090a | Blue Swirl | |
605 | ad96090a | Blue Swirl | if (*optarg == '?') { |
606 | ad96090a | Blue Swirl | show_valid_cards:
|
607 | ad96090a | Blue Swirl | |
608 | ad96090a | Blue Swirl | printf("Valid sound card names (comma separated):\n");
|
609 | ad96090a | Blue Swirl | for (c = soundhw; c->name; ++c) {
|
610 | ad96090a | Blue Swirl | printf ("%-11s %s\n", c->name, c->descr);
|
611 | ad96090a | Blue Swirl | } |
612 | ad96090a | Blue Swirl | printf("\n-soundhw all will enable all of the above\n");
|
613 | ad96090a | Blue Swirl | exit(*optarg != '?');
|
614 | ad96090a | Blue Swirl | } |
615 | ad96090a | Blue Swirl | else {
|
616 | ad96090a | Blue Swirl | size_t l; |
617 | ad96090a | Blue Swirl | const char *p; |
618 | ad96090a | Blue Swirl | char *e;
|
619 | ad96090a | Blue Swirl | int bad_card = 0; |
620 | ad96090a | Blue Swirl | |
621 | ad96090a | Blue Swirl | if (!strcmp(optarg, "all")) { |
622 | ad96090a | Blue Swirl | for (c = soundhw; c->name; ++c) {
|
623 | ad96090a | Blue Swirl | c->enabled = 1;
|
624 | ad96090a | Blue Swirl | } |
625 | ad96090a | Blue Swirl | return;
|
626 | ad96090a | Blue Swirl | } |
627 | ad96090a | Blue Swirl | |
628 | ad96090a | Blue Swirl | p = optarg; |
629 | ad96090a | Blue Swirl | while (*p) {
|
630 | ad96090a | Blue Swirl | e = strchr(p, ',');
|
631 | ad96090a | Blue Swirl | l = !e ? strlen(p) : (size_t) (e - p); |
632 | ad96090a | Blue Swirl | |
633 | ad96090a | Blue Swirl | for (c = soundhw; c->name; ++c) {
|
634 | ad96090a | Blue Swirl | if (!strncmp(c->name, p, l) && !c->name[l]) {
|
635 | ad96090a | Blue Swirl | c->enabled = 1;
|
636 | ad96090a | Blue Swirl | break;
|
637 | ad96090a | Blue Swirl | } |
638 | ad96090a | Blue Swirl | } |
639 | ad96090a | Blue Swirl | |
640 | ad96090a | Blue Swirl | if (!c->name) {
|
641 | ad96090a | Blue Swirl | if (l > 80) { |
642 | ad96090a | Blue Swirl | fprintf(stderr, |
643 | ad96090a | Blue Swirl | "Unknown sound card name (too big to show)\n");
|
644 | ad96090a | Blue Swirl | } |
645 | ad96090a | Blue Swirl | else {
|
646 | ad96090a | Blue Swirl | fprintf(stderr, "Unknown sound card name `%.*s'\n",
|
647 | ad96090a | Blue Swirl | (int) l, p);
|
648 | ad96090a | Blue Swirl | } |
649 | ad96090a | Blue Swirl | bad_card = 1;
|
650 | ad96090a | Blue Swirl | } |
651 | ad96090a | Blue Swirl | p += l + (e != NULL);
|
652 | ad96090a | Blue Swirl | } |
653 | ad96090a | Blue Swirl | |
654 | ad96090a | Blue Swirl | if (bad_card) {
|
655 | ad96090a | Blue Swirl | goto show_valid_cards;
|
656 | ad96090a | Blue Swirl | } |
657 | ad96090a | Blue Swirl | } |
658 | ad96090a | Blue Swirl | } |
659 | 0dfa5ef9 | Isaku Yamahata | |
660 | 4a0f031d | Hervé Poussineau | void audio_init(ISABus *isa_bus, PCIBus *pci_bus)
|
661 | 0dfa5ef9 | Isaku Yamahata | { |
662 | 0dfa5ef9 | Isaku Yamahata | struct soundhw *c;
|
663 | 0dfa5ef9 | Isaku Yamahata | |
664 | 0dfa5ef9 | Isaku Yamahata | for (c = soundhw; c->name; ++c) {
|
665 | 0dfa5ef9 | Isaku Yamahata | if (c->enabled) {
|
666 | 0dfa5ef9 | Isaku Yamahata | if (c->isa) {
|
667 | 4a0f031d | Hervé Poussineau | if (isa_bus) {
|
668 | 4a0f031d | Hervé Poussineau | c->init.init_isa(isa_bus); |
669 | 0dfa5ef9 | Isaku Yamahata | } |
670 | 0dfa5ef9 | Isaku Yamahata | } else {
|
671 | 0dfa5ef9 | Isaku Yamahata | if (pci_bus) {
|
672 | 0dfa5ef9 | Isaku Yamahata | c->init.init_pci(pci_bus); |
673 | 0dfa5ef9 | Isaku Yamahata | } |
674 | 0dfa5ef9 | Isaku Yamahata | } |
675 | 0dfa5ef9 | Isaku Yamahata | } |
676 | 0dfa5ef9 | Isaku Yamahata | } |
677 | 0dfa5ef9 | Isaku Yamahata | } |
678 | ad96090a | Blue Swirl | #else
|
679 | ad96090a | Blue Swirl | void select_soundhw(const char *optarg) |
680 | ad96090a | Blue Swirl | { |
681 | ad96090a | Blue Swirl | } |
682 | 4a0f031d | Hervé Poussineau | void audio_init(ISABus *isa_bus, PCIBus *pci_bus)
|
683 | 0dfa5ef9 | Isaku Yamahata | { |
684 | 0dfa5ef9 | Isaku Yamahata | } |
685 | ad96090a | Blue Swirl | #endif
|
686 | ad96090a | Blue Swirl | |
687 | ad96090a | Blue Swirl | int qemu_uuid_parse(const char *str, uint8_t *uuid) |
688 | ad96090a | Blue Swirl | { |
689 | ad96090a | Blue Swirl | int ret;
|
690 | ad96090a | Blue Swirl | |
691 | ad96090a | Blue Swirl | if (strlen(str) != 36) { |
692 | ad96090a | Blue Swirl | return -1; |
693 | ad96090a | Blue Swirl | } |
694 | ad96090a | Blue Swirl | |
695 | ad96090a | Blue Swirl | ret = sscanf(str, UUID_FMT, &uuid[0], &uuid[1], &uuid[2], &uuid[3], |
696 | ad96090a | Blue Swirl | &uuid[4], &uuid[5], &uuid[6], &uuid[7], &uuid[8], &uuid[9], |
697 | ad96090a | Blue Swirl | &uuid[10], &uuid[11], &uuid[12], &uuid[13], &uuid[14], |
698 | ad96090a | Blue Swirl | &uuid[15]);
|
699 | ad96090a | Blue Swirl | |
700 | ad96090a | Blue Swirl | if (ret != 16) { |
701 | ad96090a | Blue Swirl | return -1; |
702 | ad96090a | Blue Swirl | } |
703 | ad96090a | Blue Swirl | #ifdef TARGET_I386
|
704 | ad96090a | Blue Swirl | smbios_add_field(1, offsetof(struct smbios_type_1, uuid), 16, uuid); |
705 | ad96090a | Blue Swirl | #endif
|
706 | ad96090a | Blue Swirl | return 0; |
707 | ad96090a | Blue Swirl | } |
708 | ad96090a | Blue Swirl | |
709 | ad96090a | Blue Swirl | void do_acpitable_option(const char *optarg) |
710 | ad96090a | Blue Swirl | { |
711 | ad96090a | Blue Swirl | #ifdef TARGET_I386
|
712 | ad96090a | Blue Swirl | if (acpi_table_add(optarg) < 0) { |
713 | ad96090a | Blue Swirl | fprintf(stderr, "Wrong acpi table provided\n");
|
714 | ad96090a | Blue Swirl | exit(1);
|
715 | ad96090a | Blue Swirl | } |
716 | ad96090a | Blue Swirl | #endif
|
717 | ad96090a | Blue Swirl | } |
718 | ad96090a | Blue Swirl | |
719 | ad96090a | Blue Swirl | void do_smbios_option(const char *optarg) |
720 | ad96090a | Blue Swirl | { |
721 | ad96090a | Blue Swirl | #ifdef TARGET_I386
|
722 | ad96090a | Blue Swirl | if (smbios_entry_add(optarg) < 0) { |
723 | ad96090a | Blue Swirl | fprintf(stderr, "Wrong smbios provided\n");
|
724 | ad96090a | Blue Swirl | exit(1);
|
725 | ad96090a | Blue Swirl | } |
726 | ad96090a | Blue Swirl | #endif
|
727 | ad96090a | Blue Swirl | } |
728 | ad96090a | Blue Swirl | |
729 | ad96090a | Blue Swirl | void cpudef_init(void) |
730 | ad96090a | Blue Swirl | { |
731 | ad96090a | Blue Swirl | #if defined(cpudef_setup)
|
732 | ad96090a | Blue Swirl | cpudef_setup(); /* parse cpu definitions in target config file */
|
733 | ad96090a | Blue Swirl | #endif
|
734 | ad96090a | Blue Swirl | } |
735 | ad96090a | Blue Swirl | |
736 | ad96090a | Blue Swirl | int audio_available(void) |
737 | ad96090a | Blue Swirl | { |
738 | ad96090a | Blue Swirl | #ifdef HAS_AUDIO
|
739 | ad96090a | Blue Swirl | return 1; |
740 | ad96090a | Blue Swirl | #else
|
741 | ad96090a | Blue Swirl | return 0; |
742 | ad96090a | Blue Swirl | #endif
|
743 | ad96090a | Blue Swirl | } |
744 | ad96090a | Blue Swirl | |
745 | 303d4e86 | Anthony PERARD | int tcg_available(void) |
746 | 303d4e86 | Anthony PERARD | { |
747 | 303d4e86 | Anthony PERARD | return 1; |
748 | 303d4e86 | Anthony PERARD | } |
749 | 303d4e86 | Anthony PERARD | |
750 | ad96090a | Blue Swirl | int kvm_available(void) |
751 | ad96090a | Blue Swirl | { |
752 | ad96090a | Blue Swirl | #ifdef CONFIG_KVM
|
753 | ad96090a | Blue Swirl | return 1; |
754 | ad96090a | Blue Swirl | #else
|
755 | ad96090a | Blue Swirl | return 0; |
756 | ad96090a | Blue Swirl | #endif
|
757 | ad96090a | Blue Swirl | } |
758 | ad96090a | Blue Swirl | |
759 | ad96090a | Blue Swirl | int xen_available(void) |
760 | ad96090a | Blue Swirl | { |
761 | ad96090a | Blue Swirl | #ifdef CONFIG_XEN
|
762 | ad96090a | Blue Swirl | return 1; |
763 | ad96090a | Blue Swirl | #else
|
764 | ad96090a | Blue Swirl | return 0; |
765 | ad96090a | Blue Swirl | #endif
|
766 | ad96090a | Blue Swirl | } |