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/*
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* Test Server
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*
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* Copyright IBM, Corp. 2011
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*
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* Authors:
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* Anthony Liguori <aliguori@us.ibm.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*
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*/
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#include "qtest.h" |
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#include "hw/qdev.h" |
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#include "qemu-char.h" |
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#include "ioport.h" |
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#include "memory.h" |
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#include "hw/irq.h" |
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#include "sysemu.h" |
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#include "cpus.h" |
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#define MAX_IRQ 256 |
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const char *qtest_chrdev; |
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const char *qtest_log; |
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int qtest_allowed = 0; |
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static DeviceState *irq_intercept_dev;
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static FILE *qtest_log_fp;
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static CharDriverState *qtest_chr;
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static GString *inbuf;
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static int irq_levels[MAX_IRQ]; |
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static qemu_timeval start_time;
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static bool qtest_opened; |
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#define FMT_timeval "%ld.%06ld" |
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/**
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* QTest Protocol
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*
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* Line based protocol, request/response based. Server can send async messages
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* so clients should always handle many async messages before the response
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* comes in.
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*
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* Valid requests
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*
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* Clock management:
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*
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* The qtest client is completely in charge of the vm_clock. qtest commands
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* let you adjust the value of the clock (monotonically). All the commands
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* return the current value of the clock in nanoseconds.
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*
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* > clock_step
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* < OK VALUE
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*
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* Advance the clock to the next deadline. Useful when waiting for
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* asynchronous events.
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*
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* > clock_step NS
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* < OK VALUE
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*
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* Advance the clock by NS nanoseconds.
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*
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* > clock_set NS
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* < OK VALUE
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*
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* Advance the clock to NS nanoseconds (do nothing if it's already past).
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*
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* PIO and memory access:
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*
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* > outb ADDR VALUE
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* < OK
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*
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* > outw ADDR VALUE
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* < OK
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*
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* > outl ADDR VALUE
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* < OK
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*
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* > inb ADDR
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* < OK VALUE
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*
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* > inw ADDR
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* < OK VALUE
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*
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* > inl ADDR
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* < OK VALUE
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*
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* > read ADDR SIZE
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* < OK DATA
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*
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* > write ADDR SIZE DATA
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* < OK
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*
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* ADDR, SIZE, VALUE are all integers parsed with strtoul() with a base of 0.
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*
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* DATA is an arbitrarily long hex number prefixed with '0x'. If it's smaller
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* than the expected size, the value will be zero filled at the end of the data
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* sequence.
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*
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* IRQ management:
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*
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* > irq_intercept_in QOM-PATH
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* < OK
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*
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* > irq_intercept_out QOM-PATH
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* < OK
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*
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* Attach to the gpio-in (resp. gpio-out) pins exported by the device at
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* QOM-PATH. When the pin is triggered, one of the following async messages
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* will be printed to the qtest stream:
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*
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* IRQ raise NUM
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* IRQ lower NUM
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*
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* where NUM is an IRQ number. For the PC, interrupts can be intercepted
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* simply with "irq_intercept_in ioapic" (note that IRQ0 comes out with
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* NUM=0 even though it is remapped to GSI 2).
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*/
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static int hex2nib(char ch) |
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{ |
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if (ch >= '0' && ch <= '9') { |
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return ch - '0'; |
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} else if (ch >= 'a' && ch <= 'f') { |
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return 10 + (ch - 'a'); |
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} else if (ch >= 'A' && ch <= 'F') { |
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return 10 + (ch - 'a'); |
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} else {
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return -1; |
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} |
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} |
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static void qtest_get_time(qemu_timeval *tv) |
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{ |
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qemu_gettimeofday(tv); |
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tv->tv_sec -= start_time.tv_sec; |
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tv->tv_usec -= start_time.tv_usec; |
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if (tv->tv_usec < 0) { |
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tv->tv_usec += 1000000;
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tv->tv_sec -= 1;
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} |
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} |
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static void qtest_send_prefix(CharDriverState *chr) |
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{ |
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qemu_timeval tv; |
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if (!qtest_log_fp || !qtest_opened) {
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return;
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} |
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qtest_get_time(&tv); |
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fprintf(qtest_log_fp, "[S +" FMT_timeval "] ", |
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tv.tv_sec, (long) tv.tv_usec);
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} |
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static void GCC_FMT_ATTR(2, 3) qtest_send(CharDriverState *chr, |
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const char *fmt, ...) |
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{ |
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va_list ap; |
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char buffer[1024]; |
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size_t len; |
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va_start(ap, fmt); |
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len = vsnprintf(buffer, sizeof(buffer), fmt, ap);
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va_end(ap); |
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qemu_chr_fe_write(chr, (uint8_t *)buffer, len); |
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if (qtest_log_fp && qtest_opened) {
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fprintf(qtest_log_fp, "%s", buffer);
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} |
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} |
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static void qtest_irq_handler(void *opaque, int n, int level) |
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{ |
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qemu_irq *old_irqs = opaque; |
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qemu_set_irq(old_irqs[n], level); |
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if (irq_levels[n] != level) {
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CharDriverState *chr = qtest_chr; |
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irq_levels[n] = level; |
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qtest_send_prefix(chr); |
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qtest_send(chr, "IRQ %s %d\n",
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level ? "raise" : "lower", n); |
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} |
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} |
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static void qtest_process_command(CharDriverState *chr, gchar **words) |
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{ |
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const gchar *command;
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g_assert(words); |
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command = words[0];
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if (qtest_log_fp) {
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qemu_timeval tv; |
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int i;
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qtest_get_time(&tv); |
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fprintf(qtest_log_fp, "[R +" FMT_timeval "]", |
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tv.tv_sec, (long) tv.tv_usec);
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for (i = 0; words[i]; i++) { |
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fprintf(qtest_log_fp, " %s", words[i]);
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} |
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fprintf(qtest_log_fp, "\n");
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} |
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g_assert(command); |
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if (strcmp(words[0], "irq_intercept_out") == 0 |
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|| strcmp(words[0], "irq_intercept_in") == 0) { |
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DeviceState *dev; |
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g_assert(words[1]);
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dev = DEVICE(object_resolve_path(words[1], NULL)); |
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if (!dev) {
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qtest_send_prefix(chr); |
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qtest_send(chr, "FAIL Unknown device\n");
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return;
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} |
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if (irq_intercept_dev) {
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qtest_send_prefix(chr); |
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if (irq_intercept_dev != dev) {
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qtest_send(chr, "FAIL IRQ intercept already enabled\n");
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} else {
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qtest_send(chr, "OK\n");
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} |
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return;
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} |
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if (words[0][14] == 'o') { |
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qemu_irq_intercept_out(&dev->gpio_out, qtest_irq_handler, dev->num_gpio_out); |
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} else {
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qemu_irq_intercept_in(dev->gpio_in, qtest_irq_handler, dev->num_gpio_in); |
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} |
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irq_intercept_dev = dev; |
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qtest_send_prefix(chr); |
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qtest_send(chr, "OK\n");
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} else if (strcmp(words[0], "outb") == 0 || |
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strcmp(words[0], "outw") == 0 || |
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strcmp(words[0], "outl") == 0) { |
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uint16_t addr; |
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uint32_t value; |
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g_assert(words[1] && words[2]); |
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addr = strtol(words[1], NULL, 0); |
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value = strtol(words[2], NULL, 0); |
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if (words[0][3] == 'b') { |
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cpu_outb(addr, value); |
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} else if (words[0][3] == 'w') { |
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cpu_outw(addr, value); |
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} else if (words[0][3] == 'l') { |
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cpu_outl(addr, value); |
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} |
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qtest_send_prefix(chr); |
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qtest_send(chr, "OK\n");
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} else if (strcmp(words[0], "inb") == 0 || |
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strcmp(words[0], "inw") == 0 || |
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strcmp(words[0], "inl") == 0) { |
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uint16_t addr; |
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uint32_t value = -1U;
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g_assert(words[1]);
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addr = strtol(words[1], NULL, 0); |
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if (words[0][2] == 'b') { |
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value = cpu_inb(addr); |
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} else if (words[0][2] == 'w') { |
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value = cpu_inw(addr); |
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} else if (words[0][2] == 'l') { |
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value = cpu_inl(addr); |
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} |
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qtest_send_prefix(chr); |
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qtest_send(chr, "OK 0x%04x\n", value);
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} else if (strcmp(words[0], "read") == 0) { |
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uint64_t addr, len, i; |
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uint8_t *data; |
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g_assert(words[1] && words[2]); |
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addr = strtoul(words[1], NULL, 0); |
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len = strtoul(words[2], NULL, 0); |
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data = g_malloc(len); |
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cpu_physical_memory_read(addr, data, len); |
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qtest_send_prefix(chr); |
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qtest_send(chr, "OK 0x");
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for (i = 0; i < len; i++) { |
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qtest_send(chr, "%02x", data[i]);
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} |
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qtest_send(chr, "\n");
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g_free(data); |
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} else if (strcmp(words[0], "write") == 0) { |
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uint64_t addr, len, i; |
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uint8_t *data; |
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size_t data_len; |
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g_assert(words[1] && words[2] && words[3]); |
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addr = strtoul(words[1], NULL, 0); |
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len = strtoul(words[2], NULL, 0); |
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data_len = strlen(words[3]);
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if (data_len < 3) { |
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qtest_send(chr, "ERR invalid argument size\n");
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return;
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} |
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data = g_malloc(len); |
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for (i = 0; i < len; i++) { |
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if ((i * 2 + 4) <= data_len) { |
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data[i] = hex2nib(words[3][i * 2 + 2]) << 4; |
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data[i] |= hex2nib(words[3][i * 2 + 3]); |
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} else {
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data[i] = 0;
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} |
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} |
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cpu_physical_memory_write(addr, data, len); |
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g_free(data); |
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qtest_send_prefix(chr); |
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qtest_send(chr, "OK\n");
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} else if (strcmp(words[0], "clock_step") == 0) { |
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int64_t ns; |
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if (words[1]) { |
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ns = strtoll(words[1], NULL, 0); |
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} else {
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ns = qemu_clock_deadline(vm_clock); |
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} |
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qtest_clock_warp(qemu_get_clock_ns(vm_clock) + ns); |
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qtest_send_prefix(chr); |
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qtest_send(chr, "OK %"PRIi64"\n", (int64_t)qemu_get_clock_ns(vm_clock)); |
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} else if (strcmp(words[0], "clock_set") == 0) { |
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int64_t ns; |
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g_assert(words[1]);
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ns = strtoll(words[1], NULL, 0); |
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qtest_clock_warp(ns); |
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qtest_send_prefix(chr); |
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qtest_send(chr, "OK %"PRIi64"\n", (int64_t)qemu_get_clock_ns(vm_clock)); |
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} else {
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qtest_send_prefix(chr); |
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qtest_send(chr, "FAIL Unknown command `%s'\n", words[0]); |
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} |
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} |
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static void qtest_process_inbuf(CharDriverState *chr, GString *inbuf) |
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{ |
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char *end;
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while ((end = strchr(inbuf->str, '\n')) != NULL) { |
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size_t offset; |
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GString *cmd; |
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gchar **words; |
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offset = end - inbuf->str; |
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cmd = g_string_new_len(inbuf->str, offset); |
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g_string_erase(inbuf, 0, offset + 1); |
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words = g_strsplit(cmd->str, " ", 0); |
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qtest_process_command(chr, words); |
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g_strfreev(words); |
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g_string_free(cmd, TRUE); |
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} |
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} |
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static void qtest_read(void *opaque, const uint8_t *buf, int size) |
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{ |
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CharDriverState *chr = opaque; |
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g_string_append_len(inbuf, (const gchar *)buf, size);
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qtest_process_inbuf(chr, inbuf); |
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} |
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static int qtest_can_read(void *opaque) |
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{ |
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return 1024; |
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} |
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static void qtest_event(void *opaque, int event) |
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{ |
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int i;
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switch (event) {
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case CHR_EVENT_OPENED:
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qemu_system_reset(false);
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for (i = 0; i < ARRAY_SIZE(irq_levels); i++) { |
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irq_levels[i] = 0;
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} |
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qemu_gettimeofday(&start_time); |
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qtest_opened = true;
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if (qtest_log_fp) {
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fprintf(qtest_log_fp, "[I " FMT_timeval "] OPENED\n", |
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start_time.tv_sec, (long) start_time.tv_usec);
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} |
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break;
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case CHR_EVENT_CLOSED:
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qtest_opened = false;
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if (qtest_log_fp) {
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qemu_timeval tv; |
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qtest_get_time(&tv); |
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fprintf(qtest_log_fp, "[I +" FMT_timeval "] CLOSED\n", |
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tv.tv_sec, (long) tv.tv_usec);
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} |
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break;
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default:
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break;
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} |
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} |
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int qtest_init(void) |
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{ |
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CharDriverState *chr; |
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g_assert(qtest_chrdev != NULL);
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configure_icount("0");
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chr = qemu_chr_new("qtest", qtest_chrdev, NULL); |
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qemu_chr_add_handlers(chr, qtest_can_read, qtest_read, qtest_event, chr); |
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qemu_chr_fe_set_echo(chr, true);
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inbuf = g_string_new("");
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if (qtest_log) {
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if (strcmp(qtest_log, "none") != 0) { |
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qtest_log_fp = fopen(qtest_log, "w+");
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} |
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} else {
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qtest_log_fp = stderr; |
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} |
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qtest_chr = chr; |
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return 0; |
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} |