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1 | 5fafdf24 | ths | /*
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2 | e69954b9 | pbrook | * ARM RealView Baseboard System emulation.
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3 | e69954b9 | pbrook | *
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4 | a1bb27b1 | pbrook | * Copyright (c) 2006-2007 CodeSourcery.
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5 | e69954b9 | pbrook | * Written by Paul Brook
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6 | e69954b9 | pbrook | *
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7 | e69954b9 | pbrook | * This code is licenced under the GPL.
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8 | e69954b9 | pbrook | */
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9 | e69954b9 | pbrook | |
10 | 87ecb68b | pbrook | #include "hw.h" |
11 | 87ecb68b | pbrook | #include "arm-misc.h" |
12 | 87ecb68b | pbrook | #include "primecell.h" |
13 | 87ecb68b | pbrook | #include "devices.h" |
14 | 87ecb68b | pbrook | #include "pci.h" |
15 | 87ecb68b | pbrook | #include "net.h" |
16 | 87ecb68b | pbrook | #include "sysemu.h" |
17 | 87ecb68b | pbrook | #include "boards.h" |
18 | e69954b9 | pbrook | |
19 | e69954b9 | pbrook | /* Board init. */
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20 | e69954b9 | pbrook | |
21 | f93eb9ff | balrog | static struct arm_boot_info realview_binfo = { |
22 | f93eb9ff | balrog | .loader_start = 0x0,
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23 | 52b43737 | pbrook | .smp_loader_start = 0x80000000,
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24 | f93eb9ff | balrog | .board_id = 0x33b,
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25 | f93eb9ff | balrog | }; |
26 | f93eb9ff | balrog | |
27 | 00f82b8a | aurel32 | static void realview_init(ram_addr_t ram_size, int vga_ram_size, |
28 | 3023f332 | aliguori | const char *boot_device, |
29 | e69954b9 | pbrook | const char *kernel_filename, const char *kernel_cmdline, |
30 | 94fc95cd | j_mayer | const char *initrd_filename, const char *cpu_model) |
31 | e69954b9 | pbrook | { |
32 | e69954b9 | pbrook | CPUState *env; |
33 | 7ffab4d7 | pbrook | ram_addr_t ram_offset; |
34 | d537cf6c | pbrook | qemu_irq *pic; |
35 | e69954b9 | pbrook | void *scsi_hba;
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36 | e69954b9 | pbrook | PCIBus *pci_bus; |
37 | e69954b9 | pbrook | NICInfo *nd; |
38 | e69954b9 | pbrook | int n;
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39 | e69954b9 | pbrook | int done_smc = 0; |
40 | 9ee6e8bb | pbrook | qemu_irq cpu_irq[4];
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41 | 9ee6e8bb | pbrook | int ncpu;
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42 | e4bcb14c | ths | int index;
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43 | e69954b9 | pbrook | |
44 | 3371d272 | pbrook | if (!cpu_model)
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45 | 3371d272 | pbrook | cpu_model = "arm926";
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46 | 9ee6e8bb | pbrook | /* FIXME: obey smp_cpus. */
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47 | 9ee6e8bb | pbrook | if (strcmp(cpu_model, "arm11mpcore") == 0) { |
48 | 9ee6e8bb | pbrook | ncpu = 4;
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49 | 9ee6e8bb | pbrook | } else {
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50 | 9ee6e8bb | pbrook | ncpu = 1;
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51 | 9ee6e8bb | pbrook | } |
52 | 9ee6e8bb | pbrook | |
53 | 9ee6e8bb | pbrook | for (n = 0; n < ncpu; n++) { |
54 | 9ee6e8bb | pbrook | env = cpu_init(cpu_model); |
55 | 9ee6e8bb | pbrook | if (!env) {
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56 | 9ee6e8bb | pbrook | fprintf(stderr, "Unable to find CPU definition\n");
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57 | 9ee6e8bb | pbrook | exit(1);
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58 | 9ee6e8bb | pbrook | } |
59 | 9ee6e8bb | pbrook | pic = arm_pic_init_cpu(env); |
60 | 9ee6e8bb | pbrook | cpu_irq[n] = pic[ARM_PIC_CPU_IRQ]; |
61 | 9ee6e8bb | pbrook | if (n > 0) { |
62 | 9ee6e8bb | pbrook | /* Set entry point for secondary CPUs. This assumes we're using
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63 | 9ee6e8bb | pbrook | the init code from arm_boot.c. Real hardware resets all CPUs
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64 | 9ee6e8bb | pbrook | the same. */
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65 | 9ee6e8bb | pbrook | env->regs[15] = 0x80000000; |
66 | 9ee6e8bb | pbrook | } |
67 | aaed909a | bellard | } |
68 | aaed909a | bellard | |
69 | 7ffab4d7 | pbrook | ram_offset = qemu_ram_alloc(ram_size); |
70 | 1235fc06 | ths | /* ??? RAM should repeat to fill physical memory space. */
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71 | e69954b9 | pbrook | /* SDRAM at address zero. */
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72 | 7ffab4d7 | pbrook | cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
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73 | e69954b9 | pbrook | |
74 | e69954b9 | pbrook | arm_sysctl_init(0x10000000, 0xc1400400); |
75 | 9ee6e8bb | pbrook | |
76 | 9ee6e8bb | pbrook | if (ncpu == 1) { |
77 | 9ee6e8bb | pbrook | /* ??? The documentation says GIC1 is nFIQ and either GIC2 or GIC3
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78 | 9ee6e8bb | pbrook | is nIRQ (there are inconsistencies). However Linux 2.6.17 expects
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79 | 9ee6e8bb | pbrook | GIC1 to be nIRQ and ignores all the others, so do that for now. */
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80 | 9ee6e8bb | pbrook | pic = realview_gic_init(0x10040000, cpu_irq[0]); |
81 | 9ee6e8bb | pbrook | } else {
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82 | 9ee6e8bb | pbrook | pic = mpcore_irq_init(cpu_irq); |
83 | 9ee6e8bb | pbrook | } |
84 | 9ee6e8bb | pbrook | |
85 | d537cf6c | pbrook | pl050_init(0x10006000, pic[20], 0); |
86 | d537cf6c | pbrook | pl050_init(0x10007000, pic[21], 1); |
87 | e69954b9 | pbrook | |
88 | 9ee6e8bb | pbrook | pl011_init(0x10009000, pic[12], serial_hds[0], PL011_ARM); |
89 | 9ee6e8bb | pbrook | pl011_init(0x1000a000, pic[13], serial_hds[1], PL011_ARM); |
90 | 9ee6e8bb | pbrook | pl011_init(0x1000b000, pic[14], serial_hds[2], PL011_ARM); |
91 | 9ee6e8bb | pbrook | pl011_init(0x1000c000, pic[15], serial_hds[3], PL011_ARM); |
92 | e69954b9 | pbrook | |
93 | e69954b9 | pbrook | /* DMA controller is optional, apparently. */
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94 | d537cf6c | pbrook | pl080_init(0x10030000, pic[24], 2); |
95 | e69954b9 | pbrook | |
96 | d537cf6c | pbrook | sp804_init(0x10011000, pic[4]); |
97 | d537cf6c | pbrook | sp804_init(0x10012000, pic[5]); |
98 | e69954b9 | pbrook | |
99 | 3023f332 | aliguori | pl110_init(0x10020000, pic[23], 1); |
100 | e69954b9 | pbrook | |
101 | e4bcb14c | ths | index = drive_get_index(IF_SD, 0, 0); |
102 | e4bcb14c | ths | if (index == -1) { |
103 | e4bcb14c | ths | fprintf(stderr, "qemu: missing SecureDigital card\n");
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104 | e4bcb14c | ths | exit(1);
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105 | e4bcb14c | ths | } |
106 | e4bcb14c | ths | pl181_init(0x10005000, drives_table[index].bdrv, pic[17], pic[18]); |
107 | a1bb27b1 | pbrook | |
108 | 7e1543c2 | pbrook | pl031_init(0x10017000, pic[10]); |
109 | 7e1543c2 | pbrook | |
110 | e69954b9 | pbrook | pci_bus = pci_vpb_init(pic, 48, 1); |
111 | e69954b9 | pbrook | if (usb_enabled) {
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112 | e24ad6f1 | pbrook | usb_ohci_init_pci(pci_bus, 3, -1); |
113 | e69954b9 | pbrook | } |
114 | e4bcb14c | ths | if (drive_get_max_bus(IF_SCSI) > 0) { |
115 | e4bcb14c | ths | fprintf(stderr, "qemu: too many SCSI bus\n");
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116 | e4bcb14c | ths | exit(1);
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117 | e4bcb14c | ths | } |
118 | e69954b9 | pbrook | scsi_hba = lsi_scsi_init(pci_bus, -1);
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119 | e4bcb14c | ths | for (n = 0; n < LSI_MAX_DEVS; n++) { |
120 | e4bcb14c | ths | index = drive_get_index(IF_SCSI, 0, n);
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121 | e4bcb14c | ths | if (index == -1) |
122 | e4bcb14c | ths | continue;
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123 | e4bcb14c | ths | lsi_scsi_attach(scsi_hba, drives_table[index].bdrv, n); |
124 | e69954b9 | pbrook | } |
125 | e69954b9 | pbrook | for(n = 0; n < nb_nics; n++) { |
126 | e69954b9 | pbrook | nd = &nd_table[n]; |
127 | 0ae18cee | aliguori | |
128 | 0ae18cee | aliguori | if ((!nd->model && !done_smc) || strcmp(nd->model, "smc91c111") == 0) { |
129 | d537cf6c | pbrook | smc91c111_init(nd, 0x4e000000, pic[28]); |
130 | 0ae18cee | aliguori | done_smc = 1;
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131 | e69954b9 | pbrook | } else {
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132 | cb457d76 | aliguori | pci_nic_init(pci_bus, nd, -1, "rtl8139"); |
133 | e69954b9 | pbrook | } |
134 | e69954b9 | pbrook | } |
135 | e69954b9 | pbrook | |
136 | e69954b9 | pbrook | /* Memory map for RealView Emulation Baseboard: */
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137 | e69954b9 | pbrook | /* 0x10000000 System registers. */
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138 | e69954b9 | pbrook | /* 0x10001000 System controller. */
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139 | e69954b9 | pbrook | /* 0x10002000 Two-Wire Serial Bus. */
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140 | e69954b9 | pbrook | /* 0x10003000 Reserved. */
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141 | e69954b9 | pbrook | /* 0x10004000 AACI. */
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142 | e69954b9 | pbrook | /* 0x10005000 MCI. */
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143 | e69954b9 | pbrook | /* 0x10006000 KMI0. */
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144 | e69954b9 | pbrook | /* 0x10007000 KMI1. */
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145 | e69954b9 | pbrook | /* 0x10008000 Character LCD. */
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146 | e69954b9 | pbrook | /* 0x10009000 UART0. */
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147 | e69954b9 | pbrook | /* 0x1000a000 UART1. */
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148 | e69954b9 | pbrook | /* 0x1000b000 UART2. */
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149 | e69954b9 | pbrook | /* 0x1000c000 UART3. */
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150 | e69954b9 | pbrook | /* 0x1000d000 SSPI. */
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151 | e69954b9 | pbrook | /* 0x1000e000 SCI. */
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152 | e69954b9 | pbrook | /* 0x1000f000 Reserved. */
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153 | e69954b9 | pbrook | /* 0x10010000 Watchdog. */
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154 | e69954b9 | pbrook | /* 0x10011000 Timer 0+1. */
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155 | e69954b9 | pbrook | /* 0x10012000 Timer 2+3. */
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156 | e69954b9 | pbrook | /* 0x10013000 GPIO 0. */
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157 | e69954b9 | pbrook | /* 0x10014000 GPIO 1. */
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158 | e69954b9 | pbrook | /* 0x10015000 GPIO 2. */
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159 | e69954b9 | pbrook | /* 0x10016000 Reserved. */
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160 | 7e1543c2 | pbrook | /* 0x10017000 RTC. */
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161 | e69954b9 | pbrook | /* 0x10018000 DMC. */
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162 | e69954b9 | pbrook | /* 0x10019000 PCI controller config. */
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163 | e69954b9 | pbrook | /* 0x10020000 CLCD. */
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164 | e69954b9 | pbrook | /* 0x10030000 DMA Controller. */
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165 | 9ee6e8bb | pbrook | /* 0x10040000 GIC1. */
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166 | 9ee6e8bb | pbrook | /* 0x10050000 GIC2. */
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167 | 9ee6e8bb | pbrook | /* 0x10060000 GIC3. */
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168 | 9ee6e8bb | pbrook | /* 0x10070000 GIC4. */
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169 | e69954b9 | pbrook | /* 0x10080000 SMC. */
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170 | e69954b9 | pbrook | /* 0x40000000 NOR flash. */
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171 | e69954b9 | pbrook | /* 0x44000000 DoC flash. */
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172 | e69954b9 | pbrook | /* 0x48000000 SRAM. */
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173 | e69954b9 | pbrook | /* 0x4c000000 Configuration flash. */
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174 | e69954b9 | pbrook | /* 0x4e000000 Ethernet. */
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175 | e69954b9 | pbrook | /* 0x4f000000 USB. */
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176 | e69954b9 | pbrook | /* 0x50000000 PISMO. */
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177 | e69954b9 | pbrook | /* 0x54000000 PISMO. */
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178 | e69954b9 | pbrook | /* 0x58000000 PISMO. */
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179 | e69954b9 | pbrook | /* 0x5c000000 PISMO. */
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180 | e69954b9 | pbrook | /* 0x60000000 PCI. */
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181 | e69954b9 | pbrook | /* 0x61000000 PCI Self Config. */
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182 | e69954b9 | pbrook | /* 0x62000000 PCI Config. */
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183 | e69954b9 | pbrook | /* 0x63000000 PCI IO. */
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184 | e69954b9 | pbrook | /* 0x64000000 PCI mem 0. */
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185 | e69954b9 | pbrook | /* 0x68000000 PCI mem 1. */
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186 | e69954b9 | pbrook | /* 0x6c000000 PCI mem 2. */
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187 | e69954b9 | pbrook | |
188 | 7ffab4d7 | pbrook | /* ??? Hack to map an additional page of ram for the secondary CPU
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189 | 7ffab4d7 | pbrook | startup code. I guess this works on real hardware because the
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190 | 7ffab4d7 | pbrook | BootROM happens to be in ROM/flash or in memory that isn't clobbered
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191 | 7ffab4d7 | pbrook | until after Linux boots the secondary CPUs. */
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192 | 7ffab4d7 | pbrook | ram_offset = qemu_ram_alloc(0x1000);
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193 | 7ffab4d7 | pbrook | cpu_register_physical_memory(0x80000000, 0x1000, ram_offset | IO_MEM_RAM); |
194 | 7ffab4d7 | pbrook | |
195 | f93eb9ff | balrog | realview_binfo.ram_size = ram_size; |
196 | f93eb9ff | balrog | realview_binfo.kernel_filename = kernel_filename; |
197 | f93eb9ff | balrog | realview_binfo.kernel_cmdline = kernel_cmdline; |
198 | f93eb9ff | balrog | realview_binfo.initrd_filename = initrd_filename; |
199 | f93eb9ff | balrog | realview_binfo.nb_cpus = ncpu; |
200 | f93eb9ff | balrog | arm_load_kernel(first_cpu, &realview_binfo); |
201 | e69954b9 | pbrook | } |
202 | e69954b9 | pbrook | |
203 | e69954b9 | pbrook | QEMUMachine realview_machine = { |
204 | c9b1ae2c | blueswir1 | .name = "realview",
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205 | c9b1ae2c | blueswir1 | .desc = "ARM RealView Emulation Baseboard (ARM926EJ-S)",
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206 | c9b1ae2c | blueswir1 | .init = realview_init, |
207 | c9b1ae2c | blueswir1 | .ram_require = 0x1000,
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208 | c9b1ae2c | blueswir1 | .use_scsi = 1,
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209 | e69954b9 | pbrook | }; |