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1 | fc01f7e7 | bellard | /*
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2 | fc01f7e7 | bellard | * QEMU System Emulator header
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3 | fc01f7e7 | bellard | *
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4 | fc01f7e7 | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | fc01f7e7 | bellard | *
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6 | fc01f7e7 | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | fc01f7e7 | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | fc01f7e7 | bellard | * in the Software without restriction, including without limitation the rights
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9 | fc01f7e7 | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | fc01f7e7 | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | fc01f7e7 | bellard | * furnished to do so, subject to the following conditions:
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12 | fc01f7e7 | bellard | *
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13 | fc01f7e7 | bellard | * The above copyright notice and this permission notice shall be included in
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14 | fc01f7e7 | bellard | * all copies or substantial portions of the Software.
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15 | fc01f7e7 | bellard | *
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16 | fc01f7e7 | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | fc01f7e7 | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | fc01f7e7 | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | fc01f7e7 | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | fc01f7e7 | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | fc01f7e7 | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | fc01f7e7 | bellard | * THE SOFTWARE.
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23 | fc01f7e7 | bellard | */
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24 | fc01f7e7 | bellard | #ifndef VL_H
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25 | fc01f7e7 | bellard | #define VL_H
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26 | fc01f7e7 | bellard | |
27 | 67b915a5 | bellard | /* we put basic includes here to avoid repeating them in device drivers */
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28 | 67b915a5 | bellard | #include <stdlib.h> |
29 | 67b915a5 | bellard | #include <stdio.h> |
30 | 67b915a5 | bellard | #include <stdarg.h> |
31 | 67b915a5 | bellard | #include <string.h> |
32 | 67b915a5 | bellard | #include <inttypes.h> |
33 | 85571bc7 | bellard | #include <limits.h> |
34 | 8a7ddc38 | bellard | #include <time.h> |
35 | 67b915a5 | bellard | #include <ctype.h> |
36 | 67b915a5 | bellard | #include <errno.h> |
37 | 67b915a5 | bellard | #include <unistd.h> |
38 | 67b915a5 | bellard | #include <fcntl.h> |
39 | 7d3505c5 | bellard | #include <sys/stat.h> |
40 | fb065187 | bellard | #include "audio/audio.h" |
41 | 67b915a5 | bellard | |
42 | 67b915a5 | bellard | #ifndef O_LARGEFILE
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43 | 67b915a5 | bellard | #define O_LARGEFILE 0 |
44 | 67b915a5 | bellard | #endif
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45 | 40c3bac3 | bellard | #ifndef O_BINARY
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46 | 40c3bac3 | bellard | #define O_BINARY 0 |
47 | 40c3bac3 | bellard | #endif
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48 | 67b915a5 | bellard | |
49 | 67b915a5 | bellard | #ifdef _WIN32
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50 | a18e524a | bellard | #include <windows.h> |
51 | ac62f715 | pbrook | #define fsync _commit
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52 | 57d1a2b6 | bellard | #define lseek _lseeki64
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53 | 57d1a2b6 | bellard | #define ENOTSUP 4096 |
54 | 57d1a2b6 | bellard | /* XXX: find 64 bit version */
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55 | 57d1a2b6 | bellard | #define ftruncate chsize
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56 | 57d1a2b6 | bellard | |
57 | 57d1a2b6 | bellard | static inline char *realpath(const char *path, char *resolved_path) |
58 | 57d1a2b6 | bellard | { |
59 | 57d1a2b6 | bellard | _fullpath(resolved_path, path, _MAX_PATH); |
60 | 57d1a2b6 | bellard | return resolved_path;
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61 | 57d1a2b6 | bellard | } |
62 | ec3757de | bellard | |
63 | ec3757de | bellard | #define PRId64 "I64d" |
64 | 26a76461 | bellard | #define PRIx64 "I64x" |
65 | 26a76461 | bellard | #define PRIu64 "I64u" |
66 | 26a76461 | bellard | #define PRIo64 "I64o" |
67 | 67b915a5 | bellard | #endif
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68 | 8a7ddc38 | bellard | |
69 | ea2384d3 | bellard | #ifdef QEMU_TOOL
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70 | ea2384d3 | bellard | |
71 | ea2384d3 | bellard | /* we use QEMU_TOOL in the command line tools which do not depend on
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72 | ea2384d3 | bellard | the target CPU type */
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73 | ea2384d3 | bellard | #include "config-host.h" |
74 | ea2384d3 | bellard | #include <setjmp.h> |
75 | ea2384d3 | bellard | #include "osdep.h" |
76 | ea2384d3 | bellard | #include "bswap.h" |
77 | ea2384d3 | bellard | |
78 | ea2384d3 | bellard | #else
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79 | ea2384d3 | bellard | |
80 | 16f62432 | bellard | #include "cpu.h" |
81 | 1fddef4b | bellard | #include "gdbstub.h" |
82 | 16f62432 | bellard | |
83 | ea2384d3 | bellard | #endif /* !defined(QEMU_TOOL) */ |
84 | ea2384d3 | bellard | |
85 | 67b915a5 | bellard | #ifndef glue
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86 | 67b915a5 | bellard | #define xglue(x, y) x ## y |
87 | 67b915a5 | bellard | #define glue(x, y) xglue(x, y)
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88 | 67b915a5 | bellard | #define stringify(s) tostring(s)
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89 | 67b915a5 | bellard | #define tostring(s) #s |
90 | 67b915a5 | bellard | #endif
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91 | 67b915a5 | bellard | |
92 | 24236869 | bellard | #ifndef MIN
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93 | 24236869 | bellard | #define MIN(a, b) (((a) < (b)) ? (a) : (b))
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94 | 24236869 | bellard | #endif
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95 | 24236869 | bellard | #ifndef MAX
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96 | 24236869 | bellard | #define MAX(a, b) (((a) > (b)) ? (a) : (b))
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97 | 24236869 | bellard | #endif
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98 | 24236869 | bellard | |
99 | 33e3963e | bellard | /* vl.c */
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100 | 80cabfad | bellard | uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c); |
101 | 313aa567 | bellard | |
102 | 80cabfad | bellard | void hw_error(const char *fmt, ...); |
103 | 80cabfad | bellard | |
104 | 80cabfad | bellard | extern const char *bios_dir; |
105 | 80cabfad | bellard | |
106 | 80cabfad | bellard | void pstrcpy(char *buf, int buf_size, const char *str); |
107 | 80cabfad | bellard | char *pstrcat(char *buf, int buf_size, const char *s); |
108 | 82c643ff | bellard | int strstart(const char *str, const char *val, const char **ptr); |
109 | c4b1fcc0 | bellard | |
110 | 8a7ddc38 | bellard | extern int vm_running; |
111 | 8a7ddc38 | bellard | |
112 | 0bd48850 | bellard | typedef struct vm_change_state_entry VMChangeStateEntry; |
113 | 0bd48850 | bellard | typedef void VMChangeStateHandler(void *opaque, int running); |
114 | 8a7ddc38 | bellard | typedef void VMStopHandler(void *opaque, int reason); |
115 | 8a7ddc38 | bellard | |
116 | 0bd48850 | bellard | VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb, |
117 | 0bd48850 | bellard | void *opaque);
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118 | 0bd48850 | bellard | void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
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119 | 0bd48850 | bellard | |
120 | 8a7ddc38 | bellard | int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque); |
121 | 8a7ddc38 | bellard | void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque); |
122 | 8a7ddc38 | bellard | |
123 | 8a7ddc38 | bellard | void vm_start(void); |
124 | 8a7ddc38 | bellard | void vm_stop(int reason); |
125 | 8a7ddc38 | bellard | |
126 | bb0c6722 | bellard | typedef void QEMUResetHandler(void *opaque); |
127 | bb0c6722 | bellard | |
128 | bb0c6722 | bellard | void qemu_register_reset(QEMUResetHandler *func, void *opaque); |
129 | bb0c6722 | bellard | void qemu_system_reset_request(void); |
130 | bb0c6722 | bellard | void qemu_system_shutdown_request(void); |
131 | 3475187d | bellard | void qemu_system_powerdown_request(void); |
132 | 3475187d | bellard | #if !defined(TARGET_SPARC)
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133 | 3475187d | bellard | // Please implement a power failure function to signal the OS
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134 | 3475187d | bellard | #define qemu_system_powerdown() do{}while(0) |
135 | 3475187d | bellard | #else
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136 | 3475187d | bellard | void qemu_system_powerdown(void); |
137 | 3475187d | bellard | #endif
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138 | bb0c6722 | bellard | |
139 | ea2384d3 | bellard | void main_loop_wait(int timeout); |
140 | ea2384d3 | bellard | |
141 | 0ced6589 | bellard | extern int ram_size; |
142 | 0ced6589 | bellard | extern int bios_size; |
143 | ee22c2f7 | bellard | extern int rtc_utc; |
144 | 1f04275e | bellard | extern int cirrus_vga_enabled; |
145 | 28b9b5af | bellard | extern int graphic_width; |
146 | 28b9b5af | bellard | extern int graphic_height; |
147 | 28b9b5af | bellard | extern int graphic_depth; |
148 | 3d11d0eb | bellard | extern const char *keyboard_layout; |
149 | d993e026 | bellard | extern int kqemu_allowed; |
150 | a09db21f | bellard | extern int win2k_install_hack; |
151 | bb36d470 | bellard | extern int usb_enabled; |
152 | 6a00d601 | bellard | extern int smp_cpus; |
153 | 0ced6589 | bellard | |
154 | 0ced6589 | bellard | /* XXX: make it dynamic */
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155 | 75956cf0 | pbrook | #if defined (TARGET_PPC) || defined (TARGET_SPARC64)
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156 | d5295253 | bellard | #define BIOS_SIZE ((512 + 32) * 1024) |
157 | 6af0bf9c | bellard | #elif defined(TARGET_MIPS)
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158 | 6af0bf9c | bellard | #define BIOS_SIZE (128 * 1024) |
159 | 0ced6589 | bellard | #else
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160 | 7587cf44 | bellard | #define BIOS_SIZE ((256 + 64) * 1024) |
161 | 0ced6589 | bellard | #endif
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162 | aaaa7df6 | bellard | |
163 | 63066f4f | bellard | /* keyboard/mouse support */
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164 | 63066f4f | bellard | |
165 | 63066f4f | bellard | #define MOUSE_EVENT_LBUTTON 0x01 |
166 | 63066f4f | bellard | #define MOUSE_EVENT_RBUTTON 0x02 |
167 | 63066f4f | bellard | #define MOUSE_EVENT_MBUTTON 0x04 |
168 | 63066f4f | bellard | |
169 | 63066f4f | bellard | typedef void QEMUPutKBDEvent(void *opaque, int keycode); |
170 | 63066f4f | bellard | typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state); |
171 | 63066f4f | bellard | |
172 | 63066f4f | bellard | void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque); |
173 | 09b26c5e | bellard | void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque, int absolute); |
174 | 63066f4f | bellard | |
175 | 63066f4f | bellard | void kbd_put_keycode(int keycode); |
176 | 63066f4f | bellard | void kbd_mouse_event(int dx, int dy, int dz, int buttons_state); |
177 | 09b26c5e | bellard | int kbd_mouse_is_absolute(void); |
178 | 63066f4f | bellard | |
179 | 82c643ff | bellard | /* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
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180 | 82c643ff | bellard | constants) */
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181 | 82c643ff | bellard | #define QEMU_KEY_ESC1(c) ((c) | 0xe100) |
182 | 82c643ff | bellard | #define QEMU_KEY_BACKSPACE 0x007f |
183 | 82c643ff | bellard | #define QEMU_KEY_UP QEMU_KEY_ESC1('A') |
184 | 82c643ff | bellard | #define QEMU_KEY_DOWN QEMU_KEY_ESC1('B') |
185 | 82c643ff | bellard | #define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C') |
186 | 82c643ff | bellard | #define QEMU_KEY_LEFT QEMU_KEY_ESC1('D') |
187 | 82c643ff | bellard | #define QEMU_KEY_HOME QEMU_KEY_ESC1(1) |
188 | 82c643ff | bellard | #define QEMU_KEY_END QEMU_KEY_ESC1(4) |
189 | 82c643ff | bellard | #define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5) |
190 | 82c643ff | bellard | #define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6) |
191 | 82c643ff | bellard | #define QEMU_KEY_DELETE QEMU_KEY_ESC1(3) |
192 | 82c643ff | bellard | |
193 | 82c643ff | bellard | #define QEMU_KEY_CTRL_UP 0xe400 |
194 | 82c643ff | bellard | #define QEMU_KEY_CTRL_DOWN 0xe401 |
195 | 82c643ff | bellard | #define QEMU_KEY_CTRL_LEFT 0xe402 |
196 | 82c643ff | bellard | #define QEMU_KEY_CTRL_RIGHT 0xe403 |
197 | 82c643ff | bellard | #define QEMU_KEY_CTRL_HOME 0xe404 |
198 | 82c643ff | bellard | #define QEMU_KEY_CTRL_END 0xe405 |
199 | 82c643ff | bellard | #define QEMU_KEY_CTRL_PAGEUP 0xe406 |
200 | 82c643ff | bellard | #define QEMU_KEY_CTRL_PAGEDOWN 0xe407 |
201 | 82c643ff | bellard | |
202 | 82c643ff | bellard | void kbd_put_keysym(int keysym); |
203 | 82c643ff | bellard | |
204 | c20709aa | bellard | /* async I/O support */
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205 | c20709aa | bellard | |
206 | c20709aa | bellard | typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size); |
207 | c20709aa | bellard | typedef int IOCanRWHandler(void *opaque); |
208 | 7c9d8e07 | bellard | typedef void IOHandler(void *opaque); |
209 | c20709aa | bellard | |
210 | 7c9d8e07 | bellard | int qemu_set_fd_handler2(int fd, |
211 | 7c9d8e07 | bellard | IOCanRWHandler *fd_read_poll, |
212 | 7c9d8e07 | bellard | IOHandler *fd_read, |
213 | 7c9d8e07 | bellard | IOHandler *fd_write, |
214 | 7c9d8e07 | bellard | void *opaque);
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215 | 7c9d8e07 | bellard | int qemu_set_fd_handler(int fd, |
216 | 7c9d8e07 | bellard | IOHandler *fd_read, |
217 | 7c9d8e07 | bellard | IOHandler *fd_write, |
218 | 7c9d8e07 | bellard | void *opaque);
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219 | c20709aa | bellard | |
220 | f331110f | bellard | /* Polling handling */
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221 | f331110f | bellard | |
222 | f331110f | bellard | /* return TRUE if no sleep should be done afterwards */
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223 | f331110f | bellard | typedef int PollingFunc(void *opaque); |
224 | f331110f | bellard | |
225 | f331110f | bellard | int qemu_add_polling_cb(PollingFunc *func, void *opaque); |
226 | f331110f | bellard | void qemu_del_polling_cb(PollingFunc *func, void *opaque); |
227 | f331110f | bellard | |
228 | a18e524a | bellard | #ifdef _WIN32
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229 | a18e524a | bellard | /* Wait objects handling */
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230 | a18e524a | bellard | typedef void WaitObjectFunc(void *opaque); |
231 | a18e524a | bellard | |
232 | a18e524a | bellard | int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque); |
233 | a18e524a | bellard | void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque); |
234 | a18e524a | bellard | #endif
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235 | a18e524a | bellard | |
236 | 82c643ff | bellard | /* character device */
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237 | 82c643ff | bellard | |
238 | 82c643ff | bellard | #define CHR_EVENT_BREAK 0 /* serial break char */ |
239 | ea2384d3 | bellard | #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */ |
240 | 82c643ff | bellard | |
241 | 2122c51a | bellard | |
242 | 2122c51a | bellard | |
243 | 2122c51a | bellard | #define CHR_IOCTL_SERIAL_SET_PARAMS 1 |
244 | 2122c51a | bellard | typedef struct { |
245 | 2122c51a | bellard | int speed;
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246 | 2122c51a | bellard | int parity;
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247 | 2122c51a | bellard | int data_bits;
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248 | 2122c51a | bellard | int stop_bits;
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249 | 2122c51a | bellard | } QEMUSerialSetParams; |
250 | 2122c51a | bellard | |
251 | 2122c51a | bellard | #define CHR_IOCTL_SERIAL_SET_BREAK 2 |
252 | 2122c51a | bellard | |
253 | 2122c51a | bellard | #define CHR_IOCTL_PP_READ_DATA 3 |
254 | 2122c51a | bellard | #define CHR_IOCTL_PP_WRITE_DATA 4 |
255 | 2122c51a | bellard | #define CHR_IOCTL_PP_READ_CONTROL 5 |
256 | 2122c51a | bellard | #define CHR_IOCTL_PP_WRITE_CONTROL 6 |
257 | 2122c51a | bellard | #define CHR_IOCTL_PP_READ_STATUS 7 |
258 | 2122c51a | bellard | |
259 | 82c643ff | bellard | typedef void IOEventHandler(void *opaque, int event); |
260 | 82c643ff | bellard | |
261 | 82c643ff | bellard | typedef struct CharDriverState { |
262 | 82c643ff | bellard | int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len); |
263 | 82c643ff | bellard | void (*chr_add_read_handler)(struct CharDriverState *s, |
264 | 82c643ff | bellard | IOCanRWHandler *fd_can_read, |
265 | 82c643ff | bellard | IOReadHandler *fd_read, void *opaque);
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266 | 2122c51a | bellard | int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg); |
267 | 82c643ff | bellard | IOEventHandler *chr_event; |
268 | eb45f5fe | bellard | void (*chr_send_event)(struct CharDriverState *chr, int event); |
269 | f331110f | bellard | void (*chr_close)(struct CharDriverState *chr); |
270 | 82c643ff | bellard | void *opaque;
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271 | 82c643ff | bellard | } CharDriverState; |
272 | 82c643ff | bellard | |
273 | 82c643ff | bellard | void qemu_chr_printf(CharDriverState *s, const char *fmt, ...); |
274 | 82c643ff | bellard | int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len); |
275 | ea2384d3 | bellard | void qemu_chr_send_event(CharDriverState *s, int event); |
276 | 82c643ff | bellard | void qemu_chr_add_read_handler(CharDriverState *s,
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277 | 82c643ff | bellard | IOCanRWHandler *fd_can_read, |
278 | 82c643ff | bellard | IOReadHandler *fd_read, void *opaque);
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279 | 82c643ff | bellard | void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
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280 | 2122c51a | bellard | int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg); |
281 | f8d179e3 | bellard | |
282 | 82c643ff | bellard | /* consoles */
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283 | 82c643ff | bellard | |
284 | 82c643ff | bellard | typedef struct DisplayState DisplayState; |
285 | 82c643ff | bellard | typedef struct TextConsole TextConsole; |
286 | 82c643ff | bellard | |
287 | 95219897 | pbrook | typedef void (*vga_hw_update_ptr)(void *); |
288 | 95219897 | pbrook | typedef void (*vga_hw_invalidate_ptr)(void *); |
289 | 95219897 | pbrook | typedef void (*vga_hw_screen_dump_ptr)(void *, const char *); |
290 | 95219897 | pbrook | |
291 | 95219897 | pbrook | TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update, |
292 | 95219897 | pbrook | vga_hw_invalidate_ptr invalidate, |
293 | 95219897 | pbrook | vga_hw_screen_dump_ptr screen_dump, |
294 | 95219897 | pbrook | void *opaque);
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295 | 95219897 | pbrook | void vga_hw_update(void); |
296 | 95219897 | pbrook | void vga_hw_invalidate(void); |
297 | 95219897 | pbrook | void vga_hw_screen_dump(const char *filename); |
298 | 95219897 | pbrook | |
299 | 95219897 | pbrook | int is_graphic_console(void); |
300 | 82c643ff | bellard | CharDriverState *text_console_init(DisplayState *ds); |
301 | 82c643ff | bellard | void console_select(unsigned int index); |
302 | 82c643ff | bellard | |
303 | 8d11df9e | bellard | /* serial ports */
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304 | 8d11df9e | bellard | |
305 | 8d11df9e | bellard | #define MAX_SERIAL_PORTS 4 |
306 | 8d11df9e | bellard | |
307 | 8d11df9e | bellard | extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
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308 | 8d11df9e | bellard | |
309 | 6508fe59 | bellard | /* parallel ports */
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310 | 6508fe59 | bellard | |
311 | 6508fe59 | bellard | #define MAX_PARALLEL_PORTS 3 |
312 | 6508fe59 | bellard | |
313 | 6508fe59 | bellard | extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
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314 | 6508fe59 | bellard | |
315 | 7c9d8e07 | bellard | /* VLANs support */
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316 | 7c9d8e07 | bellard | |
317 | 7c9d8e07 | bellard | typedef struct VLANClientState VLANClientState; |
318 | 7c9d8e07 | bellard | |
319 | 7c9d8e07 | bellard | struct VLANClientState {
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320 | 7c9d8e07 | bellard | IOReadHandler *fd_read; |
321 | d861b05e | pbrook | /* Packets may still be sent if this returns zero. It's used to
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322 | d861b05e | pbrook | rate-limit the slirp code. */
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323 | d861b05e | pbrook | IOCanRWHandler *fd_can_read; |
324 | 7c9d8e07 | bellard | void *opaque;
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325 | 7c9d8e07 | bellard | struct VLANClientState *next;
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326 | 7c9d8e07 | bellard | struct VLANState *vlan;
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327 | 7c9d8e07 | bellard | char info_str[256]; |
328 | 7c9d8e07 | bellard | }; |
329 | 7c9d8e07 | bellard | |
330 | 7c9d8e07 | bellard | typedef struct VLANState { |
331 | 7c9d8e07 | bellard | int id;
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332 | 7c9d8e07 | bellard | VLANClientState *first_client; |
333 | 7c9d8e07 | bellard | struct VLANState *next;
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334 | 7c9d8e07 | bellard | } VLANState; |
335 | 7c9d8e07 | bellard | |
336 | 7c9d8e07 | bellard | VLANState *qemu_find_vlan(int id);
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337 | 7c9d8e07 | bellard | VLANClientState *qemu_new_vlan_client(VLANState *vlan, |
338 | d861b05e | pbrook | IOReadHandler *fd_read, |
339 | d861b05e | pbrook | IOCanRWHandler *fd_can_read, |
340 | d861b05e | pbrook | void *opaque);
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341 | d861b05e | pbrook | int qemu_can_send_packet(VLANClientState *vc);
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342 | 7c9d8e07 | bellard | void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size); |
343 | d861b05e | pbrook | void qemu_handler_true(void *opaque); |
344 | 7c9d8e07 | bellard | |
345 | 7c9d8e07 | bellard | void do_info_network(void); |
346 | 7c9d8e07 | bellard | |
347 | 7fb843f8 | bellard | /* TAP win32 */
|
348 | 7fb843f8 | bellard | int tap_win32_init(VLANState *vlan, const char *ifname); |
349 | 7fb843f8 | bellard | void tap_win32_poll(void); |
350 | 7fb843f8 | bellard | |
351 | 7c9d8e07 | bellard | /* NIC info */
|
352 | c4b1fcc0 | bellard | |
353 | c4b1fcc0 | bellard | #define MAX_NICS 8 |
354 | c4b1fcc0 | bellard | |
355 | 7c9d8e07 | bellard | typedef struct NICInfo { |
356 | c4b1fcc0 | bellard | uint8_t macaddr[6];
|
357 | a41b2ff2 | pbrook | const char *model; |
358 | 7c9d8e07 | bellard | VLANState *vlan; |
359 | 7c9d8e07 | bellard | } NICInfo; |
360 | c4b1fcc0 | bellard | |
361 | c4b1fcc0 | bellard | extern int nb_nics; |
362 | 7c9d8e07 | bellard | extern NICInfo nd_table[MAX_NICS];
|
363 | 8a7ddc38 | bellard | |
364 | 8a7ddc38 | bellard | /* timers */
|
365 | 8a7ddc38 | bellard | |
366 | 8a7ddc38 | bellard | typedef struct QEMUClock QEMUClock; |
367 | 8a7ddc38 | bellard | typedef struct QEMUTimer QEMUTimer; |
368 | 8a7ddc38 | bellard | typedef void QEMUTimerCB(void *opaque); |
369 | 8a7ddc38 | bellard | |
370 | 8a7ddc38 | bellard | /* The real time clock should be used only for stuff which does not
|
371 | 8a7ddc38 | bellard | change the virtual machine state, as it is run even if the virtual
|
372 | 69b91039 | bellard | machine is stopped. The real time clock has a frequency of 1000
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373 | 8a7ddc38 | bellard | Hz. */
|
374 | 8a7ddc38 | bellard | extern QEMUClock *rt_clock;
|
375 | 8a7ddc38 | bellard | |
376 | e80cfcfc | bellard | /* The virtual clock is only run during the emulation. It is stopped
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377 | 8a7ddc38 | bellard | when the virtual machine is stopped. Virtual timers use a high
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378 | 8a7ddc38 | bellard | precision clock, usually cpu cycles (use ticks_per_sec). */
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379 | 8a7ddc38 | bellard | extern QEMUClock *vm_clock;
|
380 | 8a7ddc38 | bellard | |
381 | 8a7ddc38 | bellard | int64_t qemu_get_clock(QEMUClock *clock); |
382 | 8a7ddc38 | bellard | |
383 | 8a7ddc38 | bellard | QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
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384 | 8a7ddc38 | bellard | void qemu_free_timer(QEMUTimer *ts);
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385 | 8a7ddc38 | bellard | void qemu_del_timer(QEMUTimer *ts);
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386 | 8a7ddc38 | bellard | void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
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387 | 8a7ddc38 | bellard | int qemu_timer_pending(QEMUTimer *ts);
|
388 | 8a7ddc38 | bellard | |
389 | 8a7ddc38 | bellard | extern int64_t ticks_per_sec;
|
390 | 8a7ddc38 | bellard | extern int pit_min_timer_count; |
391 | 8a7ddc38 | bellard | |
392 | 8a7ddc38 | bellard | void cpu_enable_ticks(void); |
393 | 8a7ddc38 | bellard | void cpu_disable_ticks(void); |
394 | 8a7ddc38 | bellard | |
395 | 8a7ddc38 | bellard | /* VM Load/Save */
|
396 | 8a7ddc38 | bellard | |
397 | 8a7ddc38 | bellard | typedef FILE QEMUFile;
|
398 | 8a7ddc38 | bellard | |
399 | 8a7ddc38 | bellard | void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size); |
400 | 8a7ddc38 | bellard | void qemu_put_byte(QEMUFile *f, int v); |
401 | 8a7ddc38 | bellard | void qemu_put_be16(QEMUFile *f, unsigned int v); |
402 | 8a7ddc38 | bellard | void qemu_put_be32(QEMUFile *f, unsigned int v); |
403 | 8a7ddc38 | bellard | void qemu_put_be64(QEMUFile *f, uint64_t v);
|
404 | 8a7ddc38 | bellard | int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size); |
405 | 8a7ddc38 | bellard | int qemu_get_byte(QEMUFile *f);
|
406 | 8a7ddc38 | bellard | unsigned int qemu_get_be16(QEMUFile *f); |
407 | 8a7ddc38 | bellard | unsigned int qemu_get_be32(QEMUFile *f); |
408 | 8a7ddc38 | bellard | uint64_t qemu_get_be64(QEMUFile *f); |
409 | 8a7ddc38 | bellard | |
410 | 8a7ddc38 | bellard | static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv) |
411 | 8a7ddc38 | bellard | { |
412 | 8a7ddc38 | bellard | qemu_put_be64(f, *pv); |
413 | 8a7ddc38 | bellard | } |
414 | 8a7ddc38 | bellard | |
415 | 8a7ddc38 | bellard | static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv) |
416 | 8a7ddc38 | bellard | { |
417 | 8a7ddc38 | bellard | qemu_put_be32(f, *pv); |
418 | 8a7ddc38 | bellard | } |
419 | 8a7ddc38 | bellard | |
420 | 8a7ddc38 | bellard | static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv) |
421 | 8a7ddc38 | bellard | { |
422 | 8a7ddc38 | bellard | qemu_put_be16(f, *pv); |
423 | 8a7ddc38 | bellard | } |
424 | 8a7ddc38 | bellard | |
425 | 8a7ddc38 | bellard | static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv) |
426 | 8a7ddc38 | bellard | { |
427 | 8a7ddc38 | bellard | qemu_put_byte(f, *pv); |
428 | 8a7ddc38 | bellard | } |
429 | 8a7ddc38 | bellard | |
430 | 8a7ddc38 | bellard | static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv) |
431 | 8a7ddc38 | bellard | { |
432 | 8a7ddc38 | bellard | *pv = qemu_get_be64(f); |
433 | 8a7ddc38 | bellard | } |
434 | 8a7ddc38 | bellard | |
435 | 8a7ddc38 | bellard | static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv) |
436 | 8a7ddc38 | bellard | { |
437 | 8a7ddc38 | bellard | *pv = qemu_get_be32(f); |
438 | 8a7ddc38 | bellard | } |
439 | 8a7ddc38 | bellard | |
440 | 8a7ddc38 | bellard | static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv) |
441 | 8a7ddc38 | bellard | { |
442 | 8a7ddc38 | bellard | *pv = qemu_get_be16(f); |
443 | 8a7ddc38 | bellard | } |
444 | 8a7ddc38 | bellard | |
445 | 8a7ddc38 | bellard | static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv) |
446 | 8a7ddc38 | bellard | { |
447 | 8a7ddc38 | bellard | *pv = qemu_get_byte(f); |
448 | 8a7ddc38 | bellard | } |
449 | 8a7ddc38 | bellard | |
450 | c27004ec | bellard | #if TARGET_LONG_BITS == 64 |
451 | c27004ec | bellard | #define qemu_put_betl qemu_put_be64
|
452 | c27004ec | bellard | #define qemu_get_betl qemu_get_be64
|
453 | c27004ec | bellard | #define qemu_put_betls qemu_put_be64s
|
454 | c27004ec | bellard | #define qemu_get_betls qemu_get_be64s
|
455 | c27004ec | bellard | #else
|
456 | c27004ec | bellard | #define qemu_put_betl qemu_put_be32
|
457 | c27004ec | bellard | #define qemu_get_betl qemu_get_be32
|
458 | c27004ec | bellard | #define qemu_put_betls qemu_put_be32s
|
459 | c27004ec | bellard | #define qemu_get_betls qemu_get_be32s
|
460 | c27004ec | bellard | #endif
|
461 | c27004ec | bellard | |
462 | 8a7ddc38 | bellard | int64_t qemu_ftell(QEMUFile *f); |
463 | 8a7ddc38 | bellard | int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
|
464 | 8a7ddc38 | bellard | |
465 | 8a7ddc38 | bellard | typedef void SaveStateHandler(QEMUFile *f, void *opaque); |
466 | 8a7ddc38 | bellard | typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id); |
467 | 8a7ddc38 | bellard | |
468 | 8a7ddc38 | bellard | int qemu_loadvm(const char *filename); |
469 | 8a7ddc38 | bellard | int qemu_savevm(const char *filename); |
470 | 8a7ddc38 | bellard | int register_savevm(const char *idstr, |
471 | 8a7ddc38 | bellard | int instance_id,
|
472 | 8a7ddc38 | bellard | int version_id,
|
473 | 8a7ddc38 | bellard | SaveStateHandler *save_state, |
474 | 8a7ddc38 | bellard | LoadStateHandler *load_state, |
475 | 8a7ddc38 | bellard | void *opaque);
|
476 | 8a7ddc38 | bellard | void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
|
477 | 8a7ddc38 | bellard | void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
|
478 | c4b1fcc0 | bellard | |
479 | 6a00d601 | bellard | void cpu_save(QEMUFile *f, void *opaque); |
480 | 6a00d601 | bellard | int cpu_load(QEMUFile *f, void *opaque, int version_id); |
481 | 6a00d601 | bellard | |
482 | fc01f7e7 | bellard | /* block.c */
|
483 | fc01f7e7 | bellard | typedef struct BlockDriverState BlockDriverState; |
484 | ea2384d3 | bellard | typedef struct BlockDriver BlockDriver; |
485 | ea2384d3 | bellard | |
486 | ea2384d3 | bellard | extern BlockDriver bdrv_raw;
|
487 | ea2384d3 | bellard | extern BlockDriver bdrv_cow;
|
488 | ea2384d3 | bellard | extern BlockDriver bdrv_qcow;
|
489 | ea2384d3 | bellard | extern BlockDriver bdrv_vmdk;
|
490 | 3c56521b | bellard | extern BlockDriver bdrv_cloop;
|
491 | 585d0ed9 | bellard | extern BlockDriver bdrv_dmg;
|
492 | a8753c34 | bellard | extern BlockDriver bdrv_bochs;
|
493 | 6a0f9e82 | bellard | extern BlockDriver bdrv_vpc;
|
494 | de167e41 | bellard | extern BlockDriver bdrv_vvfat;
|
495 | ea2384d3 | bellard | |
496 | ea2384d3 | bellard | void bdrv_init(void); |
497 | ea2384d3 | bellard | BlockDriver *bdrv_find_format(const char *format_name); |
498 | ea2384d3 | bellard | int bdrv_create(BlockDriver *drv,
|
499 | ea2384d3 | bellard | const char *filename, int64_t size_in_sectors, |
500 | ea2384d3 | bellard | const char *backing_file, int flags); |
501 | c4b1fcc0 | bellard | BlockDriverState *bdrv_new(const char *device_name); |
502 | c4b1fcc0 | bellard | void bdrv_delete(BlockDriverState *bs);
|
503 | c4b1fcc0 | bellard | int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot); |
504 | ea2384d3 | bellard | int bdrv_open2(BlockDriverState *bs, const char *filename, int snapshot, |
505 | ea2384d3 | bellard | BlockDriver *drv); |
506 | fc01f7e7 | bellard | void bdrv_close(BlockDriverState *bs);
|
507 | fc01f7e7 | bellard | int bdrv_read(BlockDriverState *bs, int64_t sector_num,
|
508 | fc01f7e7 | bellard | uint8_t *buf, int nb_sectors);
|
509 | fc01f7e7 | bellard | int bdrv_write(BlockDriverState *bs, int64_t sector_num,
|
510 | fc01f7e7 | bellard | const uint8_t *buf, int nb_sectors); |
511 | fc01f7e7 | bellard | void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
|
512 | 33e3963e | bellard | int bdrv_commit(BlockDriverState *bs);
|
513 | 77fef8c1 | bellard | void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size); |
514 | 7a6cba61 | pbrook | /* Ensure contents are flushed to disk. */
|
515 | 7a6cba61 | pbrook | void bdrv_flush(BlockDriverState *bs);
|
516 | 33e3963e | bellard | |
517 | c4b1fcc0 | bellard | #define BDRV_TYPE_HD 0 |
518 | c4b1fcc0 | bellard | #define BDRV_TYPE_CDROM 1 |
519 | c4b1fcc0 | bellard | #define BDRV_TYPE_FLOPPY 2 |
520 | 46d4767d | bellard | #define BIOS_ATA_TRANSLATION_AUTO 0 |
521 | 46d4767d | bellard | #define BIOS_ATA_TRANSLATION_NONE 1 |
522 | 46d4767d | bellard | #define BIOS_ATA_TRANSLATION_LBA 2 |
523 | c4b1fcc0 | bellard | |
524 | c4b1fcc0 | bellard | void bdrv_set_geometry_hint(BlockDriverState *bs,
|
525 | c4b1fcc0 | bellard | int cyls, int heads, int secs); |
526 | c4b1fcc0 | bellard | void bdrv_set_type_hint(BlockDriverState *bs, int type); |
527 | 46d4767d | bellard | void bdrv_set_translation_hint(BlockDriverState *bs, int translation); |
528 | c4b1fcc0 | bellard | void bdrv_get_geometry_hint(BlockDriverState *bs,
|
529 | c4b1fcc0 | bellard | int *pcyls, int *pheads, int *psecs); |
530 | c4b1fcc0 | bellard | int bdrv_get_type_hint(BlockDriverState *bs);
|
531 | 46d4767d | bellard | int bdrv_get_translation_hint(BlockDriverState *bs);
|
532 | c4b1fcc0 | bellard | int bdrv_is_removable(BlockDriverState *bs);
|
533 | c4b1fcc0 | bellard | int bdrv_is_read_only(BlockDriverState *bs);
|
534 | c4b1fcc0 | bellard | int bdrv_is_inserted(BlockDriverState *bs);
|
535 | c4b1fcc0 | bellard | int bdrv_is_locked(BlockDriverState *bs);
|
536 | c4b1fcc0 | bellard | void bdrv_set_locked(BlockDriverState *bs, int locked); |
537 | c4b1fcc0 | bellard | void bdrv_set_change_cb(BlockDriverState *bs,
|
538 | c4b1fcc0 | bellard | void (*change_cb)(void *opaque), void *opaque); |
539 | ea2384d3 | bellard | void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size); |
540 | c4b1fcc0 | bellard | void bdrv_info(void); |
541 | c4b1fcc0 | bellard | BlockDriverState *bdrv_find(const char *name); |
542 | 82c643ff | bellard | void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque); |
543 | ea2384d3 | bellard | int bdrv_is_encrypted(BlockDriverState *bs);
|
544 | ea2384d3 | bellard | int bdrv_set_key(BlockDriverState *bs, const char *key); |
545 | ea2384d3 | bellard | void bdrv_iterate_format(void (*it)(void *opaque, const char *name), |
546 | ea2384d3 | bellard | void *opaque);
|
547 | ea2384d3 | bellard | const char *bdrv_get_device_name(BlockDriverState *bs); |
548 | c4b1fcc0 | bellard | |
549 | ea2384d3 | bellard | int qcow_get_cluster_size(BlockDriverState *bs);
|
550 | ea2384d3 | bellard | int qcow_compress_cluster(BlockDriverState *bs, int64_t sector_num,
|
551 | ea2384d3 | bellard | const uint8_t *buf);
|
552 | ea2384d3 | bellard | |
553 | ea2384d3 | bellard | #ifndef QEMU_TOOL
|
554 | 54fa5af5 | bellard | |
555 | 54fa5af5 | bellard | typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, |
556 | 54fa5af5 | bellard | int boot_device,
|
557 | 54fa5af5 | bellard | DisplayState *ds, const char **fd_filename, int snapshot, |
558 | 54fa5af5 | bellard | const char *kernel_filename, const char *kernel_cmdline, |
559 | 54fa5af5 | bellard | const char *initrd_filename); |
560 | 54fa5af5 | bellard | |
561 | 54fa5af5 | bellard | typedef struct QEMUMachine { |
562 | 54fa5af5 | bellard | const char *name; |
563 | 54fa5af5 | bellard | const char *desc; |
564 | 54fa5af5 | bellard | QEMUMachineInitFunc *init; |
565 | 54fa5af5 | bellard | struct QEMUMachine *next;
|
566 | 54fa5af5 | bellard | } QEMUMachine; |
567 | 54fa5af5 | bellard | |
568 | 54fa5af5 | bellard | int qemu_register_machine(QEMUMachine *m);
|
569 | 54fa5af5 | bellard | |
570 | 54fa5af5 | bellard | typedef void SetIRQFunc(void *opaque, int irq_num, int level); |
571 | 3de388f6 | bellard | typedef void IRQRequestFunc(void *opaque, int level); |
572 | 54fa5af5 | bellard | |
573 | 26aa7d72 | bellard | /* ISA bus */
|
574 | 26aa7d72 | bellard | |
575 | 26aa7d72 | bellard | extern target_phys_addr_t isa_mem_base;
|
576 | 26aa7d72 | bellard | |
577 | 26aa7d72 | bellard | typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); |
578 | 26aa7d72 | bellard | typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); |
579 | 26aa7d72 | bellard | |
580 | 26aa7d72 | bellard | int register_ioport_read(int start, int length, int size, |
581 | 26aa7d72 | bellard | IOPortReadFunc *func, void *opaque);
|
582 | 26aa7d72 | bellard | int register_ioport_write(int start, int length, int size, |
583 | 26aa7d72 | bellard | IOPortWriteFunc *func, void *opaque);
|
584 | 69b91039 | bellard | void isa_unassign_ioport(int start, int length); |
585 | 69b91039 | bellard | |
586 | 69b91039 | bellard | /* PCI bus */
|
587 | 69b91039 | bellard | |
588 | 69b91039 | bellard | extern target_phys_addr_t pci_mem_base;
|
589 | 69b91039 | bellard | |
590 | 46e50e9d | bellard | typedef struct PCIBus PCIBus; |
591 | 69b91039 | bellard | typedef struct PCIDevice PCIDevice; |
592 | 69b91039 | bellard | |
593 | 69b91039 | bellard | typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, |
594 | 69b91039 | bellard | uint32_t address, uint32_t data, int len);
|
595 | 69b91039 | bellard | typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
|
596 | 69b91039 | bellard | uint32_t address, int len);
|
597 | 69b91039 | bellard | typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, |
598 | 69b91039 | bellard | uint32_t addr, uint32_t size, int type);
|
599 | 69b91039 | bellard | |
600 | 69b91039 | bellard | #define PCI_ADDRESS_SPACE_MEM 0x00 |
601 | 69b91039 | bellard | #define PCI_ADDRESS_SPACE_IO 0x01 |
602 | 69b91039 | bellard | #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 |
603 | 69b91039 | bellard | |
604 | 69b91039 | bellard | typedef struct PCIIORegion { |
605 | 5768f5ac | bellard | uint32_t addr; /* current PCI mapping address. -1 means not mapped */
|
606 | 69b91039 | bellard | uint32_t size; |
607 | 69b91039 | bellard | uint8_t type; |
608 | 69b91039 | bellard | PCIMapIORegionFunc *map_func; |
609 | 69b91039 | bellard | } PCIIORegion; |
610 | 69b91039 | bellard | |
611 | 8a8696a3 | bellard | #define PCI_ROM_SLOT 6 |
612 | 8a8696a3 | bellard | #define PCI_NUM_REGIONS 7 |
613 | 502a5395 | pbrook | |
614 | 502a5395 | pbrook | #define PCI_DEVICES_MAX 64 |
615 | 502a5395 | pbrook | |
616 | 502a5395 | pbrook | #define PCI_VENDOR_ID 0x00 /* 16 bits */ |
617 | 502a5395 | pbrook | #define PCI_DEVICE_ID 0x02 /* 16 bits */ |
618 | 502a5395 | pbrook | #define PCI_COMMAND 0x04 /* 16 bits */ |
619 | 502a5395 | pbrook | #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */ |
620 | 502a5395 | pbrook | #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ |
621 | 502a5395 | pbrook | #define PCI_CLASS_DEVICE 0x0a /* Device class */ |
622 | 502a5395 | pbrook | #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */ |
623 | 502a5395 | pbrook | #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */ |
624 | 502a5395 | pbrook | #define PCI_MIN_GNT 0x3e /* 8 bits */ |
625 | 502a5395 | pbrook | #define PCI_MAX_LAT 0x3f /* 8 bits */ |
626 | 502a5395 | pbrook | |
627 | 69b91039 | bellard | struct PCIDevice {
|
628 | 69b91039 | bellard | /* PCI config space */
|
629 | 69b91039 | bellard | uint8_t config[256];
|
630 | 69b91039 | bellard | |
631 | 69b91039 | bellard | /* the following fields are read only */
|
632 | 46e50e9d | bellard | PCIBus *bus; |
633 | 69b91039 | bellard | int devfn;
|
634 | 69b91039 | bellard | char name[64]; |
635 | 8a8696a3 | bellard | PCIIORegion io_regions[PCI_NUM_REGIONS]; |
636 | 69b91039 | bellard | |
637 | 69b91039 | bellard | /* do not access the following fields */
|
638 | 69b91039 | bellard | PCIConfigReadFunc *config_read; |
639 | 69b91039 | bellard | PCIConfigWriteFunc *config_write; |
640 | 502a5395 | pbrook | /* ??? This is a PC-specific hack, and should be removed. */
|
641 | 5768f5ac | bellard | int irq_index;
|
642 | 69b91039 | bellard | }; |
643 | 69b91039 | bellard | |
644 | 46e50e9d | bellard | PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
645 | 46e50e9d | bellard | int instance_size, int devfn, |
646 | 69b91039 | bellard | PCIConfigReadFunc *config_read, |
647 | 69b91039 | bellard | PCIConfigWriteFunc *config_write); |
648 | 69b91039 | bellard | |
649 | 69b91039 | bellard | void pci_register_io_region(PCIDevice *pci_dev, int region_num, |
650 | 69b91039 | bellard | uint32_t size, int type,
|
651 | 69b91039 | bellard | PCIMapIORegionFunc *map_func); |
652 | 69b91039 | bellard | |
653 | 5768f5ac | bellard | void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level); |
654 | 5768f5ac | bellard | |
655 | 5768f5ac | bellard | uint32_t pci_default_read_config(PCIDevice *d, |
656 | 5768f5ac | bellard | uint32_t address, int len);
|
657 | 5768f5ac | bellard | void pci_default_write_config(PCIDevice *d,
|
658 | 5768f5ac | bellard | uint32_t address, uint32_t val, int len);
|
659 | 30ca2aab | bellard | void generic_pci_save(QEMUFile* f, void *opaque); |
660 | 30ca2aab | bellard | int generic_pci_load(QEMUFile* f, void *opaque, int version_id); |
661 | 5768f5ac | bellard | |
662 | 502a5395 | pbrook | typedef void (*pci_set_irq_fn)(PCIDevice *pci_dev, void *pic, |
663 | 502a5395 | pbrook | int irq_num, int level); |
664 | 502a5395 | pbrook | PCIBus *pci_register_bus(pci_set_irq_fn set_irq, void *pic, int devfn_min); |
665 | 502a5395 | pbrook | |
666 | 502a5395 | pbrook | void pci_nic_init(PCIBus *bus, NICInfo *nd);
|
667 | 502a5395 | pbrook | void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len); |
668 | 502a5395 | pbrook | uint32_t pci_data_read(void *opaque, uint32_t addr, int len); |
669 | 502a5395 | pbrook | int pci_bus_num(PCIBus *s);
|
670 | 502a5395 | pbrook | void pci_for_each_device(void (*fn)(PCIDevice *d)); |
671 | 9995c51f | bellard | |
672 | 5768f5ac | bellard | void pci_info(void); |
673 | 26aa7d72 | bellard | |
674 | 502a5395 | pbrook | /* prep_pci.c */
|
675 | 46e50e9d | bellard | PCIBus *pci_prep_init(void);
|
676 | 77d4bc34 | bellard | |
677 | 502a5395 | pbrook | /* grackle_pci.c */
|
678 | 502a5395 | pbrook | PCIBus *pci_grackle_init(uint32_t base, void *pic);
|
679 | 502a5395 | pbrook | |
680 | 502a5395 | pbrook | /* unin_pci.c */
|
681 | 502a5395 | pbrook | PCIBus *pci_pmac_init(void *pic);
|
682 | 502a5395 | pbrook | |
683 | 502a5395 | pbrook | /* apb_pci.c */
|
684 | 502a5395 | pbrook | PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base, |
685 | 502a5395 | pbrook | void *pic);
|
686 | 502a5395 | pbrook | |
687 | 502a5395 | pbrook | PCIBus *pci_vpb_init(void *pic);
|
688 | 502a5395 | pbrook | |
689 | 502a5395 | pbrook | /* piix_pci.c */
|
690 | 502a5395 | pbrook | PCIBus *i440fx_init(void);
|
691 | 502a5395 | pbrook | int piix3_init(PCIBus *bus);
|
692 | 502a5395 | pbrook | void pci_bios_init(void); |
693 | a41b2ff2 | pbrook | |
694 | 28b9b5af | bellard | /* openpic.c */
|
695 | 28b9b5af | bellard | typedef struct openpic_t openpic_t; |
696 | 54fa5af5 | bellard | void openpic_set_irq(void *opaque, int n_IRQ, int level); |
697 | 7668a27f | bellard | openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus, |
698 | 7668a27f | bellard | CPUState **envp); |
699 | 28b9b5af | bellard | |
700 | 54fa5af5 | bellard | /* heathrow_pic.c */
|
701 | 54fa5af5 | bellard | typedef struct HeathrowPICS HeathrowPICS; |
702 | 54fa5af5 | bellard | void heathrow_pic_set_irq(void *opaque, int num, int level); |
703 | 54fa5af5 | bellard | HeathrowPICS *heathrow_pic_init(int *pmem_index);
|
704 | 54fa5af5 | bellard | |
705 | 6a36d84e | bellard | #ifdef HAS_AUDIO
|
706 | 6a36d84e | bellard | struct soundhw {
|
707 | 6a36d84e | bellard | const char *name; |
708 | 6a36d84e | bellard | const char *descr; |
709 | 6a36d84e | bellard | int enabled;
|
710 | 6a36d84e | bellard | int isa;
|
711 | 6a36d84e | bellard | union {
|
712 | 6a36d84e | bellard | int (*init_isa) (AudioState *s);
|
713 | 6a36d84e | bellard | int (*init_pci) (PCIBus *bus, AudioState *s);
|
714 | 6a36d84e | bellard | } init; |
715 | 6a36d84e | bellard | }; |
716 | 6a36d84e | bellard | |
717 | 6a36d84e | bellard | extern struct soundhw soundhw[]; |
718 | 6a36d84e | bellard | #endif
|
719 | 6a36d84e | bellard | |
720 | 313aa567 | bellard | /* vga.c */
|
721 | 313aa567 | bellard | |
722 | 74a14f22 | bellard | #define VGA_RAM_SIZE (8192 * 1024) |
723 | 313aa567 | bellard | |
724 | 82c643ff | bellard | struct DisplayState {
|
725 | 313aa567 | bellard | uint8_t *data; |
726 | 313aa567 | bellard | int linesize;
|
727 | 313aa567 | bellard | int depth;
|
728 | d3079cd2 | bellard | int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */ |
729 | 82c643ff | bellard | int width;
|
730 | 82c643ff | bellard | int height;
|
731 | 24236869 | bellard | void *opaque;
|
732 | 24236869 | bellard | |
733 | 313aa567 | bellard | void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h); |
734 | 313aa567 | bellard | void (*dpy_resize)(struct DisplayState *s, int w, int h); |
735 | 313aa567 | bellard | void (*dpy_refresh)(struct DisplayState *s); |
736 | 24236869 | bellard | void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h); |
737 | 82c643ff | bellard | }; |
738 | 313aa567 | bellard | |
739 | 313aa567 | bellard | static inline void dpy_update(DisplayState *s, int x, int y, int w, int h) |
740 | 313aa567 | bellard | { |
741 | 313aa567 | bellard | s->dpy_update(s, x, y, w, h); |
742 | 313aa567 | bellard | } |
743 | 313aa567 | bellard | |
744 | 313aa567 | bellard | static inline void dpy_resize(DisplayState *s, int w, int h) |
745 | 313aa567 | bellard | { |
746 | 313aa567 | bellard | s->dpy_resize(s, w, h); |
747 | 313aa567 | bellard | } |
748 | 313aa567 | bellard | |
749 | 46e50e9d | bellard | int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
750 | d5295253 | bellard | unsigned long vga_ram_offset, int vga_ram_size, |
751 | d5295253 | bellard | unsigned long vga_bios_offset, int vga_bios_size); |
752 | 313aa567 | bellard | |
753 | d6bfa22f | bellard | /* cirrus_vga.c */
|
754 | 46e50e9d | bellard | void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
755 | d6bfa22f | bellard | unsigned long vga_ram_offset, int vga_ram_size); |
756 | d6bfa22f | bellard | void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
|
757 | d6bfa22f | bellard | unsigned long vga_ram_offset, int vga_ram_size); |
758 | d6bfa22f | bellard | |
759 | 313aa567 | bellard | /* sdl.c */
|
760 | d63d307f | bellard | void sdl_display_init(DisplayState *ds, int full_screen); |
761 | 313aa567 | bellard | |
762 | da4dbf74 | bellard | /* cocoa.m */
|
763 | da4dbf74 | bellard | void cocoa_display_init(DisplayState *ds, int full_screen); |
764 | da4dbf74 | bellard | |
765 | 24236869 | bellard | /* vnc.c */
|
766 | 24236869 | bellard | void vnc_display_init(DisplayState *ds, int display); |
767 | 24236869 | bellard | |
768 | 5391d806 | bellard | /* ide.c */
|
769 | 5391d806 | bellard | #define MAX_DISKS 4 |
770 | 5391d806 | bellard | |
771 | 5391d806 | bellard | extern BlockDriverState *bs_table[MAX_DISKS];
|
772 | 5391d806 | bellard | |
773 | 69b91039 | bellard | void isa_ide_init(int iobase, int iobase2, int irq, |
774 | 69b91039 | bellard | BlockDriverState *hd0, BlockDriverState *hd1); |
775 | 54fa5af5 | bellard | void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
|
776 | 54fa5af5 | bellard | int secondary_ide_enabled);
|
777 | 502a5395 | pbrook | void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn); |
778 | 28b9b5af | bellard | int pmac_ide_init (BlockDriverState **hd_table,
|
779 | 54fa5af5 | bellard | SetIRQFunc *set_irq, void *irq_opaque, int irq); |
780 | 5391d806 | bellard | |
781 | 2e5d83bb | pbrook | /* cdrom.c */
|
782 | 2e5d83bb | pbrook | int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track); |
783 | 2e5d83bb | pbrook | int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num); |
784 | 2e5d83bb | pbrook | |
785 | 1d14ffa9 | bellard | /* es1370.c */
|
786 | c0fe3827 | bellard | int es1370_init (PCIBus *bus, AudioState *s);
|
787 | 1d14ffa9 | bellard | |
788 | fb065187 | bellard | /* sb16.c */
|
789 | c0fe3827 | bellard | int SB16_init (AudioState *s);
|
790 | fb065187 | bellard | |
791 | fb065187 | bellard | /* adlib.c */
|
792 | c0fe3827 | bellard | int Adlib_init (AudioState *s);
|
793 | fb065187 | bellard | |
794 | fb065187 | bellard | /* gus.c */
|
795 | c0fe3827 | bellard | int GUS_init (AudioState *s);
|
796 | 27503323 | bellard | |
797 | 27503323 | bellard | /* dma.c */
|
798 | 85571bc7 | bellard | typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size); |
799 | 27503323 | bellard | int DMA_get_channel_mode (int nchan); |
800 | 85571bc7 | bellard | int DMA_read_memory (int nchan, void *buf, int pos, int size); |
801 | 85571bc7 | bellard | int DMA_write_memory (int nchan, void *buf, int pos, int size); |
802 | 27503323 | bellard | void DMA_hold_DREQ (int nchan); |
803 | 27503323 | bellard | void DMA_release_DREQ (int nchan); |
804 | 16f62432 | bellard | void DMA_schedule(int nchan); |
805 | 27503323 | bellard | void DMA_run (void); |
806 | 28b9b5af | bellard | void DMA_init (int high_page_enable); |
807 | 27503323 | bellard | void DMA_register_channel (int nchan, |
808 | 85571bc7 | bellard | DMA_transfer_handler transfer_handler, |
809 | 85571bc7 | bellard | void *opaque);
|
810 | 7138fcfb | bellard | /* fdc.c */
|
811 | 7138fcfb | bellard | #define MAX_FD 2 |
812 | 7138fcfb | bellard | extern BlockDriverState *fd_table[MAX_FD];
|
813 | 7138fcfb | bellard | |
814 | baca51fa | bellard | typedef struct fdctrl_t fdctrl_t; |
815 | baca51fa | bellard | |
816 | baca51fa | bellard | fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, |
817 | baca51fa | bellard | uint32_t io_base, |
818 | baca51fa | bellard | BlockDriverState **fds); |
819 | baca51fa | bellard | int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); |
820 | 7138fcfb | bellard | |
821 | 80cabfad | bellard | /* ne2000.c */
|
822 | 80cabfad | bellard | |
823 | 7c9d8e07 | bellard | void isa_ne2000_init(int base, int irq, NICInfo *nd); |
824 | 7c9d8e07 | bellard | void pci_ne2000_init(PCIBus *bus, NICInfo *nd);
|
825 | 80cabfad | bellard | |
826 | a41b2ff2 | pbrook | /* rtl8139.c */
|
827 | a41b2ff2 | pbrook | |
828 | a41b2ff2 | pbrook | void pci_rtl8139_init(PCIBus *bus, NICInfo *nd);
|
829 | a41b2ff2 | pbrook | |
830 | 80cabfad | bellard | /* pckbd.c */
|
831 | 80cabfad | bellard | |
832 | 80cabfad | bellard | void kbd_init(void); |
833 | 80cabfad | bellard | |
834 | 80cabfad | bellard | /* mc146818rtc.c */
|
835 | 80cabfad | bellard | |
836 | 8a7ddc38 | bellard | typedef struct RTCState RTCState; |
837 | 80cabfad | bellard | |
838 | 8a7ddc38 | bellard | RTCState *rtc_init(int base, int irq); |
839 | 8a7ddc38 | bellard | void rtc_set_memory(RTCState *s, int addr, int val); |
840 | 8a7ddc38 | bellard | void rtc_set_date(RTCState *s, const struct tm *tm); |
841 | 80cabfad | bellard | |
842 | 80cabfad | bellard | /* serial.c */
|
843 | 80cabfad | bellard | |
844 | c4b1fcc0 | bellard | typedef struct SerialState SerialState; |
845 | e5d13e2f | bellard | SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
|
846 | e5d13e2f | bellard | int base, int irq, CharDriverState *chr); |
847 | e5d13e2f | bellard | SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
|
848 | e5d13e2f | bellard | target_ulong base, int it_shift,
|
849 | e5d13e2f | bellard | int irq, CharDriverState *chr);
|
850 | 80cabfad | bellard | |
851 | 6508fe59 | bellard | /* parallel.c */
|
852 | 6508fe59 | bellard | |
853 | 6508fe59 | bellard | typedef struct ParallelState ParallelState; |
854 | 6508fe59 | bellard | ParallelState *parallel_init(int base, int irq, CharDriverState *chr); |
855 | 6508fe59 | bellard | |
856 | 80cabfad | bellard | /* i8259.c */
|
857 | 80cabfad | bellard | |
858 | 3de388f6 | bellard | typedef struct PicState2 PicState2; |
859 | 3de388f6 | bellard | extern PicState2 *isa_pic;
|
860 | 80cabfad | bellard | void pic_set_irq(int irq, int level); |
861 | 54fa5af5 | bellard | void pic_set_irq_new(void *opaque, int irq, int level); |
862 | 3de388f6 | bellard | PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
|
863 | d592d303 | bellard | void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
|
864 | d592d303 | bellard | void *alt_irq_opaque);
|
865 | 3de388f6 | bellard | int pic_read_irq(PicState2 *s);
|
866 | 3de388f6 | bellard | void pic_update_irq(PicState2 *s);
|
867 | 3de388f6 | bellard | uint32_t pic_intack_read(PicState2 *s); |
868 | c20709aa | bellard | void pic_info(void); |
869 | 4a0fb71e | bellard | void irq_info(void); |
870 | 80cabfad | bellard | |
871 | c27004ec | bellard | /* APIC */
|
872 | d592d303 | bellard | typedef struct IOAPICState IOAPICState; |
873 | d592d303 | bellard | |
874 | c27004ec | bellard | int apic_init(CPUState *env);
|
875 | c27004ec | bellard | int apic_get_interrupt(CPUState *env);
|
876 | d592d303 | bellard | IOAPICState *ioapic_init(void);
|
877 | d592d303 | bellard | void ioapic_set_irq(void *opaque, int vector, int level); |
878 | c27004ec | bellard | |
879 | 80cabfad | bellard | /* i8254.c */
|
880 | 80cabfad | bellard | |
881 | 80cabfad | bellard | #define PIT_FREQ 1193182 |
882 | 80cabfad | bellard | |
883 | ec844b96 | bellard | typedef struct PITState PITState; |
884 | ec844b96 | bellard | |
885 | ec844b96 | bellard | PITState *pit_init(int base, int irq); |
886 | ec844b96 | bellard | void pit_set_gate(PITState *pit, int channel, int val); |
887 | ec844b96 | bellard | int pit_get_gate(PITState *pit, int channel); |
888 | fd06c375 | bellard | int pit_get_initial_count(PITState *pit, int channel); |
889 | fd06c375 | bellard | int pit_get_mode(PITState *pit, int channel); |
890 | ec844b96 | bellard | int pit_get_out(PITState *pit, int channel, int64_t current_time); |
891 | 80cabfad | bellard | |
892 | fd06c375 | bellard | /* pcspk.c */
|
893 | fd06c375 | bellard | void pcspk_init(PITState *);
|
894 | fd06c375 | bellard | int pcspk_audio_init(AudioState *);
|
895 | fd06c375 | bellard | |
896 | 6515b203 | bellard | /* acpi.c */
|
897 | 6515b203 | bellard | extern int acpi_enabled; |
898 | 502a5395 | pbrook | void piix4_pm_init(PCIBus *bus, int devfn); |
899 | 6515b203 | bellard | void acpi_bios_init(void); |
900 | 6515b203 | bellard | |
901 | 80cabfad | bellard | /* pc.c */
|
902 | 54fa5af5 | bellard | extern QEMUMachine pc_machine;
|
903 | 3dbbdc25 | bellard | extern QEMUMachine isapc_machine;
|
904 | 52ca8d6a | bellard | extern int fd_bootchk; |
905 | 80cabfad | bellard | |
906 | 6a00d601 | bellard | void ioport_set_a20(int enable); |
907 | 6a00d601 | bellard | int ioport_get_a20(void); |
908 | 6a00d601 | bellard | |
909 | 26aa7d72 | bellard | /* ppc.c */
|
910 | 54fa5af5 | bellard | extern QEMUMachine prep_machine;
|
911 | 54fa5af5 | bellard | extern QEMUMachine core99_machine;
|
912 | 54fa5af5 | bellard | extern QEMUMachine heathrow_machine;
|
913 | 54fa5af5 | bellard | |
914 | 6af0bf9c | bellard | /* mips_r4k.c */
|
915 | 6af0bf9c | bellard | extern QEMUMachine mips_machine;
|
916 | 6af0bf9c | bellard | |
917 | 27c7ca7e | bellard | /* shix.c */
|
918 | 27c7ca7e | bellard | extern QEMUMachine shix_machine;
|
919 | 27c7ca7e | bellard | |
920 | 8cc43fef | bellard | #ifdef TARGET_PPC
|
921 | 8cc43fef | bellard | ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq); |
922 | 8cc43fef | bellard | #endif
|
923 | 64201201 | bellard | void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val); |
924 | 77d4bc34 | bellard | |
925 | 77d4bc34 | bellard | extern CPUWriteMemoryFunc *PPC_io_write[];
|
926 | 77d4bc34 | bellard | extern CPUReadMemoryFunc *PPC_io_read[];
|
927 | 54fa5af5 | bellard | void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val); |
928 | 26aa7d72 | bellard | |
929 | e95c8d51 | bellard | /* sun4m.c */
|
930 | 54fa5af5 | bellard | extern QEMUMachine sun4m_machine;
|
931 | e80cfcfc | bellard | uint32_t iommu_translate(uint32_t addr); |
932 | ba3c64fb | bellard | void pic_set_irq_cpu(int irq, int level, unsigned int cpu); |
933 | e95c8d51 | bellard | |
934 | e95c8d51 | bellard | /* iommu.c */
|
935 | e80cfcfc | bellard | void *iommu_init(uint32_t addr);
|
936 | e80cfcfc | bellard | uint32_t iommu_translate_local(void *opaque, uint32_t addr);
|
937 | e95c8d51 | bellard | |
938 | e95c8d51 | bellard | /* lance.c */
|
939 | 7c9d8e07 | bellard | void lance_init(NICInfo *nd, int irq, uint32_t leaddr, uint32_t ledaddr); |
940 | e95c8d51 | bellard | |
941 | e95c8d51 | bellard | /* tcx.c */
|
942 | 95219897 | pbrook | void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
|
943 | 6f7e9aec | bellard | unsigned long vram_offset, int vram_size, int width, int height); |
944 | e80cfcfc | bellard | |
945 | e80cfcfc | bellard | /* slavio_intctl.c */
|
946 | e80cfcfc | bellard | void *slavio_intctl_init();
|
947 | ba3c64fb | bellard | void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env); |
948 | e80cfcfc | bellard | void slavio_pic_info(void *opaque); |
949 | e80cfcfc | bellard | void slavio_irq_info(void *opaque); |
950 | e80cfcfc | bellard | void slavio_pic_set_irq(void *opaque, int irq, int level); |
951 | ba3c64fb | bellard | void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu); |
952 | e95c8d51 | bellard | |
953 | 5fe141fd | bellard | /* loader.c */
|
954 | 5fe141fd | bellard | int get_image_size(const char *filename); |
955 | 5fe141fd | bellard | int load_image(const char *filename, uint8_t *addr); |
956 | 9ee3c029 | bellard | int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry); |
957 | e80cfcfc | bellard | int load_aout(const char *filename, uint8_t *addr); |
958 | e80cfcfc | bellard | |
959 | e80cfcfc | bellard | /* slavio_timer.c */
|
960 | ba3c64fb | bellard | void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu); |
961 | 8d5f07fa | bellard | |
962 | e80cfcfc | bellard | /* slavio_serial.c */
|
963 | e80cfcfc | bellard | SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2); |
964 | e80cfcfc | bellard | void slavio_serial_ms_kbd_init(int base, int irq); |
965 | e95c8d51 | bellard | |
966 | 3475187d | bellard | /* slavio_misc.c */
|
967 | 3475187d | bellard | void *slavio_misc_init(uint32_t base, int irq); |
968 | 3475187d | bellard | void slavio_set_power_fail(void *opaque, int power_failing); |
969 | 3475187d | bellard | |
970 | 6f7e9aec | bellard | /* esp.c */
|
971 | 6f7e9aec | bellard | void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr); |
972 | 6f7e9aec | bellard | |
973 | 3475187d | bellard | /* sun4u.c */
|
974 | 3475187d | bellard | extern QEMUMachine sun4u_machine;
|
975 | 3475187d | bellard | |
976 | 64201201 | bellard | /* NVRAM helpers */
|
977 | 64201201 | bellard | #include "hw/m48t59.h" |
978 | 64201201 | bellard | |
979 | 64201201 | bellard | void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
|
980 | 64201201 | bellard | uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr); |
981 | 64201201 | bellard | void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
|
982 | 64201201 | bellard | uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr); |
983 | 64201201 | bellard | void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
|
984 | 64201201 | bellard | uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr); |
985 | 64201201 | bellard | void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
|
986 | 64201201 | bellard | const unsigned char *str, uint32_t max); |
987 | 64201201 | bellard | int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max); |
988 | 64201201 | bellard | void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
|
989 | 64201201 | bellard | uint32_t start, uint32_t count); |
990 | 64201201 | bellard | int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
|
991 | 64201201 | bellard | const unsigned char *arch, |
992 | 64201201 | bellard | uint32_t RAM_size, int boot_device,
|
993 | 64201201 | bellard | uint32_t kernel_image, uint32_t kernel_size, |
994 | 28b9b5af | bellard | const char *cmdline, |
995 | 64201201 | bellard | uint32_t initrd_image, uint32_t initrd_size, |
996 | 28b9b5af | bellard | uint32_t NVRAM_image, |
997 | 28b9b5af | bellard | int width, int height, int depth); |
998 | 64201201 | bellard | |
999 | 63066f4f | bellard | /* adb.c */
|
1000 | 63066f4f | bellard | |
1001 | 63066f4f | bellard | #define MAX_ADB_DEVICES 16 |
1002 | 63066f4f | bellard | |
1003 | e2733d20 | bellard | #define ADB_MAX_OUT_LEN 16 |
1004 | 63066f4f | bellard | |
1005 | e2733d20 | bellard | typedef struct ADBDevice ADBDevice; |
1006 | 63066f4f | bellard | |
1007 | e2733d20 | bellard | /* buf = NULL means polling */
|
1008 | e2733d20 | bellard | typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out, |
1009 | e2733d20 | bellard | const uint8_t *buf, int len); |
1010 | 12c28fed | bellard | typedef int ADBDeviceReset(ADBDevice *d); |
1011 | 12c28fed | bellard | |
1012 | 63066f4f | bellard | struct ADBDevice {
|
1013 | 63066f4f | bellard | struct ADBBusState *bus;
|
1014 | 63066f4f | bellard | int devaddr;
|
1015 | 63066f4f | bellard | int handler;
|
1016 | e2733d20 | bellard | ADBDeviceRequest *devreq; |
1017 | 12c28fed | bellard | ADBDeviceReset *devreset; |
1018 | 63066f4f | bellard | void *opaque;
|
1019 | 63066f4f | bellard | }; |
1020 | 63066f4f | bellard | |
1021 | 63066f4f | bellard | typedef struct ADBBusState { |
1022 | 63066f4f | bellard | ADBDevice devices[MAX_ADB_DEVICES]; |
1023 | 63066f4f | bellard | int nb_devices;
|
1024 | e2733d20 | bellard | int poll_index;
|
1025 | 63066f4f | bellard | } ADBBusState; |
1026 | 63066f4f | bellard | |
1027 | e2733d20 | bellard | int adb_request(ADBBusState *s, uint8_t *buf_out,
|
1028 | e2733d20 | bellard | const uint8_t *buf, int len); |
1029 | e2733d20 | bellard | int adb_poll(ADBBusState *s, uint8_t *buf_out);
|
1030 | 63066f4f | bellard | |
1031 | 63066f4f | bellard | ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
|
1032 | e2733d20 | bellard | ADBDeviceRequest *devreq, |
1033 | 12c28fed | bellard | ADBDeviceReset *devreset, |
1034 | 63066f4f | bellard | void *opaque);
|
1035 | 63066f4f | bellard | void adb_kbd_init(ADBBusState *bus);
|
1036 | 63066f4f | bellard | void adb_mouse_init(ADBBusState *bus);
|
1037 | 63066f4f | bellard | |
1038 | 63066f4f | bellard | /* cuda.c */
|
1039 | 63066f4f | bellard | |
1040 | 63066f4f | bellard | extern ADBBusState adb_bus;
|
1041 | 54fa5af5 | bellard | int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq); |
1042 | 63066f4f | bellard | |
1043 | bb36d470 | bellard | #include "hw/usb.h" |
1044 | bb36d470 | bellard | |
1045 | a594cfbf | bellard | /* usb ports of the VM */
|
1046 | a594cfbf | bellard | |
1047 | 0d92ed30 | pbrook | void qemu_register_usb_port(USBPort *port, void *opaque, int index, |
1048 | 0d92ed30 | pbrook | usb_attachfn attach); |
1049 | a594cfbf | bellard | |
1050 | 0d92ed30 | pbrook | #define VM_USB_HUB_SIZE 8 |
1051 | a594cfbf | bellard | |
1052 | a594cfbf | bellard | void do_usb_add(const char *devname); |
1053 | a594cfbf | bellard | void do_usb_del(const char *devname); |
1054 | a594cfbf | bellard | void usb_info(void); |
1055 | a594cfbf | bellard | |
1056 | 2e5d83bb | pbrook | /* scsi-disk.c */
|
1057 | 2e5d83bb | pbrook | typedef struct SCSIDevice SCSIDevice; |
1058 | 2e5d83bb | pbrook | typedef void (*scsi_completionfn)(void *, uint32_t, int); |
1059 | 2e5d83bb | pbrook | |
1060 | 2e5d83bb | pbrook | SCSIDevice *scsi_disk_init(BlockDriverState *bdrv, |
1061 | 2e5d83bb | pbrook | scsi_completionfn completion, |
1062 | 2e5d83bb | pbrook | void *opaque);
|
1063 | 2e5d83bb | pbrook | void scsi_disk_destroy(SCSIDevice *s);
|
1064 | 2e5d83bb | pbrook | |
1065 | 0fc5c15a | pbrook | int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
|
1066 | 2e5d83bb | pbrook | int scsi_read_data(SCSIDevice *s, uint8_t *data, uint32_t len);
|
1067 | 2e5d83bb | pbrook | int scsi_write_data(SCSIDevice *s, uint8_t *data, uint32_t len);
|
1068 | 2e5d83bb | pbrook | |
1069 | 7d8406be | pbrook | /* lsi53c895a.c */
|
1070 | 7d8406be | pbrook | void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id); |
1071 | 7d8406be | pbrook | void *lsi_scsi_init(PCIBus *bus, int devfn); |
1072 | 7d8406be | pbrook | |
1073 | b5ff1b31 | bellard | /* integratorcp.c */
|
1074 | 40f137e1 | pbrook | extern QEMUMachine integratorcp926_machine;
|
1075 | 40f137e1 | pbrook | extern QEMUMachine integratorcp1026_machine;
|
1076 | b5ff1b31 | bellard | |
1077 | cdbdb648 | pbrook | /* versatilepb.c */
|
1078 | cdbdb648 | pbrook | extern QEMUMachine versatilepb_machine;
|
1079 | 16406950 | pbrook | extern QEMUMachine versatileab_machine;
|
1080 | cdbdb648 | pbrook | |
1081 | daa57963 | bellard | /* ps2.c */
|
1082 | daa57963 | bellard | void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg); |
1083 | daa57963 | bellard | void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg); |
1084 | daa57963 | bellard | void ps2_write_mouse(void *, int val); |
1085 | daa57963 | bellard | void ps2_write_keyboard(void *, int val); |
1086 | daa57963 | bellard | uint32_t ps2_read_data(void *);
|
1087 | daa57963 | bellard | void ps2_queue(void *, int b); |
1088 | f94f5d71 | pbrook | void ps2_keyboard_set_translation(void *opaque, int mode); |
1089 | daa57963 | bellard | |
1090 | 80337b66 | bellard | /* smc91c111.c */
|
1091 | 80337b66 | bellard | void smc91c111_init(NICInfo *, uint32_t, void *, int); |
1092 | 80337b66 | bellard | |
1093 | bdd5003a | pbrook | /* pl110.c */
|
1094 | 95219897 | pbrook | void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int); |
1095 | bdd5003a | pbrook | |
1096 | cdbdb648 | pbrook | /* pl011.c */
|
1097 | cdbdb648 | pbrook | void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr); |
1098 | cdbdb648 | pbrook | |
1099 | cdbdb648 | pbrook | /* pl050.c */
|
1100 | cdbdb648 | pbrook | void pl050_init(uint32_t base, void *pic, int irq, int is_mouse); |
1101 | cdbdb648 | pbrook | |
1102 | cdbdb648 | pbrook | /* pl080.c */
|
1103 | cdbdb648 | pbrook | void *pl080_init(uint32_t base, void *pic, int irq); |
1104 | cdbdb648 | pbrook | |
1105 | cdbdb648 | pbrook | /* pl190.c */
|
1106 | cdbdb648 | pbrook | void *pl190_init(uint32_t base, void *parent, int irq, int fiq); |
1107 | cdbdb648 | pbrook | |
1108 | cdbdb648 | pbrook | /* arm-timer.c */
|
1109 | cdbdb648 | pbrook | void sp804_init(uint32_t base, void *pic, int irq); |
1110 | cdbdb648 | pbrook | void icp_pit_init(uint32_t base, void *pic, int irq); |
1111 | cdbdb648 | pbrook | |
1112 | 16406950 | pbrook | /* arm_boot.c */
|
1113 | 16406950 | pbrook | |
1114 | 16406950 | pbrook | void arm_load_kernel(int ram_size, const char *kernel_filename, |
1115 | 16406950 | pbrook | const char *kernel_cmdline, const char *initrd_filename, |
1116 | 16406950 | pbrook | int board_id);
|
1117 | 16406950 | pbrook | |
1118 | 27c7ca7e | bellard | /* sh7750.c */
|
1119 | 27c7ca7e | bellard | struct SH7750State;
|
1120 | 27c7ca7e | bellard | |
1121 | 008a8818 | pbrook | struct SH7750State *sh7750_init(CPUState * cpu);
|
1122 | 27c7ca7e | bellard | |
1123 | 27c7ca7e | bellard | typedef struct { |
1124 | 27c7ca7e | bellard | /* The callback will be triggered if any of the designated lines change */
|
1125 | 27c7ca7e | bellard | uint16_t portamask_trigger; |
1126 | 27c7ca7e | bellard | uint16_t portbmask_trigger; |
1127 | 27c7ca7e | bellard | /* Return 0 if no action was taken */
|
1128 | 27c7ca7e | bellard | int (*port_change_cb) (uint16_t porta, uint16_t portb,
|
1129 | 27c7ca7e | bellard | uint16_t * periph_pdtra, |
1130 | 27c7ca7e | bellard | uint16_t * periph_portdira, |
1131 | 27c7ca7e | bellard | uint16_t * periph_pdtrb, |
1132 | 27c7ca7e | bellard | uint16_t * periph_portdirb); |
1133 | 27c7ca7e | bellard | } sh7750_io_device; |
1134 | 27c7ca7e | bellard | |
1135 | 27c7ca7e | bellard | int sh7750_register_io_device(struct SH7750State *s, |
1136 | 27c7ca7e | bellard | sh7750_io_device * device); |
1137 | 27c7ca7e | bellard | /* tc58128.c */
|
1138 | 27c7ca7e | bellard | int tc58128_init(struct SH7750State *s, char *zone1, char *zone2); |
1139 | 27c7ca7e | bellard | |
1140 | 29133e9a | bellard | /* NOR flash devices */
|
1141 | 29133e9a | bellard | typedef struct pflash_t pflash_t; |
1142 | 29133e9a | bellard | |
1143 | 29133e9a | bellard | pflash_t *pflash_register (target_ulong base, ram_addr_t off, |
1144 | 29133e9a | bellard | BlockDriverState *bs, |
1145 | 29133e9a | bellard | target_ulong sector_len, int nb_blocs, int width, |
1146 | 29133e9a | bellard | uint16_t id0, uint16_t id1, |
1147 | 29133e9a | bellard | uint16_t id2, uint16_t id3); |
1148 | 29133e9a | bellard | |
1149 | ea2384d3 | bellard | #endif /* defined(QEMU_TOOL) */ |
1150 | ea2384d3 | bellard | |
1151 | c4b1fcc0 | bellard | /* monitor.c */
|
1152 | 82c643ff | bellard | void monitor_init(CharDriverState *hd, int show_banner); |
1153 | ea2384d3 | bellard | void term_puts(const char *str); |
1154 | ea2384d3 | bellard | void term_vprintf(const char *fmt, va_list ap); |
1155 | 40c3bac3 | bellard | void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2))); |
1156 | c4b1fcc0 | bellard | void term_flush(void); |
1157 | c4b1fcc0 | bellard | void term_print_help(void); |
1158 | ea2384d3 | bellard | void monitor_readline(const char *prompt, int is_password, |
1159 | ea2384d3 | bellard | char *buf, int buf_size); |
1160 | ea2384d3 | bellard | |
1161 | ea2384d3 | bellard | /* readline.c */
|
1162 | ea2384d3 | bellard | typedef void ReadLineFunc(void *opaque, const char *str); |
1163 | ea2384d3 | bellard | |
1164 | ea2384d3 | bellard | extern int completion_index; |
1165 | ea2384d3 | bellard | void add_completion(const char *str); |
1166 | ea2384d3 | bellard | void readline_handle_byte(int ch); |
1167 | ea2384d3 | bellard | void readline_find_completion(const char *cmdline); |
1168 | ea2384d3 | bellard | const char *readline_get_history(unsigned int index); |
1169 | ea2384d3 | bellard | void readline_start(const char *prompt, int is_password, |
1170 | ea2384d3 | bellard | ReadLineFunc *readline_func, void *opaque);
|
1171 | c4b1fcc0 | bellard | |
1172 | 5e6ad6f9 | bellard | void kqemu_record_dump(void); |
1173 | 5e6ad6f9 | bellard | |
1174 | fc01f7e7 | bellard | #endif /* VL_H */ |