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/*
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 * QEMU System Emulator header
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 * 
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 * Copyright (c) 2003 Fabrice Bellard
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 * 
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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#ifndef VL_H
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#define VL_H
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/* we put basic includes here to avoid repeating them in device drivers */
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdarg.h>
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#include <string.h>
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#include <inttypes.h>
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#include <limits.h>
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#include <time.h>
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#include <ctype.h>
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#include <errno.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include <sys/stat.h>
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#include "audio/audio.h"
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#ifndef O_LARGEFILE
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#define O_LARGEFILE 0
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#endif
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#ifndef O_BINARY
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#define O_BINARY 0
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#endif
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#ifdef _WIN32
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#include <windows.h>
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#define fsync _commit
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#define lseek _lseeki64
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#define ENOTSUP 4096
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/* XXX: find 64 bit version */
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#define ftruncate chsize
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static inline char *realpath(const char *path, char *resolved_path)
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{
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    _fullpath(resolved_path, path, _MAX_PATH);
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    return resolved_path;
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}
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#define PRId64 "I64d"
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#define PRIx64 "I64x"
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#define PRIu64 "I64u"
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#define PRIo64 "I64o"
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#endif
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#ifdef QEMU_TOOL
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/* we use QEMU_TOOL in the command line tools which do not depend on
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   the target CPU type */
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#include "config-host.h"
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#include <setjmp.h>
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#include "osdep.h"
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#include "bswap.h"
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#else
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#include "cpu.h"
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#include "gdbstub.h"
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#endif /* !defined(QEMU_TOOL) */
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#ifndef glue
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#define xglue(x, y) x ## y
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#define glue(x, y) xglue(x, y)
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#define stringify(s)        tostring(s)
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#define tostring(s)        #s
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#endif
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#ifndef MIN
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#define MIN(a, b) (((a) < (b)) ? (a) : (b))
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#endif
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#ifndef MAX
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#define MAX(a, b) (((a) > (b)) ? (a) : (b))
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#endif
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/* vl.c */
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uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
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void hw_error(const char *fmt, ...);
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extern const char *bios_dir;
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void pstrcpy(char *buf, int buf_size, const char *str);
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char *pstrcat(char *buf, int buf_size, const char *s);
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int strstart(const char *str, const char *val, const char **ptr);
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extern int vm_running;
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typedef struct vm_change_state_entry VMChangeStateEntry;
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typedef void VMChangeStateHandler(void *opaque, int running);
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typedef void VMStopHandler(void *opaque, int reason);
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VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
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                                                     void *opaque);
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void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
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int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
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void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
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void vm_start(void);
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void vm_stop(int reason);
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typedef void QEMUResetHandler(void *opaque);
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void qemu_register_reset(QEMUResetHandler *func, void *opaque);
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void qemu_system_reset_request(void);
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void qemu_system_shutdown_request(void);
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void qemu_system_powerdown_request(void);
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#if !defined(TARGET_SPARC)
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// Please implement a power failure function to signal the OS
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#define qemu_system_powerdown() do{}while(0)
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#else
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void qemu_system_powerdown(void);
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#endif
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void main_loop_wait(int timeout);
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extern int ram_size;
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extern int bios_size;
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extern int rtc_utc;
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extern int cirrus_vga_enabled;
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extern int graphic_width;
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extern int graphic_height;
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extern int graphic_depth;
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extern const char *keyboard_layout;
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extern int kqemu_allowed;
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extern int win2k_install_hack;
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extern int usb_enabled;
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extern int smp_cpus;
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/* XXX: make it dynamic */
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#if defined (TARGET_PPC) || defined (TARGET_SPARC64)
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#define BIOS_SIZE ((512 + 32) * 1024)
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#elif defined(TARGET_MIPS)
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#define BIOS_SIZE (128 * 1024)
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#else
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#define BIOS_SIZE ((256 + 64) * 1024)
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#endif
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/* keyboard/mouse support */
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#define MOUSE_EVENT_LBUTTON 0x01
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#define MOUSE_EVENT_RBUTTON 0x02
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#define MOUSE_EVENT_MBUTTON 0x04
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typedef void QEMUPutKBDEvent(void *opaque, int keycode);
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typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
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void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
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void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque, int absolute);
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void kbd_put_keycode(int keycode);
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void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
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int kbd_mouse_is_absolute(void);
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/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
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   constants) */
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#define QEMU_KEY_ESC1(c) ((c) | 0xe100)
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#define QEMU_KEY_BACKSPACE  0x007f
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#define QEMU_KEY_UP         QEMU_KEY_ESC1('A')
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#define QEMU_KEY_DOWN       QEMU_KEY_ESC1('B')
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#define QEMU_KEY_RIGHT      QEMU_KEY_ESC1('C')
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#define QEMU_KEY_LEFT       QEMU_KEY_ESC1('D')
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#define QEMU_KEY_HOME       QEMU_KEY_ESC1(1)
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#define QEMU_KEY_END        QEMU_KEY_ESC1(4)
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#define QEMU_KEY_PAGEUP     QEMU_KEY_ESC1(5)
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#define QEMU_KEY_PAGEDOWN   QEMU_KEY_ESC1(6)
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#define QEMU_KEY_DELETE     QEMU_KEY_ESC1(3)
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#define QEMU_KEY_CTRL_UP         0xe400
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#define QEMU_KEY_CTRL_DOWN       0xe401
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#define QEMU_KEY_CTRL_LEFT       0xe402
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#define QEMU_KEY_CTRL_RIGHT      0xe403
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#define QEMU_KEY_CTRL_HOME       0xe404
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#define QEMU_KEY_CTRL_END        0xe405
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#define QEMU_KEY_CTRL_PAGEUP     0xe406
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#define QEMU_KEY_CTRL_PAGEDOWN   0xe407
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void kbd_put_keysym(int keysym);
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/* async I/O support */
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typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
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typedef int IOCanRWHandler(void *opaque);
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typedef void IOHandler(void *opaque);
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int qemu_set_fd_handler2(int fd, 
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                         IOCanRWHandler *fd_read_poll, 
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                         IOHandler *fd_read, 
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                         IOHandler *fd_write, 
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                         void *opaque);
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int qemu_set_fd_handler(int fd,
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                        IOHandler *fd_read, 
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                        IOHandler *fd_write,
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                        void *opaque);
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/* Polling handling */
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/* return TRUE if no sleep should be done afterwards */
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typedef int PollingFunc(void *opaque);
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int qemu_add_polling_cb(PollingFunc *func, void *opaque);
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void qemu_del_polling_cb(PollingFunc *func, void *opaque);
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#ifdef _WIN32
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/* Wait objects handling */
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typedef void WaitObjectFunc(void *opaque);
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int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
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void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
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#endif
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/* character device */
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#define CHR_EVENT_BREAK 0 /* serial break char */
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#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
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#define CHR_IOCTL_SERIAL_SET_PARAMS   1
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typedef struct {
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    int speed;
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    int parity;
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    int data_bits;
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    int stop_bits;
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} QEMUSerialSetParams;
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#define CHR_IOCTL_SERIAL_SET_BREAK    2
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#define CHR_IOCTL_PP_READ_DATA        3
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#define CHR_IOCTL_PP_WRITE_DATA       4
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#define CHR_IOCTL_PP_READ_CONTROL     5
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#define CHR_IOCTL_PP_WRITE_CONTROL    6
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#define CHR_IOCTL_PP_READ_STATUS      7
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typedef void IOEventHandler(void *opaque, int event);
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typedef struct CharDriverState {
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    int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
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    void (*chr_add_read_handler)(struct CharDriverState *s, 
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                                 IOCanRWHandler *fd_can_read, 
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                                 IOReadHandler *fd_read, void *opaque);
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    int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
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    IOEventHandler *chr_event;
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    void (*chr_send_event)(struct CharDriverState *chr, int event);
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    void (*chr_close)(struct CharDriverState *chr);
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    void *opaque;
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} CharDriverState;
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void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
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int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
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void qemu_chr_send_event(CharDriverState *s, int event);
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void qemu_chr_add_read_handler(CharDriverState *s, 
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                               IOCanRWHandler *fd_can_read, 
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                               IOReadHandler *fd_read, void *opaque);
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void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
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int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
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/* consoles */
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typedef struct DisplayState DisplayState;
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typedef struct TextConsole TextConsole;
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typedef void (*vga_hw_update_ptr)(void *);
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typedef void (*vga_hw_invalidate_ptr)(void *);
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typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
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TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
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                                  vga_hw_invalidate_ptr invalidate,
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                                  vga_hw_screen_dump_ptr screen_dump,
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                                  void *opaque);
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void vga_hw_update(void);
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void vga_hw_invalidate(void);
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void vga_hw_screen_dump(const char *filename);
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int is_graphic_console(void);
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CharDriverState *text_console_init(DisplayState *ds);
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void console_select(unsigned int index);
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/* serial ports */
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#define MAX_SERIAL_PORTS 4
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extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
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/* parallel ports */
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#define MAX_PARALLEL_PORTS 3
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extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
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/* VLANs support */
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typedef struct VLANClientState VLANClientState;
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struct VLANClientState {
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    IOReadHandler *fd_read;
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    /* Packets may still be sent if this returns zero.  It's used to
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       rate-limit the slirp code.  */
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    IOCanRWHandler *fd_can_read;
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    void *opaque;
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    struct VLANClientState *next;
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    struct VLANState *vlan;
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    char info_str[256];
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};
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typedef struct VLANState {
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    int id;
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    VLANClientState *first_client;
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    struct VLANState *next;
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} VLANState;
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VLANState *qemu_find_vlan(int id);
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VLANClientState *qemu_new_vlan_client(VLANState *vlan,
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                                      IOReadHandler *fd_read,
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                                      IOCanRWHandler *fd_can_read,
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                                      void *opaque);
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int qemu_can_send_packet(VLANClientState *vc);
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void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
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void qemu_handler_true(void *opaque);
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void do_info_network(void);
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/* TAP win32 */
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int tap_win32_init(VLANState *vlan, const char *ifname);
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void tap_win32_poll(void);
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/* NIC info */
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#define MAX_NICS 8
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typedef struct NICInfo {
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    uint8_t macaddr[6];
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    const char *model;
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    VLANState *vlan;
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} NICInfo;
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extern int nb_nics;
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extern NICInfo nd_table[MAX_NICS];
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/* timers */
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typedef struct QEMUClock QEMUClock;
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typedef struct QEMUTimer QEMUTimer;
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typedef void QEMUTimerCB(void *opaque);
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/* The real time clock should be used only for stuff which does not
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   change the virtual machine state, as it is run even if the virtual
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   machine is stopped. The real time clock has a frequency of 1000
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   Hz. */
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extern QEMUClock *rt_clock;
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/* The virtual clock is only run during the emulation. It is stopped
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   when the virtual machine is stopped. Virtual timers use a high
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   precision clock, usually cpu cycles (use ticks_per_sec). */
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extern QEMUClock *vm_clock;
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int64_t qemu_get_clock(QEMUClock *clock);
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QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
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void qemu_free_timer(QEMUTimer *ts);
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void qemu_del_timer(QEMUTimer *ts);
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void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
387 8a7ddc38 bellard
int qemu_timer_pending(QEMUTimer *ts);
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extern int64_t ticks_per_sec;
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extern int pit_min_timer_count;
391 8a7ddc38 bellard
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void cpu_enable_ticks(void);
393 8a7ddc38 bellard
void cpu_disable_ticks(void);
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395 8a7ddc38 bellard
/* VM Load/Save */
396 8a7ddc38 bellard
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typedef FILE QEMUFile;
398 8a7ddc38 bellard
399 8a7ddc38 bellard
void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
400 8a7ddc38 bellard
void qemu_put_byte(QEMUFile *f, int v);
401 8a7ddc38 bellard
void qemu_put_be16(QEMUFile *f, unsigned int v);
402 8a7ddc38 bellard
void qemu_put_be32(QEMUFile *f, unsigned int v);
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void qemu_put_be64(QEMUFile *f, uint64_t v);
404 8a7ddc38 bellard
int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
405 8a7ddc38 bellard
int qemu_get_byte(QEMUFile *f);
406 8a7ddc38 bellard
unsigned int qemu_get_be16(QEMUFile *f);
407 8a7ddc38 bellard
unsigned int qemu_get_be32(QEMUFile *f);
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uint64_t qemu_get_be64(QEMUFile *f);
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static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
411 8a7ddc38 bellard
{
412 8a7ddc38 bellard
    qemu_put_be64(f, *pv);
413 8a7ddc38 bellard
}
414 8a7ddc38 bellard
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static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
416 8a7ddc38 bellard
{
417 8a7ddc38 bellard
    qemu_put_be32(f, *pv);
418 8a7ddc38 bellard
}
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static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
421 8a7ddc38 bellard
{
422 8a7ddc38 bellard
    qemu_put_be16(f, *pv);
423 8a7ddc38 bellard
}
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static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
426 8a7ddc38 bellard
{
427 8a7ddc38 bellard
    qemu_put_byte(f, *pv);
428 8a7ddc38 bellard
}
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static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
431 8a7ddc38 bellard
{
432 8a7ddc38 bellard
    *pv = qemu_get_be64(f);
433 8a7ddc38 bellard
}
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static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
436 8a7ddc38 bellard
{
437 8a7ddc38 bellard
    *pv = qemu_get_be32(f);
438 8a7ddc38 bellard
}
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static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
441 8a7ddc38 bellard
{
442 8a7ddc38 bellard
    *pv = qemu_get_be16(f);
443 8a7ddc38 bellard
}
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static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
446 8a7ddc38 bellard
{
447 8a7ddc38 bellard
    *pv = qemu_get_byte(f);
448 8a7ddc38 bellard
}
449 8a7ddc38 bellard
450 c27004ec bellard
#if TARGET_LONG_BITS == 64
451 c27004ec bellard
#define qemu_put_betl qemu_put_be64
452 c27004ec bellard
#define qemu_get_betl qemu_get_be64
453 c27004ec bellard
#define qemu_put_betls qemu_put_be64s
454 c27004ec bellard
#define qemu_get_betls qemu_get_be64s
455 c27004ec bellard
#else
456 c27004ec bellard
#define qemu_put_betl qemu_put_be32
457 c27004ec bellard
#define qemu_get_betl qemu_get_be32
458 c27004ec bellard
#define qemu_put_betls qemu_put_be32s
459 c27004ec bellard
#define qemu_get_betls qemu_get_be32s
460 c27004ec bellard
#endif
461 c27004ec bellard
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int64_t qemu_ftell(QEMUFile *f);
463 8a7ddc38 bellard
int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
464 8a7ddc38 bellard
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typedef void SaveStateHandler(QEMUFile *f, void *opaque);
466 8a7ddc38 bellard
typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
467 8a7ddc38 bellard
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int qemu_loadvm(const char *filename);
469 8a7ddc38 bellard
int qemu_savevm(const char *filename);
470 8a7ddc38 bellard
int register_savevm(const char *idstr, 
471 8a7ddc38 bellard
                    int instance_id, 
472 8a7ddc38 bellard
                    int version_id,
473 8a7ddc38 bellard
                    SaveStateHandler *save_state,
474 8a7ddc38 bellard
                    LoadStateHandler *load_state,
475 8a7ddc38 bellard
                    void *opaque);
476 8a7ddc38 bellard
void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
477 8a7ddc38 bellard
void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
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void cpu_save(QEMUFile *f, void *opaque);
480 6a00d601 bellard
int cpu_load(QEMUFile *f, void *opaque, int version_id);
481 6a00d601 bellard
482 fc01f7e7 bellard
/* block.c */
483 fc01f7e7 bellard
typedef struct BlockDriverState BlockDriverState;
484 ea2384d3 bellard
typedef struct BlockDriver BlockDriver;
485 ea2384d3 bellard
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extern BlockDriver bdrv_raw;
487 ea2384d3 bellard
extern BlockDriver bdrv_cow;
488 ea2384d3 bellard
extern BlockDriver bdrv_qcow;
489 ea2384d3 bellard
extern BlockDriver bdrv_vmdk;
490 3c56521b bellard
extern BlockDriver bdrv_cloop;
491 585d0ed9 bellard
extern BlockDriver bdrv_dmg;
492 a8753c34 bellard
extern BlockDriver bdrv_bochs;
493 6a0f9e82 bellard
extern BlockDriver bdrv_vpc;
494 de167e41 bellard
extern BlockDriver bdrv_vvfat;
495 ea2384d3 bellard
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void bdrv_init(void);
497 ea2384d3 bellard
BlockDriver *bdrv_find_format(const char *format_name);
498 ea2384d3 bellard
int bdrv_create(BlockDriver *drv, 
499 ea2384d3 bellard
                const char *filename, int64_t size_in_sectors,
500 ea2384d3 bellard
                const char *backing_file, int flags);
501 c4b1fcc0 bellard
BlockDriverState *bdrv_new(const char *device_name);
502 c4b1fcc0 bellard
void bdrv_delete(BlockDriverState *bs);
503 c4b1fcc0 bellard
int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot);
504 ea2384d3 bellard
int bdrv_open2(BlockDriverState *bs, const char *filename, int snapshot,
505 ea2384d3 bellard
               BlockDriver *drv);
506 fc01f7e7 bellard
void bdrv_close(BlockDriverState *bs);
507 fc01f7e7 bellard
int bdrv_read(BlockDriverState *bs, int64_t sector_num, 
508 fc01f7e7 bellard
              uint8_t *buf, int nb_sectors);
509 fc01f7e7 bellard
int bdrv_write(BlockDriverState *bs, int64_t sector_num, 
510 fc01f7e7 bellard
               const uint8_t *buf, int nb_sectors);
511 fc01f7e7 bellard
void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
512 33e3963e bellard
int bdrv_commit(BlockDriverState *bs);
513 77fef8c1 bellard
void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
514 7a6cba61 pbrook
/* Ensure contents are flushed to disk.  */
515 7a6cba61 pbrook
void bdrv_flush(BlockDriverState *bs);
516 33e3963e bellard
517 c4b1fcc0 bellard
#define BDRV_TYPE_HD     0
518 c4b1fcc0 bellard
#define BDRV_TYPE_CDROM  1
519 c4b1fcc0 bellard
#define BDRV_TYPE_FLOPPY 2
520 46d4767d bellard
#define BIOS_ATA_TRANSLATION_AUTO 0
521 46d4767d bellard
#define BIOS_ATA_TRANSLATION_NONE 1
522 46d4767d bellard
#define BIOS_ATA_TRANSLATION_LBA  2
523 c4b1fcc0 bellard
524 c4b1fcc0 bellard
void bdrv_set_geometry_hint(BlockDriverState *bs, 
525 c4b1fcc0 bellard
                            int cyls, int heads, int secs);
526 c4b1fcc0 bellard
void bdrv_set_type_hint(BlockDriverState *bs, int type);
527 46d4767d bellard
void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
528 c4b1fcc0 bellard
void bdrv_get_geometry_hint(BlockDriverState *bs, 
529 c4b1fcc0 bellard
                            int *pcyls, int *pheads, int *psecs);
530 c4b1fcc0 bellard
int bdrv_get_type_hint(BlockDriverState *bs);
531 46d4767d bellard
int bdrv_get_translation_hint(BlockDriverState *bs);
532 c4b1fcc0 bellard
int bdrv_is_removable(BlockDriverState *bs);
533 c4b1fcc0 bellard
int bdrv_is_read_only(BlockDriverState *bs);
534 c4b1fcc0 bellard
int bdrv_is_inserted(BlockDriverState *bs);
535 c4b1fcc0 bellard
int bdrv_is_locked(BlockDriverState *bs);
536 c4b1fcc0 bellard
void bdrv_set_locked(BlockDriverState *bs, int locked);
537 c4b1fcc0 bellard
void bdrv_set_change_cb(BlockDriverState *bs, 
538 c4b1fcc0 bellard
                        void (*change_cb)(void *opaque), void *opaque);
539 ea2384d3 bellard
void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
540 c4b1fcc0 bellard
void bdrv_info(void);
541 c4b1fcc0 bellard
BlockDriverState *bdrv_find(const char *name);
542 82c643ff bellard
void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
543 ea2384d3 bellard
int bdrv_is_encrypted(BlockDriverState *bs);
544 ea2384d3 bellard
int bdrv_set_key(BlockDriverState *bs, const char *key);
545 ea2384d3 bellard
void bdrv_iterate_format(void (*it)(void *opaque, const char *name), 
546 ea2384d3 bellard
                         void *opaque);
547 ea2384d3 bellard
const char *bdrv_get_device_name(BlockDriverState *bs);
548 c4b1fcc0 bellard
549 ea2384d3 bellard
int qcow_get_cluster_size(BlockDriverState *bs);
550 ea2384d3 bellard
int qcow_compress_cluster(BlockDriverState *bs, int64_t sector_num,
551 ea2384d3 bellard
                          const uint8_t *buf);
552 ea2384d3 bellard
553 ea2384d3 bellard
#ifndef QEMU_TOOL
554 54fa5af5 bellard
555 54fa5af5 bellard
typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, 
556 54fa5af5 bellard
                                 int boot_device,
557 54fa5af5 bellard
             DisplayState *ds, const char **fd_filename, int snapshot,
558 54fa5af5 bellard
             const char *kernel_filename, const char *kernel_cmdline,
559 54fa5af5 bellard
             const char *initrd_filename);
560 54fa5af5 bellard
561 54fa5af5 bellard
typedef struct QEMUMachine {
562 54fa5af5 bellard
    const char *name;
563 54fa5af5 bellard
    const char *desc;
564 54fa5af5 bellard
    QEMUMachineInitFunc *init;
565 54fa5af5 bellard
    struct QEMUMachine *next;
566 54fa5af5 bellard
} QEMUMachine;
567 54fa5af5 bellard
568 54fa5af5 bellard
int qemu_register_machine(QEMUMachine *m);
569 54fa5af5 bellard
570 54fa5af5 bellard
typedef void SetIRQFunc(void *opaque, int irq_num, int level);
571 3de388f6 bellard
typedef void IRQRequestFunc(void *opaque, int level);
572 54fa5af5 bellard
573 26aa7d72 bellard
/* ISA bus */
574 26aa7d72 bellard
575 26aa7d72 bellard
extern target_phys_addr_t isa_mem_base;
576 26aa7d72 bellard
577 26aa7d72 bellard
typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
578 26aa7d72 bellard
typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
579 26aa7d72 bellard
580 26aa7d72 bellard
int register_ioport_read(int start, int length, int size, 
581 26aa7d72 bellard
                         IOPortReadFunc *func, void *opaque);
582 26aa7d72 bellard
int register_ioport_write(int start, int length, int size, 
583 26aa7d72 bellard
                          IOPortWriteFunc *func, void *opaque);
584 69b91039 bellard
void isa_unassign_ioport(int start, int length);
585 69b91039 bellard
586 69b91039 bellard
/* PCI bus */
587 69b91039 bellard
588 69b91039 bellard
extern target_phys_addr_t pci_mem_base;
589 69b91039 bellard
590 46e50e9d bellard
typedef struct PCIBus PCIBus;
591 69b91039 bellard
typedef struct PCIDevice PCIDevice;
592 69b91039 bellard
593 69b91039 bellard
typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, 
594 69b91039 bellard
                                uint32_t address, uint32_t data, int len);
595 69b91039 bellard
typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev, 
596 69b91039 bellard
                                   uint32_t address, int len);
597 69b91039 bellard
typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, 
598 69b91039 bellard
                                uint32_t addr, uint32_t size, int type);
599 69b91039 bellard
600 69b91039 bellard
#define PCI_ADDRESS_SPACE_MEM                0x00
601 69b91039 bellard
#define PCI_ADDRESS_SPACE_IO                0x01
602 69b91039 bellard
#define PCI_ADDRESS_SPACE_MEM_PREFETCH        0x08
603 69b91039 bellard
604 69b91039 bellard
typedef struct PCIIORegion {
605 5768f5ac bellard
    uint32_t addr; /* current PCI mapping address. -1 means not mapped */
606 69b91039 bellard
    uint32_t size;
607 69b91039 bellard
    uint8_t type;
608 69b91039 bellard
    PCIMapIORegionFunc *map_func;
609 69b91039 bellard
} PCIIORegion;
610 69b91039 bellard
611 8a8696a3 bellard
#define PCI_ROM_SLOT 6
612 8a8696a3 bellard
#define PCI_NUM_REGIONS 7
613 502a5395 pbrook
614 502a5395 pbrook
#define PCI_DEVICES_MAX 64
615 502a5395 pbrook
616 502a5395 pbrook
#define PCI_VENDOR_ID                0x00        /* 16 bits */
617 502a5395 pbrook
#define PCI_DEVICE_ID                0x02        /* 16 bits */
618 502a5395 pbrook
#define PCI_COMMAND                0x04        /* 16 bits */
619 502a5395 pbrook
#define  PCI_COMMAND_IO                0x1        /* Enable response in I/O space */
620 502a5395 pbrook
#define  PCI_COMMAND_MEMORY        0x2        /* Enable response in Memory space */
621 502a5395 pbrook
#define PCI_CLASS_DEVICE        0x0a    /* Device class */
622 502a5395 pbrook
#define PCI_INTERRUPT_LINE        0x3c        /* 8 bits */
623 502a5395 pbrook
#define PCI_INTERRUPT_PIN        0x3d        /* 8 bits */
624 502a5395 pbrook
#define PCI_MIN_GNT                0x3e        /* 8 bits */
625 502a5395 pbrook
#define PCI_MAX_LAT                0x3f        /* 8 bits */
626 502a5395 pbrook
627 69b91039 bellard
struct PCIDevice {
628 69b91039 bellard
    /* PCI config space */
629 69b91039 bellard
    uint8_t config[256];
630 69b91039 bellard
631 69b91039 bellard
    /* the following fields are read only */
632 46e50e9d bellard
    PCIBus *bus;
633 69b91039 bellard
    int devfn;
634 69b91039 bellard
    char name[64];
635 8a8696a3 bellard
    PCIIORegion io_regions[PCI_NUM_REGIONS];
636 69b91039 bellard
    
637 69b91039 bellard
    /* do not access the following fields */
638 69b91039 bellard
    PCIConfigReadFunc *config_read;
639 69b91039 bellard
    PCIConfigWriteFunc *config_write;
640 502a5395 pbrook
    /* ??? This is a PC-specific hack, and should be removed.  */
641 5768f5ac bellard
    int irq_index;
642 69b91039 bellard
};
643 69b91039 bellard
644 46e50e9d bellard
PCIDevice *pci_register_device(PCIBus *bus, const char *name,
645 46e50e9d bellard
                               int instance_size, int devfn,
646 69b91039 bellard
                               PCIConfigReadFunc *config_read, 
647 69b91039 bellard
                               PCIConfigWriteFunc *config_write);
648 69b91039 bellard
649 69b91039 bellard
void pci_register_io_region(PCIDevice *pci_dev, int region_num, 
650 69b91039 bellard
                            uint32_t size, int type, 
651 69b91039 bellard
                            PCIMapIORegionFunc *map_func);
652 69b91039 bellard
653 5768f5ac bellard
void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
654 5768f5ac bellard
655 5768f5ac bellard
uint32_t pci_default_read_config(PCIDevice *d, 
656 5768f5ac bellard
                                 uint32_t address, int len);
657 5768f5ac bellard
void pci_default_write_config(PCIDevice *d, 
658 5768f5ac bellard
                              uint32_t address, uint32_t val, int len);
659 30ca2aab bellard
void generic_pci_save(QEMUFile* f, void *opaque);
660 30ca2aab bellard
int generic_pci_load(QEMUFile* f, void *opaque, int version_id);
661 5768f5ac bellard
662 502a5395 pbrook
typedef void (*pci_set_irq_fn)(PCIDevice *pci_dev, void *pic,
663 502a5395 pbrook
                               int irq_num, int level);
664 502a5395 pbrook
PCIBus *pci_register_bus(pci_set_irq_fn set_irq, void *pic, int devfn_min);
665 502a5395 pbrook
666 502a5395 pbrook
void pci_nic_init(PCIBus *bus, NICInfo *nd);
667 502a5395 pbrook
void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
668 502a5395 pbrook
uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
669 502a5395 pbrook
int pci_bus_num(PCIBus *s);
670 502a5395 pbrook
void pci_for_each_device(void (*fn)(PCIDevice *d));
671 9995c51f bellard
672 5768f5ac bellard
void pci_info(void);
673 26aa7d72 bellard
674 502a5395 pbrook
/* prep_pci.c */
675 46e50e9d bellard
PCIBus *pci_prep_init(void);
676 77d4bc34 bellard
677 502a5395 pbrook
/* grackle_pci.c */
678 502a5395 pbrook
PCIBus *pci_grackle_init(uint32_t base, void *pic);
679 502a5395 pbrook
680 502a5395 pbrook
/* unin_pci.c */
681 502a5395 pbrook
PCIBus *pci_pmac_init(void *pic);
682 502a5395 pbrook
683 502a5395 pbrook
/* apb_pci.c */
684 502a5395 pbrook
PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
685 502a5395 pbrook
                     void *pic);
686 502a5395 pbrook
687 502a5395 pbrook
PCIBus *pci_vpb_init(void *pic);
688 502a5395 pbrook
689 502a5395 pbrook
/* piix_pci.c */
690 502a5395 pbrook
PCIBus *i440fx_init(void);
691 502a5395 pbrook
int piix3_init(PCIBus *bus);
692 502a5395 pbrook
void pci_bios_init(void);
693 a41b2ff2 pbrook
694 28b9b5af bellard
/* openpic.c */
695 28b9b5af bellard
typedef struct openpic_t openpic_t;
696 54fa5af5 bellard
void openpic_set_irq(void *opaque, int n_IRQ, int level);
697 7668a27f bellard
openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
698 7668a27f bellard
                         CPUState **envp);
699 28b9b5af bellard
700 54fa5af5 bellard
/* heathrow_pic.c */
701 54fa5af5 bellard
typedef struct HeathrowPICS HeathrowPICS;
702 54fa5af5 bellard
void heathrow_pic_set_irq(void *opaque, int num, int level);
703 54fa5af5 bellard
HeathrowPICS *heathrow_pic_init(int *pmem_index);
704 54fa5af5 bellard
705 6a36d84e bellard
#ifdef HAS_AUDIO
706 6a36d84e bellard
struct soundhw {
707 6a36d84e bellard
    const char *name;
708 6a36d84e bellard
    const char *descr;
709 6a36d84e bellard
    int enabled;
710 6a36d84e bellard
    int isa;
711 6a36d84e bellard
    union {
712 6a36d84e bellard
        int (*init_isa) (AudioState *s);
713 6a36d84e bellard
        int (*init_pci) (PCIBus *bus, AudioState *s);
714 6a36d84e bellard
    } init;
715 6a36d84e bellard
};
716 6a36d84e bellard
717 6a36d84e bellard
extern struct soundhw soundhw[];
718 6a36d84e bellard
#endif
719 6a36d84e bellard
720 313aa567 bellard
/* vga.c */
721 313aa567 bellard
722 74a14f22 bellard
#define VGA_RAM_SIZE (8192 * 1024)
723 313aa567 bellard
724 82c643ff bellard
struct DisplayState {
725 313aa567 bellard
    uint8_t *data;
726 313aa567 bellard
    int linesize;
727 313aa567 bellard
    int depth;
728 d3079cd2 bellard
    int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
729 82c643ff bellard
    int width;
730 82c643ff bellard
    int height;
731 24236869 bellard
    void *opaque;
732 24236869 bellard
733 313aa567 bellard
    void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
734 313aa567 bellard
    void (*dpy_resize)(struct DisplayState *s, int w, int h);
735 313aa567 bellard
    void (*dpy_refresh)(struct DisplayState *s);
736 24236869 bellard
    void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
737 82c643ff bellard
};
738 313aa567 bellard
739 313aa567 bellard
static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
740 313aa567 bellard
{
741 313aa567 bellard
    s->dpy_update(s, x, y, w, h);
742 313aa567 bellard
}
743 313aa567 bellard
744 313aa567 bellard
static inline void dpy_resize(DisplayState *s, int w, int h)
745 313aa567 bellard
{
746 313aa567 bellard
    s->dpy_resize(s, w, h);
747 313aa567 bellard
}
748 313aa567 bellard
749 46e50e9d bellard
int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, 
750 d5295253 bellard
                   unsigned long vga_ram_offset, int vga_ram_size,
751 d5295253 bellard
                   unsigned long vga_bios_offset, int vga_bios_size);
752 313aa567 bellard
753 d6bfa22f bellard
/* cirrus_vga.c */
754 46e50e9d bellard
void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, 
755 d6bfa22f bellard
                         unsigned long vga_ram_offset, int vga_ram_size);
756 d6bfa22f bellard
void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base, 
757 d6bfa22f bellard
                         unsigned long vga_ram_offset, int vga_ram_size);
758 d6bfa22f bellard
759 313aa567 bellard
/* sdl.c */
760 d63d307f bellard
void sdl_display_init(DisplayState *ds, int full_screen);
761 313aa567 bellard
762 da4dbf74 bellard
/* cocoa.m */
763 da4dbf74 bellard
void cocoa_display_init(DisplayState *ds, int full_screen);
764 da4dbf74 bellard
765 24236869 bellard
/* vnc.c */
766 24236869 bellard
void vnc_display_init(DisplayState *ds, int display);
767 24236869 bellard
768 5391d806 bellard
/* ide.c */
769 5391d806 bellard
#define MAX_DISKS 4
770 5391d806 bellard
771 5391d806 bellard
extern BlockDriverState *bs_table[MAX_DISKS];
772 5391d806 bellard
773 69b91039 bellard
void isa_ide_init(int iobase, int iobase2, int irq,
774 69b91039 bellard
                  BlockDriverState *hd0, BlockDriverState *hd1);
775 54fa5af5 bellard
void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
776 54fa5af5 bellard
                         int secondary_ide_enabled);
777 502a5395 pbrook
void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
778 28b9b5af bellard
int pmac_ide_init (BlockDriverState **hd_table,
779 54fa5af5 bellard
                   SetIRQFunc *set_irq, void *irq_opaque, int irq);
780 5391d806 bellard
781 2e5d83bb pbrook
/* cdrom.c */
782 2e5d83bb pbrook
int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
783 2e5d83bb pbrook
int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
784 2e5d83bb pbrook
785 1d14ffa9 bellard
/* es1370.c */
786 c0fe3827 bellard
int es1370_init (PCIBus *bus, AudioState *s);
787 1d14ffa9 bellard
788 fb065187 bellard
/* sb16.c */
789 c0fe3827 bellard
int SB16_init (AudioState *s);
790 fb065187 bellard
791 fb065187 bellard
/* adlib.c */
792 c0fe3827 bellard
int Adlib_init (AudioState *s);
793 fb065187 bellard
794 fb065187 bellard
/* gus.c */
795 c0fe3827 bellard
int GUS_init (AudioState *s);
796 27503323 bellard
797 27503323 bellard
/* dma.c */
798 85571bc7 bellard
typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
799 27503323 bellard
int DMA_get_channel_mode (int nchan);
800 85571bc7 bellard
int DMA_read_memory (int nchan, void *buf, int pos, int size);
801 85571bc7 bellard
int DMA_write_memory (int nchan, void *buf, int pos, int size);
802 27503323 bellard
void DMA_hold_DREQ (int nchan);
803 27503323 bellard
void DMA_release_DREQ (int nchan);
804 16f62432 bellard
void DMA_schedule(int nchan);
805 27503323 bellard
void DMA_run (void);
806 28b9b5af bellard
void DMA_init (int high_page_enable);
807 27503323 bellard
void DMA_register_channel (int nchan,
808 85571bc7 bellard
                           DMA_transfer_handler transfer_handler,
809 85571bc7 bellard
                           void *opaque);
810 7138fcfb bellard
/* fdc.c */
811 7138fcfb bellard
#define MAX_FD 2
812 7138fcfb bellard
extern BlockDriverState *fd_table[MAX_FD];
813 7138fcfb bellard
814 baca51fa bellard
typedef struct fdctrl_t fdctrl_t;
815 baca51fa bellard
816 baca51fa bellard
fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, 
817 baca51fa bellard
                       uint32_t io_base,
818 baca51fa bellard
                       BlockDriverState **fds);
819 baca51fa bellard
int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
820 7138fcfb bellard
821 80cabfad bellard
/* ne2000.c */
822 80cabfad bellard
823 7c9d8e07 bellard
void isa_ne2000_init(int base, int irq, NICInfo *nd);
824 7c9d8e07 bellard
void pci_ne2000_init(PCIBus *bus, NICInfo *nd);
825 80cabfad bellard
826 a41b2ff2 pbrook
/* rtl8139.c */
827 a41b2ff2 pbrook
828 a41b2ff2 pbrook
void pci_rtl8139_init(PCIBus *bus, NICInfo *nd);
829 a41b2ff2 pbrook
830 80cabfad bellard
/* pckbd.c */
831 80cabfad bellard
832 80cabfad bellard
void kbd_init(void);
833 80cabfad bellard
834 80cabfad bellard
/* mc146818rtc.c */
835 80cabfad bellard
836 8a7ddc38 bellard
typedef struct RTCState RTCState;
837 80cabfad bellard
838 8a7ddc38 bellard
RTCState *rtc_init(int base, int irq);
839 8a7ddc38 bellard
void rtc_set_memory(RTCState *s, int addr, int val);
840 8a7ddc38 bellard
void rtc_set_date(RTCState *s, const struct tm *tm);
841 80cabfad bellard
842 80cabfad bellard
/* serial.c */
843 80cabfad bellard
844 c4b1fcc0 bellard
typedef struct SerialState SerialState;
845 e5d13e2f bellard
SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
846 e5d13e2f bellard
                         int base, int irq, CharDriverState *chr);
847 e5d13e2f bellard
SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
848 e5d13e2f bellard
                             target_ulong base, int it_shift,
849 e5d13e2f bellard
                             int irq, CharDriverState *chr);
850 80cabfad bellard
851 6508fe59 bellard
/* parallel.c */
852 6508fe59 bellard
853 6508fe59 bellard
typedef struct ParallelState ParallelState;
854 6508fe59 bellard
ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
855 6508fe59 bellard
856 80cabfad bellard
/* i8259.c */
857 80cabfad bellard
858 3de388f6 bellard
typedef struct PicState2 PicState2;
859 3de388f6 bellard
extern PicState2 *isa_pic;
860 80cabfad bellard
void pic_set_irq(int irq, int level);
861 54fa5af5 bellard
void pic_set_irq_new(void *opaque, int irq, int level);
862 3de388f6 bellard
PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
863 d592d303 bellard
void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
864 d592d303 bellard
                          void *alt_irq_opaque);
865 3de388f6 bellard
int pic_read_irq(PicState2 *s);
866 3de388f6 bellard
void pic_update_irq(PicState2 *s);
867 3de388f6 bellard
uint32_t pic_intack_read(PicState2 *s);
868 c20709aa bellard
void pic_info(void);
869 4a0fb71e bellard
void irq_info(void);
870 80cabfad bellard
871 c27004ec bellard
/* APIC */
872 d592d303 bellard
typedef struct IOAPICState IOAPICState;
873 d592d303 bellard
874 c27004ec bellard
int apic_init(CPUState *env);
875 c27004ec bellard
int apic_get_interrupt(CPUState *env);
876 d592d303 bellard
IOAPICState *ioapic_init(void);
877 d592d303 bellard
void ioapic_set_irq(void *opaque, int vector, int level);
878 c27004ec bellard
879 80cabfad bellard
/* i8254.c */
880 80cabfad bellard
881 80cabfad bellard
#define PIT_FREQ 1193182
882 80cabfad bellard
883 ec844b96 bellard
typedef struct PITState PITState;
884 ec844b96 bellard
885 ec844b96 bellard
PITState *pit_init(int base, int irq);
886 ec844b96 bellard
void pit_set_gate(PITState *pit, int channel, int val);
887 ec844b96 bellard
int pit_get_gate(PITState *pit, int channel);
888 fd06c375 bellard
int pit_get_initial_count(PITState *pit, int channel);
889 fd06c375 bellard
int pit_get_mode(PITState *pit, int channel);
890 ec844b96 bellard
int pit_get_out(PITState *pit, int channel, int64_t current_time);
891 80cabfad bellard
892 fd06c375 bellard
/* pcspk.c */
893 fd06c375 bellard
void pcspk_init(PITState *);
894 fd06c375 bellard
int pcspk_audio_init(AudioState *);
895 fd06c375 bellard
896 6515b203 bellard
/* acpi.c */
897 6515b203 bellard
extern int acpi_enabled;
898 502a5395 pbrook
void piix4_pm_init(PCIBus *bus, int devfn);
899 6515b203 bellard
void acpi_bios_init(void);
900 6515b203 bellard
901 80cabfad bellard
/* pc.c */
902 54fa5af5 bellard
extern QEMUMachine pc_machine;
903 3dbbdc25 bellard
extern QEMUMachine isapc_machine;
904 52ca8d6a bellard
extern int fd_bootchk;
905 80cabfad bellard
906 6a00d601 bellard
void ioport_set_a20(int enable);
907 6a00d601 bellard
int ioport_get_a20(void);
908 6a00d601 bellard
909 26aa7d72 bellard
/* ppc.c */
910 54fa5af5 bellard
extern QEMUMachine prep_machine;
911 54fa5af5 bellard
extern QEMUMachine core99_machine;
912 54fa5af5 bellard
extern QEMUMachine heathrow_machine;
913 54fa5af5 bellard
914 6af0bf9c bellard
/* mips_r4k.c */
915 6af0bf9c bellard
extern QEMUMachine mips_machine;
916 6af0bf9c bellard
917 27c7ca7e bellard
/* shix.c */
918 27c7ca7e bellard
extern QEMUMachine shix_machine;
919 27c7ca7e bellard
920 8cc43fef bellard
#ifdef TARGET_PPC
921 8cc43fef bellard
ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
922 8cc43fef bellard
#endif
923 64201201 bellard
void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
924 77d4bc34 bellard
925 77d4bc34 bellard
extern CPUWriteMemoryFunc *PPC_io_write[];
926 77d4bc34 bellard
extern CPUReadMemoryFunc *PPC_io_read[];
927 54fa5af5 bellard
void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
928 26aa7d72 bellard
929 e95c8d51 bellard
/* sun4m.c */
930 54fa5af5 bellard
extern QEMUMachine sun4m_machine;
931 e80cfcfc bellard
uint32_t iommu_translate(uint32_t addr);
932 ba3c64fb bellard
void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
933 e95c8d51 bellard
934 e95c8d51 bellard
/* iommu.c */
935 e80cfcfc bellard
void *iommu_init(uint32_t addr);
936 e80cfcfc bellard
uint32_t iommu_translate_local(void *opaque, uint32_t addr);
937 e95c8d51 bellard
938 e95c8d51 bellard
/* lance.c */
939 7c9d8e07 bellard
void lance_init(NICInfo *nd, int irq, uint32_t leaddr, uint32_t ledaddr);
940 e95c8d51 bellard
941 e95c8d51 bellard
/* tcx.c */
942 95219897 pbrook
void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
943 6f7e9aec bellard
               unsigned long vram_offset, int vram_size, int width, int height);
944 e80cfcfc bellard
945 e80cfcfc bellard
/* slavio_intctl.c */
946 e80cfcfc bellard
void *slavio_intctl_init();
947 ba3c64fb bellard
void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
948 e80cfcfc bellard
void slavio_pic_info(void *opaque);
949 e80cfcfc bellard
void slavio_irq_info(void *opaque);
950 e80cfcfc bellard
void slavio_pic_set_irq(void *opaque, int irq, int level);
951 ba3c64fb bellard
void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
952 e95c8d51 bellard
953 5fe141fd bellard
/* loader.c */
954 5fe141fd bellard
int get_image_size(const char *filename);
955 5fe141fd bellard
int load_image(const char *filename, uint8_t *addr);
956 9ee3c029 bellard
int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
957 e80cfcfc bellard
int load_aout(const char *filename, uint8_t *addr);
958 e80cfcfc bellard
959 e80cfcfc bellard
/* slavio_timer.c */
960 ba3c64fb bellard
void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
961 8d5f07fa bellard
962 e80cfcfc bellard
/* slavio_serial.c */
963 e80cfcfc bellard
SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
964 e80cfcfc bellard
void slavio_serial_ms_kbd_init(int base, int irq);
965 e95c8d51 bellard
966 3475187d bellard
/* slavio_misc.c */
967 3475187d bellard
void *slavio_misc_init(uint32_t base, int irq);
968 3475187d bellard
void slavio_set_power_fail(void *opaque, int power_failing);
969 3475187d bellard
970 6f7e9aec bellard
/* esp.c */
971 6f7e9aec bellard
void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr);
972 6f7e9aec bellard
973 3475187d bellard
/* sun4u.c */
974 3475187d bellard
extern QEMUMachine sun4u_machine;
975 3475187d bellard
976 64201201 bellard
/* NVRAM helpers */
977 64201201 bellard
#include "hw/m48t59.h"
978 64201201 bellard
979 64201201 bellard
void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
980 64201201 bellard
uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
981 64201201 bellard
void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
982 64201201 bellard
uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
983 64201201 bellard
void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
984 64201201 bellard
uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
985 64201201 bellard
void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
986 64201201 bellard
                       const unsigned char *str, uint32_t max);
987 64201201 bellard
int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
988 64201201 bellard
void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
989 64201201 bellard
                    uint32_t start, uint32_t count);
990 64201201 bellard
int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
991 64201201 bellard
                          const unsigned char *arch,
992 64201201 bellard
                          uint32_t RAM_size, int boot_device,
993 64201201 bellard
                          uint32_t kernel_image, uint32_t kernel_size,
994 28b9b5af bellard
                          const char *cmdline,
995 64201201 bellard
                          uint32_t initrd_image, uint32_t initrd_size,
996 28b9b5af bellard
                          uint32_t NVRAM_image,
997 28b9b5af bellard
                          int width, int height, int depth);
998 64201201 bellard
999 63066f4f bellard
/* adb.c */
1000 63066f4f bellard
1001 63066f4f bellard
#define MAX_ADB_DEVICES 16
1002 63066f4f bellard
1003 e2733d20 bellard
#define ADB_MAX_OUT_LEN 16
1004 63066f4f bellard
1005 e2733d20 bellard
typedef struct ADBDevice ADBDevice;
1006 63066f4f bellard
1007 e2733d20 bellard
/* buf = NULL means polling */
1008 e2733d20 bellard
typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
1009 e2733d20 bellard
                              const uint8_t *buf, int len);
1010 12c28fed bellard
typedef int ADBDeviceReset(ADBDevice *d);
1011 12c28fed bellard
1012 63066f4f bellard
struct ADBDevice {
1013 63066f4f bellard
    struct ADBBusState *bus;
1014 63066f4f bellard
    int devaddr;
1015 63066f4f bellard
    int handler;
1016 e2733d20 bellard
    ADBDeviceRequest *devreq;
1017 12c28fed bellard
    ADBDeviceReset *devreset;
1018 63066f4f bellard
    void *opaque;
1019 63066f4f bellard
};
1020 63066f4f bellard
1021 63066f4f bellard
typedef struct ADBBusState {
1022 63066f4f bellard
    ADBDevice devices[MAX_ADB_DEVICES];
1023 63066f4f bellard
    int nb_devices;
1024 e2733d20 bellard
    int poll_index;
1025 63066f4f bellard
} ADBBusState;
1026 63066f4f bellard
1027 e2733d20 bellard
int adb_request(ADBBusState *s, uint8_t *buf_out,
1028 e2733d20 bellard
                const uint8_t *buf, int len);
1029 e2733d20 bellard
int adb_poll(ADBBusState *s, uint8_t *buf_out);
1030 63066f4f bellard
1031 63066f4f bellard
ADBDevice *adb_register_device(ADBBusState *s, int devaddr, 
1032 e2733d20 bellard
                               ADBDeviceRequest *devreq, 
1033 12c28fed bellard
                               ADBDeviceReset *devreset, 
1034 63066f4f bellard
                               void *opaque);
1035 63066f4f bellard
void adb_kbd_init(ADBBusState *bus);
1036 63066f4f bellard
void adb_mouse_init(ADBBusState *bus);
1037 63066f4f bellard
1038 63066f4f bellard
/* cuda.c */
1039 63066f4f bellard
1040 63066f4f bellard
extern ADBBusState adb_bus;
1041 54fa5af5 bellard
int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
1042 63066f4f bellard
1043 bb36d470 bellard
#include "hw/usb.h"
1044 bb36d470 bellard
1045 a594cfbf bellard
/* usb ports of the VM */
1046 a594cfbf bellard
1047 0d92ed30 pbrook
void qemu_register_usb_port(USBPort *port, void *opaque, int index,
1048 0d92ed30 pbrook
                            usb_attachfn attach);
1049 a594cfbf bellard
1050 0d92ed30 pbrook
#define VM_USB_HUB_SIZE 8
1051 a594cfbf bellard
1052 a594cfbf bellard
void do_usb_add(const char *devname);
1053 a594cfbf bellard
void do_usb_del(const char *devname);
1054 a594cfbf bellard
void usb_info(void);
1055 a594cfbf bellard
1056 2e5d83bb pbrook
/* scsi-disk.c */
1057 2e5d83bb pbrook
typedef struct SCSIDevice SCSIDevice;
1058 2e5d83bb pbrook
typedef void (*scsi_completionfn)(void *, uint32_t, int);
1059 2e5d83bb pbrook
1060 2e5d83bb pbrook
SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
1061 2e5d83bb pbrook
                           scsi_completionfn completion,
1062 2e5d83bb pbrook
                           void *opaque);
1063 2e5d83bb pbrook
void scsi_disk_destroy(SCSIDevice *s);
1064 2e5d83bb pbrook
1065 0fc5c15a pbrook
int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
1066 2e5d83bb pbrook
int scsi_read_data(SCSIDevice *s, uint8_t *data, uint32_t len);
1067 2e5d83bb pbrook
int scsi_write_data(SCSIDevice *s, uint8_t *data, uint32_t len);
1068 2e5d83bb pbrook
1069 7d8406be pbrook
/* lsi53c895a.c */
1070 7d8406be pbrook
void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1071 7d8406be pbrook
void *lsi_scsi_init(PCIBus *bus, int devfn);
1072 7d8406be pbrook
1073 b5ff1b31 bellard
/* integratorcp.c */
1074 40f137e1 pbrook
extern QEMUMachine integratorcp926_machine;
1075 40f137e1 pbrook
extern QEMUMachine integratorcp1026_machine;
1076 b5ff1b31 bellard
1077 cdbdb648 pbrook
/* versatilepb.c */
1078 cdbdb648 pbrook
extern QEMUMachine versatilepb_machine;
1079 16406950 pbrook
extern QEMUMachine versatileab_machine;
1080 cdbdb648 pbrook
1081 daa57963 bellard
/* ps2.c */
1082 daa57963 bellard
void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1083 daa57963 bellard
void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1084 daa57963 bellard
void ps2_write_mouse(void *, int val);
1085 daa57963 bellard
void ps2_write_keyboard(void *, int val);
1086 daa57963 bellard
uint32_t ps2_read_data(void *);
1087 daa57963 bellard
void ps2_queue(void *, int b);
1088 f94f5d71 pbrook
void ps2_keyboard_set_translation(void *opaque, int mode);
1089 daa57963 bellard
1090 80337b66 bellard
/* smc91c111.c */
1091 80337b66 bellard
void smc91c111_init(NICInfo *, uint32_t, void *, int);
1092 80337b66 bellard
1093 bdd5003a pbrook
/* pl110.c */
1094 95219897 pbrook
void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
1095 bdd5003a pbrook
1096 cdbdb648 pbrook
/* pl011.c */
1097 cdbdb648 pbrook
void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1098 cdbdb648 pbrook
1099 cdbdb648 pbrook
/* pl050.c */
1100 cdbdb648 pbrook
void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1101 cdbdb648 pbrook
1102 cdbdb648 pbrook
/* pl080.c */
1103 cdbdb648 pbrook
void *pl080_init(uint32_t base, void *pic, int irq);
1104 cdbdb648 pbrook
1105 cdbdb648 pbrook
/* pl190.c */
1106 cdbdb648 pbrook
void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1107 cdbdb648 pbrook
1108 cdbdb648 pbrook
/* arm-timer.c */
1109 cdbdb648 pbrook
void sp804_init(uint32_t base, void *pic, int irq);
1110 cdbdb648 pbrook
void icp_pit_init(uint32_t base, void *pic, int irq);
1111 cdbdb648 pbrook
1112 16406950 pbrook
/* arm_boot.c */
1113 16406950 pbrook
1114 16406950 pbrook
void arm_load_kernel(int ram_size, const char *kernel_filename,
1115 16406950 pbrook
                     const char *kernel_cmdline, const char *initrd_filename,
1116 16406950 pbrook
                     int board_id);
1117 16406950 pbrook
1118 27c7ca7e bellard
/* sh7750.c */
1119 27c7ca7e bellard
struct SH7750State;
1120 27c7ca7e bellard
1121 008a8818 pbrook
struct SH7750State *sh7750_init(CPUState * cpu);
1122 27c7ca7e bellard
1123 27c7ca7e bellard
typedef struct {
1124 27c7ca7e bellard
    /* The callback will be triggered if any of the designated lines change */
1125 27c7ca7e bellard
    uint16_t portamask_trigger;
1126 27c7ca7e bellard
    uint16_t portbmask_trigger;
1127 27c7ca7e bellard
    /* Return 0 if no action was taken */
1128 27c7ca7e bellard
    int (*port_change_cb) (uint16_t porta, uint16_t portb,
1129 27c7ca7e bellard
                           uint16_t * periph_pdtra,
1130 27c7ca7e bellard
                           uint16_t * periph_portdira,
1131 27c7ca7e bellard
                           uint16_t * periph_pdtrb,
1132 27c7ca7e bellard
                           uint16_t * periph_portdirb);
1133 27c7ca7e bellard
} sh7750_io_device;
1134 27c7ca7e bellard
1135 27c7ca7e bellard
int sh7750_register_io_device(struct SH7750State *s,
1136 27c7ca7e bellard
                              sh7750_io_device * device);
1137 27c7ca7e bellard
/* tc58128.c */
1138 27c7ca7e bellard
int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1139 27c7ca7e bellard
1140 29133e9a bellard
/* NOR flash devices */
1141 29133e9a bellard
typedef struct pflash_t pflash_t;
1142 29133e9a bellard
1143 29133e9a bellard
pflash_t *pflash_register (target_ulong base, ram_addr_t off,
1144 29133e9a bellard
                           BlockDriverState *bs,
1145 29133e9a bellard
                           target_ulong sector_len, int nb_blocs, int width,
1146 29133e9a bellard
                           uint16_t id0, uint16_t id1, 
1147 29133e9a bellard
                           uint16_t id2, uint16_t id3);
1148 29133e9a bellard
1149 ea2384d3 bellard
#endif /* defined(QEMU_TOOL) */
1150 ea2384d3 bellard
1151 c4b1fcc0 bellard
/* monitor.c */
1152 82c643ff bellard
void monitor_init(CharDriverState *hd, int show_banner);
1153 ea2384d3 bellard
void term_puts(const char *str);
1154 ea2384d3 bellard
void term_vprintf(const char *fmt, va_list ap);
1155 40c3bac3 bellard
void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
1156 c4b1fcc0 bellard
void term_flush(void);
1157 c4b1fcc0 bellard
void term_print_help(void);
1158 ea2384d3 bellard
void monitor_readline(const char *prompt, int is_password,
1159 ea2384d3 bellard
                      char *buf, int buf_size);
1160 ea2384d3 bellard
1161 ea2384d3 bellard
/* readline.c */
1162 ea2384d3 bellard
typedef void ReadLineFunc(void *opaque, const char *str);
1163 ea2384d3 bellard
1164 ea2384d3 bellard
extern int completion_index;
1165 ea2384d3 bellard
void add_completion(const char *str);
1166 ea2384d3 bellard
void readline_handle_byte(int ch);
1167 ea2384d3 bellard
void readline_find_completion(const char *cmdline);
1168 ea2384d3 bellard
const char *readline_get_history(unsigned int index);
1169 ea2384d3 bellard
void readline_start(const char *prompt, int is_password,
1170 ea2384d3 bellard
                    ReadLineFunc *readline_func, void *opaque);
1171 c4b1fcc0 bellard
1172 5e6ad6f9 bellard
void kqemu_record_dump(void);
1173 5e6ad6f9 bellard
1174 fc01f7e7 bellard
#endif /* VL_H */