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/*
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 *  SH4 emulation
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 *
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 *  Copyright (c) 2005 Samuel Tardieu
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#include <assert.h>
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#include "exec.h"
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#include "helper.h"
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#ifndef CONFIG_USER_ONLY
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#define MMUSUFFIX _mmu
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#define SHIFT 0
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#include "softmmu_template.h"
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#define SHIFT 1
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#include "softmmu_template.h"
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#define SHIFT 2
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#include "softmmu_template.h"
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#define SHIFT 3
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#include "softmmu_template.h"
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void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr)
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{
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    TranslationBlock *tb;
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    CPUState *saved_env;
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    unsigned long pc;
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    int ret;
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    /* XXX: hack to restore env in all cases, even if not called from
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       generated code */
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    saved_env = env;
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    env = cpu_single_env;
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    ret = cpu_sh4_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
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    if (ret) {
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        if (retaddr) {
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            /* now we have a real cpu fault */
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            pc = (unsigned long) retaddr;
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            tb = tb_find_pc(pc);
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            if (tb) {
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                /* the PC is inside the translated code. It means that we have
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                   a virtual CPU fault */
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                cpu_restore_state(tb, env, pc, NULL);
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            }
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        }
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        cpu_loop_exit();
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    }
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    env = saved_env;
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}
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#endif
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void helper_ldtlb(void)
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{
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#ifdef CONFIG_USER_ONLY
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    /* XXXXX */
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    assert(0);
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#else
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    cpu_load_tlb(env);
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#endif
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}
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void helper_raise_illegal_instruction(void)
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{
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    env->exception_index = 0x180;
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    cpu_loop_exit();
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}
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void helper_raise_slot_illegal_instruction(void)
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{
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    env->exception_index = 0x1a0;
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    cpu_loop_exit();
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}
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void helper_raise_fpu_disable(void)
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{
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  env->exception_index = 0x800;
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  cpu_loop_exit();
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}
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void helper_raise_slot_fpu_disable(void)
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{
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  env->exception_index = 0x820;
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  cpu_loop_exit();
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}
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void helper_debug(void)
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{
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    env->exception_index = EXCP_DEBUG;
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    cpu_loop_exit();
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}
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void helper_sleep(uint32_t next_pc)
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{
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    env->halted = 1;
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    env->exception_index = EXCP_HLT;
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    env->pc = next_pc;
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    cpu_loop_exit();
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}
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void helper_trapa(uint32_t tra)
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{
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    env->tra = tra << 2;
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    env->exception_index = 0x160;
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    cpu_loop_exit();
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}
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uint32_t helper_addc(uint32_t arg0, uint32_t arg1)
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{
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    uint32_t tmp0, tmp1;
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    tmp1 = arg0 + arg1;
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    tmp0 = arg1;
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    arg1 = tmp1 + (env->sr & 1);
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    if (tmp0 > tmp1)
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        env->sr |= SR_T;
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    else
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        env->sr &= ~SR_T;
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    if (tmp1 > arg1)
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        env->sr |= SR_T;
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    return arg1;
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}
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uint32_t helper_addv(uint32_t arg0, uint32_t arg1)
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{
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    uint32_t dest, src, ans;
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    if ((int32_t) arg1 >= 0)
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        dest = 0;
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    else
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        dest = 1;
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    if ((int32_t) arg0 >= 0)
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        src = 0;
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    else
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        src = 1;
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    src += dest;
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    arg1 += arg0;
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    if ((int32_t) arg1 >= 0)
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        ans = 0;
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    else
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        ans = 1;
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    ans += dest;
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    if (src == 0 || src == 2) {
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        if (ans == 1)
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            env->sr |= SR_T;
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        else
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            env->sr &= ~SR_T;
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    } else
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        env->sr &= ~SR_T;
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    return arg1;
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}
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#define T (env->sr & SR_T)
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#define Q (env->sr & SR_Q ? 1 : 0)
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#define M (env->sr & SR_M ? 1 : 0)
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#define SETT env->sr |= SR_T
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#define CLRT env->sr &= ~SR_T
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#define SETQ env->sr |= SR_Q
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#define CLRQ env->sr &= ~SR_Q
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#define SETM env->sr |= SR_M
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#define CLRM env->sr &= ~SR_M
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uint32_t helper_div1(uint32_t arg0, uint32_t arg1)
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{
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    uint32_t tmp0, tmp2;
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    uint8_t old_q, tmp1 = 0xff;
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    //printf("div1 arg0=0x%08x arg1=0x%08x M=%d Q=%d T=%d\n", arg0, arg1, M, Q, T);
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    old_q = Q;
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    if ((0x80000000 & arg1) != 0)
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        SETQ;
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    else
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        CLRQ;
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    tmp2 = arg0;
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    arg1 <<= 1;
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    arg1 |= T;
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    switch (old_q) {
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    case 0:
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        switch (M) {
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        case 0:
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            tmp0 = arg1;
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            arg1 -= tmp2;
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            tmp1 = arg1 > tmp0;
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            switch (Q) {
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            case 0:
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                if (tmp1)
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                    SETQ;
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                else
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                    CLRQ;
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                break;
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            case 1:
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                if (tmp1 == 0)
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                    SETQ;
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                else
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                    CLRQ;
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                break;
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            }
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            break;
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        case 1:
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            tmp0 = arg1;
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            arg1 += tmp2;
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            tmp1 = arg1 < tmp0;
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            switch (Q) {
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            case 0:
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                if (tmp1 == 0)
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                    SETQ;
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                else
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                    CLRQ;
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                break;
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            case 1:
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                if (tmp1)
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                    SETQ;
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                else
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                    CLRQ;
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                break;
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            }
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            break;
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        }
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        break;
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    case 1:
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        switch (M) {
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        case 0:
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            tmp0 = arg1;
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            arg1 += tmp2;
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            tmp1 = arg1 < tmp0;
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            switch (Q) {
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            case 0:
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                if (tmp1)
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                    SETQ;
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                else
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                    CLRQ;
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                break;
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            case 1:
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                if (tmp1 == 0)
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                    SETQ;
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                else
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                    CLRQ;
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                break;
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            }
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            break;
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        case 1:
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            tmp0 = arg1;
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            arg1 -= tmp2;
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            tmp1 = arg1 > tmp0;
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            switch (Q) {
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            case 0:
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                if (tmp1 == 0)
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                    SETQ;
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                else
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                    CLRQ;
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                break;
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            case 1:
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                if (tmp1)
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                    SETQ;
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                else
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                    CLRQ;
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                break;
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            }
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            break;
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        }
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        break;
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    }
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    if (Q == M)
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        SETT;
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    else
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        CLRT;
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    //printf("Output: arg1=0x%08x M=%d Q=%d T=%d\n", arg1, M, Q, T);
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    return arg1;
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}
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void helper_macl(uint32_t arg0, uint32_t arg1)
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{
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    int64_t res;
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    res = ((uint64_t) env->mach << 32) | env->macl;
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    res += (int64_t) (int32_t) arg0 *(int64_t) (int32_t) arg1;
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    env->mach = (res >> 32) & 0xffffffff;
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    env->macl = res & 0xffffffff;
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    if (env->sr & SR_S) {
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        if (res < 0)
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            env->mach |= 0xffff0000;
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        else
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            env->mach &= 0x00007fff;
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    }
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}
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void helper_macw(uint32_t arg0, uint32_t arg1)
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{
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    int64_t res;
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    res = ((uint64_t) env->mach << 32) | env->macl;
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    res += (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1;
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    env->mach = (res >> 32) & 0xffffffff;
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    env->macl = res & 0xffffffff;
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    if (env->sr & SR_S) {
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        if (res < -0x80000000) {
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            env->mach = 1;
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            env->macl = 0x80000000;
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        } else if (res > 0x000000007fffffff) {
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            env->mach = 1;
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            env->macl = 0x7fffffff;
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        }
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    }
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}
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uint32_t helper_negc(uint32_t arg)
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{
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    uint32_t temp;
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    temp = -arg;
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    arg = temp - (env->sr & SR_T);
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    if (0 < temp)
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        env->sr |= SR_T;
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    else
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        env->sr &= ~SR_T;
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    if (temp < arg)
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        env->sr |= SR_T;
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    return arg;
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}
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uint32_t helper_subc(uint32_t arg0, uint32_t arg1)
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{
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    uint32_t tmp0, tmp1;
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    tmp1 = arg1 - arg0;
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    tmp0 = arg1;
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    arg1 = tmp1 - (env->sr & SR_T);
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    if (tmp0 < tmp1)
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        env->sr |= SR_T;
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    else
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        env->sr &= ~SR_T;
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    if (tmp1 < arg1)
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        env->sr |= SR_T;
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    return arg1;
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}
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uint32_t helper_subv(uint32_t arg0, uint32_t arg1)
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{
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    int32_t dest, src, ans;
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    if ((int32_t) arg1 >= 0)
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        dest = 0;
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    else
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        dest = 1;
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    if ((int32_t) arg0 >= 0)
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        src = 0;
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    else
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        src = 1;
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    src += dest;
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    arg1 -= arg0;
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    if ((int32_t) arg1 >= 0)
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        ans = 0;
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    else
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        ans = 1;
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    ans += dest;
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    if (src == 1) {
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        if (ans == 1)
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            env->sr |= SR_T;
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        else
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            env->sr &= ~SR_T;
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    } else
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        env->sr &= ~SR_T;
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    return arg1;
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}
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static inline void set_t(void)
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{
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    env->sr |= SR_T;
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}
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static inline void clr_t(void)
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{
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    env->sr &= ~SR_T;
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}
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void helper_ld_fpscr(uint32_t val)
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{
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    env->fpscr = val & 0x003fffff;
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    if (val & 0x01)
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        set_float_rounding_mode(float_round_to_zero, &env->fp_status);
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    else
399 390af821 aurel32
        set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
400 390af821 aurel32
}
401 cc4ba6a9 aurel32
402 cc4ba6a9 aurel32
uint32_t helper_fabs_FT(uint32_t t0)
403 cc4ba6a9 aurel32
{
404 9850d1e8 aurel32
    CPU_FloatU f;
405 9850d1e8 aurel32
    f.l = t0;
406 9850d1e8 aurel32
    f.f = float32_abs(f.f);
407 9850d1e8 aurel32
    return f.l;
408 cc4ba6a9 aurel32
}
409 cc4ba6a9 aurel32
410 cc4ba6a9 aurel32
uint64_t helper_fabs_DT(uint64_t t0)
411 cc4ba6a9 aurel32
{
412 9850d1e8 aurel32
    CPU_DoubleU d;
413 9850d1e8 aurel32
    d.ll = t0;
414 9850d1e8 aurel32
    d.d = float64_abs(d.d);
415 9850d1e8 aurel32
    return d.ll;
416 cc4ba6a9 aurel32
}
417 cc4ba6a9 aurel32
418 cc4ba6a9 aurel32
uint32_t helper_fadd_FT(uint32_t t0, uint32_t t1)
419 cc4ba6a9 aurel32
{
420 9850d1e8 aurel32
    CPU_FloatU f0, f1;
421 9850d1e8 aurel32
    f0.l = t0;
422 9850d1e8 aurel32
    f1.l = t1;
423 9850d1e8 aurel32
    f0.f = float32_add(f0.f, f1.f, &env->fp_status);
424 9850d1e8 aurel32
    return f0.l;
425 cc4ba6a9 aurel32
}
426 cc4ba6a9 aurel32
427 cc4ba6a9 aurel32
uint64_t helper_fadd_DT(uint64_t t0, uint64_t t1)
428 cc4ba6a9 aurel32
{
429 9850d1e8 aurel32
    CPU_DoubleU d0, d1;
430 9850d1e8 aurel32
    d0.ll = t0;
431 9850d1e8 aurel32
    d1.ll = t1;
432 9850d1e8 aurel32
    d0.d = float64_add(d0.d, d1.d, &env->fp_status);
433 9850d1e8 aurel32
    return d0.ll;
434 cc4ba6a9 aurel32
}
435 cc4ba6a9 aurel32
436 cc4ba6a9 aurel32
void helper_fcmp_eq_FT(uint32_t t0, uint32_t t1)
437 cc4ba6a9 aurel32
{
438 9850d1e8 aurel32
    CPU_FloatU f0, f1;
439 9850d1e8 aurel32
    f0.l = t0;
440 9850d1e8 aurel32
    f1.l = t1;
441 9850d1e8 aurel32
442 9850d1e8 aurel32
    if (float32_compare(f0.f, f1.f, &env->fp_status) == 0)
443 cc4ba6a9 aurel32
        set_t();
444 cc4ba6a9 aurel32
    else
445 cc4ba6a9 aurel32
        clr_t();
446 cc4ba6a9 aurel32
}
447 cc4ba6a9 aurel32
448 cc4ba6a9 aurel32
void helper_fcmp_eq_DT(uint64_t t0, uint64_t t1)
449 cc4ba6a9 aurel32
{
450 9850d1e8 aurel32
    CPU_DoubleU d0, d1;
451 9850d1e8 aurel32
    d0.ll = t0;
452 9850d1e8 aurel32
    d1.ll = t1;
453 9850d1e8 aurel32
454 9850d1e8 aurel32
    if (float64_compare(d0.d, d1.d, &env->fp_status) == 0)
455 cc4ba6a9 aurel32
        set_t();
456 cc4ba6a9 aurel32
    else
457 cc4ba6a9 aurel32
        clr_t();
458 cc4ba6a9 aurel32
}
459 cc4ba6a9 aurel32
460 cc4ba6a9 aurel32
void helper_fcmp_gt_FT(uint32_t t0, uint32_t t1)
461 cc4ba6a9 aurel32
{
462 9850d1e8 aurel32
    CPU_FloatU f0, f1;
463 9850d1e8 aurel32
    f0.l = t0;
464 9850d1e8 aurel32
    f1.l = t1;
465 9850d1e8 aurel32
466 9850d1e8 aurel32
    if (float32_compare(f0.f, f1.f, &env->fp_status) == 1)
467 cc4ba6a9 aurel32
        set_t();
468 cc4ba6a9 aurel32
    else
469 cc4ba6a9 aurel32
        clr_t();
470 cc4ba6a9 aurel32
}
471 cc4ba6a9 aurel32
472 cc4ba6a9 aurel32
void helper_fcmp_gt_DT(uint64_t t0, uint64_t t1)
473 cc4ba6a9 aurel32
{
474 9850d1e8 aurel32
    CPU_DoubleU d0, d1;
475 9850d1e8 aurel32
    d0.ll = t0;
476 9850d1e8 aurel32
    d1.ll = t1;
477 9850d1e8 aurel32
478 9850d1e8 aurel32
    if (float64_compare(d0.d, d1.d, &env->fp_status) == 1)
479 cc4ba6a9 aurel32
        set_t();
480 cc4ba6a9 aurel32
    else
481 cc4ba6a9 aurel32
        clr_t();
482 cc4ba6a9 aurel32
}
483 cc4ba6a9 aurel32
484 cc4ba6a9 aurel32
uint64_t helper_fcnvsd_FT_DT(uint32_t t0)
485 cc4ba6a9 aurel32
{
486 9850d1e8 aurel32
    CPU_DoubleU d;
487 9850d1e8 aurel32
    CPU_FloatU f;
488 9850d1e8 aurel32
    f.l = t0;
489 9850d1e8 aurel32
    d.d = float32_to_float64(f.f, &env->fp_status);
490 9850d1e8 aurel32
    return d.ll;
491 cc4ba6a9 aurel32
}
492 cc4ba6a9 aurel32
493 cc4ba6a9 aurel32
uint32_t helper_fcnvds_DT_FT(uint64_t t0)
494 cc4ba6a9 aurel32
{
495 9850d1e8 aurel32
    CPU_DoubleU d;
496 9850d1e8 aurel32
    CPU_FloatU f;
497 9850d1e8 aurel32
    d.ll = t0;
498 9850d1e8 aurel32
    f.f = float64_to_float32(d.d, &env->fp_status);
499 9850d1e8 aurel32
    return f.l;
500 cc4ba6a9 aurel32
}
501 cc4ba6a9 aurel32
502 cc4ba6a9 aurel32
uint32_t helper_fdiv_FT(uint32_t t0, uint32_t t1)
503 cc4ba6a9 aurel32
{
504 9850d1e8 aurel32
    CPU_FloatU f0, f1;
505 9850d1e8 aurel32
    f0.l = t0;
506 9850d1e8 aurel32
    f1.l = t1;
507 9850d1e8 aurel32
    f0.f = float32_div(f0.f, f1.f, &env->fp_status);
508 9850d1e8 aurel32
    return f0.l;
509 cc4ba6a9 aurel32
}
510 cc4ba6a9 aurel32
511 cc4ba6a9 aurel32
uint64_t helper_fdiv_DT(uint64_t t0, uint64_t t1)
512 cc4ba6a9 aurel32
{
513 9850d1e8 aurel32
    CPU_DoubleU d0, d1;
514 9850d1e8 aurel32
    d0.ll = t0;
515 9850d1e8 aurel32
    d1.ll = t1;
516 9850d1e8 aurel32
    d0.d = float64_div(d0.d, d1.d, &env->fp_status);
517 9850d1e8 aurel32
    return d0.ll;
518 cc4ba6a9 aurel32
}
519 cc4ba6a9 aurel32
520 cc4ba6a9 aurel32
uint32_t helper_float_FT(uint32_t t0)
521 cc4ba6a9 aurel32
{
522 9850d1e8 aurel32
    CPU_FloatU f;
523 9850d1e8 aurel32
    f.f = int32_to_float32(t0, &env->fp_status);
524 9850d1e8 aurel32
    return f.l;
525 cc4ba6a9 aurel32
}
526 cc4ba6a9 aurel32
527 cc4ba6a9 aurel32
uint64_t helper_float_DT(uint32_t t0)
528 cc4ba6a9 aurel32
{
529 9850d1e8 aurel32
    CPU_DoubleU d;
530 9850d1e8 aurel32
    d.d = int32_to_float64(t0, &env->fp_status);
531 9850d1e8 aurel32
    return d.ll;
532 cc4ba6a9 aurel32
}
533 cc4ba6a9 aurel32
534 cc4ba6a9 aurel32
uint32_t helper_fmul_FT(uint32_t t0, uint32_t t1)
535 cc4ba6a9 aurel32
{
536 9850d1e8 aurel32
    CPU_FloatU f0, f1;
537 9850d1e8 aurel32
    f0.l = t0;
538 9850d1e8 aurel32
    f1.l = t1;
539 9850d1e8 aurel32
    f0.f = float32_mul(f0.f, f1.f, &env->fp_status);
540 9850d1e8 aurel32
    return f0.l;
541 cc4ba6a9 aurel32
}
542 cc4ba6a9 aurel32
543 cc4ba6a9 aurel32
uint64_t helper_fmul_DT(uint64_t t0, uint64_t t1)
544 cc4ba6a9 aurel32
{
545 9850d1e8 aurel32
    CPU_DoubleU d0, d1;
546 9850d1e8 aurel32
    d0.ll = t0;
547 9850d1e8 aurel32
    d1.ll = t1;
548 9850d1e8 aurel32
    d0.d = float64_mul(d0.d, d1.d, &env->fp_status);
549 9850d1e8 aurel32
    return d0.ll;
550 cc4ba6a9 aurel32
}
551 cc4ba6a9 aurel32
552 7fdf924f aurel32
uint32_t helper_fneg_T(uint32_t t0)
553 7fdf924f aurel32
{
554 9850d1e8 aurel32
    CPU_FloatU f;
555 9850d1e8 aurel32
    f.l = t0;
556 9850d1e8 aurel32
    f.f = float32_chs(f.f);
557 9850d1e8 aurel32
    return f.l;
558 7fdf924f aurel32
}
559 7fdf924f aurel32
560 cc4ba6a9 aurel32
uint32_t helper_fsqrt_FT(uint32_t t0)
561 cc4ba6a9 aurel32
{
562 9850d1e8 aurel32
    CPU_FloatU f;
563 9850d1e8 aurel32
    f.l = t0;
564 9850d1e8 aurel32
    f.f = float32_sqrt(f.f, &env->fp_status);
565 9850d1e8 aurel32
    return f.l;
566 cc4ba6a9 aurel32
}
567 cc4ba6a9 aurel32
568 cc4ba6a9 aurel32
uint64_t helper_fsqrt_DT(uint64_t t0)
569 cc4ba6a9 aurel32
{
570 9850d1e8 aurel32
    CPU_DoubleU d;
571 9850d1e8 aurel32
    d.ll = t0;
572 9850d1e8 aurel32
    d.d = float64_sqrt(d.d, &env->fp_status);
573 9850d1e8 aurel32
    return d.ll;
574 cc4ba6a9 aurel32
}
575 cc4ba6a9 aurel32
576 cc4ba6a9 aurel32
uint32_t helper_fsub_FT(uint32_t t0, uint32_t t1)
577 cc4ba6a9 aurel32
{
578 9850d1e8 aurel32
    CPU_FloatU f0, f1;
579 9850d1e8 aurel32
    f0.l = t0;
580 9850d1e8 aurel32
    f1.l = t1;
581 9850d1e8 aurel32
    f0.f = float32_sub(f0.f, f1.f, &env->fp_status);
582 9850d1e8 aurel32
    return f0.l;
583 cc4ba6a9 aurel32
}
584 cc4ba6a9 aurel32
585 cc4ba6a9 aurel32
uint64_t helper_fsub_DT(uint64_t t0, uint64_t t1)
586 cc4ba6a9 aurel32
{
587 9850d1e8 aurel32
    CPU_DoubleU d0, d1;
588 9850d1e8 aurel32
    d0.ll = t0;
589 9850d1e8 aurel32
    d1.ll = t1;
590 9850d1e8 aurel32
    d0.d = float64_sub(d0.d, d1.d, &env->fp_status);
591 9850d1e8 aurel32
    return d0.ll;
592 cc4ba6a9 aurel32
}
593 cc4ba6a9 aurel32
594 cc4ba6a9 aurel32
uint32_t helper_ftrc_FT(uint32_t t0)
595 cc4ba6a9 aurel32
{
596 9850d1e8 aurel32
    CPU_FloatU f;
597 9850d1e8 aurel32
    f.l = t0;
598 9850d1e8 aurel32
    return float32_to_int32_round_to_zero(f.f, &env->fp_status);
599 cc4ba6a9 aurel32
}
600 cc4ba6a9 aurel32
601 cc4ba6a9 aurel32
uint32_t helper_ftrc_DT(uint64_t t0)
602 cc4ba6a9 aurel32
{
603 9850d1e8 aurel32
    CPU_DoubleU d;
604 9850d1e8 aurel32
    d.ll = t0;
605 9850d1e8 aurel32
    return float64_to_int32_round_to_zero(d.d, &env->fp_status);
606 cc4ba6a9 aurel32
}