root / hw / parallel.c @ d861b05e
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/*
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* QEMU Parallel PORT emulation
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "vl.h" |
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//#define DEBUG_PARALLEL
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/*
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* These are the definitions for the Printer Status Register
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*/
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#define PARA_STS_BUSY 0x80 /* Busy complement */ |
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#define PARA_STS_ACK 0x40 /* Acknowledge */ |
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#define PARA_STS_PAPER 0x20 /* Out of paper */ |
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#define PARA_STS_ONLINE 0x10 /* Online */ |
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#define PARA_STS_ERROR 0x08 /* Error complement */ |
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/*
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* These are the definitions for the Printer Control Register
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*/
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#define PARA_CTR_INTEN 0x10 /* IRQ Enable */ |
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#define PARA_CTR_SELECT 0x08 /* Select In complement */ |
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#define PARA_CTR_INIT 0x04 /* Initialize Printer complement */ |
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#define PARA_CTR_AUTOLF 0x02 /* Auto linefeed complement */ |
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#define PARA_CTR_STROBE 0x01 /* Strobe complement */ |
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struct ParallelState {
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uint8_t data; |
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uint8_t status; /* read only register */
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uint8_t control; |
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int irq;
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int irq_pending;
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CharDriverState *chr; |
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int hw_driver;
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}; |
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static void parallel_update_irq(ParallelState *s) |
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{ |
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if (s->irq_pending)
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pic_set_irq(s->irq, 1);
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else
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pic_set_irq(s->irq, 0);
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} |
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static void parallel_ioport_write(void *opaque, uint32_t addr, uint32_t val) |
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{ |
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ParallelState *s = opaque; |
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addr &= 7;
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#ifdef DEBUG_PARALLEL
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printf("parallel: write addr=0x%02x val=0x%02x\n", addr, val);
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#endif
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switch(addr) {
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case 0: |
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if (s->hw_driver) {
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s->data = val; |
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qemu_chr_ioctl(s->chr, CHR_IOCTL_PP_WRITE_DATA, &s->data); |
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} else {
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s->data = val; |
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parallel_update_irq(s); |
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} |
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break;
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case 2: |
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if (s->hw_driver) {
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s->control = val; |
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qemu_chr_ioctl(s->chr, CHR_IOCTL_PP_WRITE_CONTROL, &s->control); |
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} else {
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if ((val & PARA_CTR_INIT) == 0 ) { |
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s->status = PARA_STS_BUSY; |
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s->status |= PARA_STS_ACK; |
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s->status |= PARA_STS_ONLINE; |
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s->status |= PARA_STS_ERROR; |
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} |
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else if (val & PARA_CTR_SELECT) { |
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if (val & PARA_CTR_STROBE) {
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s->status &= ~PARA_STS_BUSY; |
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if ((s->control & PARA_CTR_STROBE) == 0) |
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qemu_chr_write(s->chr, &s->data, 1);
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} else {
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if (s->control & PARA_CTR_INTEN) {
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s->irq_pending = 1;
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} |
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} |
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} |
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parallel_update_irq(s); |
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s->control = val; |
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} |
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break;
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} |
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} |
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static uint32_t parallel_ioport_read(void *opaque, uint32_t addr) |
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{ |
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ParallelState *s = opaque; |
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uint32_t ret = 0xff;
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addr &= 7;
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switch(addr) {
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case 0: |
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if (s->hw_driver) {
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qemu_chr_ioctl(s->chr, CHR_IOCTL_PP_READ_DATA, &s->data); |
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} |
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ret = s->data; |
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break;
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case 1: |
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if (s->hw_driver) {
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qemu_chr_ioctl(s->chr, CHR_IOCTL_PP_READ_STATUS, &s->status); |
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ret = s->status; |
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} else {
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ret = s->status; |
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s->irq_pending = 0;
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if ((s->status & PARA_STS_BUSY) == 0 && (s->control & PARA_CTR_STROBE) == 0) { |
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/* XXX Fixme: wait 5 microseconds */
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if (s->status & PARA_STS_ACK)
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s->status &= ~PARA_STS_ACK; |
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else {
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/* XXX Fixme: wait 5 microseconds */
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s->status |= PARA_STS_ACK; |
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s->status |= PARA_STS_BUSY; |
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} |
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} |
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parallel_update_irq(s); |
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} |
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break;
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case 2: |
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if (s->hw_driver) {
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qemu_chr_ioctl(s->chr, CHR_IOCTL_PP_READ_CONTROL, &s->control); |
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} |
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ret = s->control; |
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break;
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} |
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#ifdef DEBUG_PARALLEL
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printf("parallel: read addr=0x%02x val=0x%02x\n", addr, ret);
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#endif
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return ret;
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} |
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/* If fd is zero, it means that the parallel device uses the console */
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ParallelState *parallel_init(int base, int irq, CharDriverState *chr) |
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{ |
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ParallelState *s; |
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uint8_t dummy; |
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s = qemu_mallocz(sizeof(ParallelState));
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if (!s)
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return NULL; |
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s->chr = chr; |
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s->hw_driver = 0;
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if (qemu_chr_ioctl(chr, CHR_IOCTL_PP_READ_STATUS, &dummy) == 0) |
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s->hw_driver = 1;
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s->irq = irq; |
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s->data = 0;
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s->status = PARA_STS_BUSY; |
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s->status |= PARA_STS_ACK; |
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s->status |= PARA_STS_ONLINE; |
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s->status |= PARA_STS_ERROR; |
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s->control = PARA_CTR_SELECT; |
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s->control |= PARA_CTR_INIT; |
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register_ioport_write(base, 8, 1, parallel_ioport_write, s); |
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register_ioport_read(base, 8, 1, parallel_ioport_read, s); |
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return s;
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} |