root / tests / qruncom.c @ d8bcbabf
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1 | 039d3da3 | bellard | /*
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2 | 039d3da3 | bellard | * Example of use of user mode libqemu: launch a basic .com DOS
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3 | 039d3da3 | bellard | * executable
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4 | 039d3da3 | bellard | */
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5 | 039d3da3 | bellard | #include <stdlib.h> |
6 | 039d3da3 | bellard | #include <stdio.h> |
7 | 039d3da3 | bellard | #include <string.h> |
8 | 039d3da3 | bellard | #include <inttypes.h> |
9 | 039d3da3 | bellard | #include <unistd.h> |
10 | 039d3da3 | bellard | #include <fcntl.h> |
11 | 039d3da3 | bellard | #include <sys/mman.h> |
12 | 039d3da3 | bellard | #include <signal.h> |
13 | 2d7a3b9d | bellard | #include <malloc.h> |
14 | 039d3da3 | bellard | |
15 | 039d3da3 | bellard | #include "cpu.h" |
16 | 039d3da3 | bellard | |
17 | 039d3da3 | bellard | //#define SIGTEST
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18 | 039d3da3 | bellard | |
19 | 039d3da3 | bellard | int cpu_get_pic_interrupt(CPUState *env)
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20 | 039d3da3 | bellard | { |
21 | 039d3da3 | bellard | return -1; |
22 | 039d3da3 | bellard | } |
23 | 039d3da3 | bellard | |
24 | 28ab0e2e | bellard | uint64_t cpu_get_tsc(CPUState *env) |
25 | 28ab0e2e | bellard | { |
26 | 28ab0e2e | bellard | return 0; |
27 | 28ab0e2e | bellard | } |
28 | 28ab0e2e | bellard | |
29 | 5fafdf24 | ths | static void set_gate(void *ptr, unsigned int type, unsigned int dpl, |
30 | 039d3da3 | bellard | unsigned long addr, unsigned int sel) |
31 | 039d3da3 | bellard | { |
32 | 039d3da3 | bellard | unsigned int e1, e2; |
33 | 039d3da3 | bellard | e1 = (addr & 0xffff) | (sel << 16); |
34 | 039d3da3 | bellard | e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8); |
35 | 039d3da3 | bellard | stl((uint8_t *)ptr, e1); |
36 | 039d3da3 | bellard | stl((uint8_t *)ptr + 4, e2);
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37 | 039d3da3 | bellard | } |
38 | 039d3da3 | bellard | |
39 | 039d3da3 | bellard | uint64_t idt_table[256];
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40 | 039d3da3 | bellard | |
41 | 039d3da3 | bellard | /* only dpl matters as we do only user space emulation */
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42 | 039d3da3 | bellard | static void set_idt(int n, unsigned int dpl) |
43 | 039d3da3 | bellard | { |
44 | 039d3da3 | bellard | set_gate(idt_table + n, 0, dpl, 0, 0); |
45 | 039d3da3 | bellard | } |
46 | 039d3da3 | bellard | |
47 | 039d3da3 | bellard | void qemu_free(void *ptr) |
48 | 039d3da3 | bellard | { |
49 | 039d3da3 | bellard | free(ptr); |
50 | 039d3da3 | bellard | } |
51 | 039d3da3 | bellard | |
52 | 039d3da3 | bellard | void *qemu_malloc(size_t size)
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53 | 039d3da3 | bellard | { |
54 | 039d3da3 | bellard | return malloc(size);
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55 | 039d3da3 | bellard | } |
56 | 039d3da3 | bellard | |
57 | 2d7a3b9d | bellard | void *qemu_mallocz(size_t size)
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58 | 2d7a3b9d | bellard | { |
59 | 2d7a3b9d | bellard | void *ptr;
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60 | 2d7a3b9d | bellard | ptr = qemu_malloc(size); |
61 | 2d7a3b9d | bellard | if (!ptr)
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62 | 2d7a3b9d | bellard | return NULL; |
63 | 2d7a3b9d | bellard | memset(ptr, 0, size);
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64 | 2d7a3b9d | bellard | return ptr;
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65 | 2d7a3b9d | bellard | } |
66 | 2d7a3b9d | bellard | |
67 | 2d7a3b9d | bellard | void *qemu_vmalloc(size_t size)
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68 | 2d7a3b9d | bellard | { |
69 | 2d7a3b9d | bellard | return memalign(4096, size); |
70 | 2d7a3b9d | bellard | } |
71 | 2d7a3b9d | bellard | |
72 | 2d7a3b9d | bellard | void qemu_vfree(void *ptr) |
73 | 2d7a3b9d | bellard | { |
74 | 2d7a3b9d | bellard | free(ptr); |
75 | 2d7a3b9d | bellard | } |
76 | 2d7a3b9d | bellard | |
77 | 039d3da3 | bellard | void qemu_printf(const char *fmt, ...) |
78 | 039d3da3 | bellard | { |
79 | 039d3da3 | bellard | va_list ap; |
80 | 039d3da3 | bellard | va_start(ap, fmt); |
81 | 039d3da3 | bellard | vprintf(fmt, ap); |
82 | 039d3da3 | bellard | va_end(ap); |
83 | 039d3da3 | bellard | } |
84 | 039d3da3 | bellard | |
85 | 039d3da3 | bellard | /* XXX: this is a bug in helper2.c */
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86 | 039d3da3 | bellard | int errno;
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87 | 039d3da3 | bellard | |
88 | 039d3da3 | bellard | /**********************************************/
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89 | 039d3da3 | bellard | |
90 | 039d3da3 | bellard | #define COM_BASE_ADDR 0x10100 |
91 | 039d3da3 | bellard | |
92 | 039d3da3 | bellard | void usage(void) |
93 | 039d3da3 | bellard | { |
94 | 039d3da3 | bellard | printf("qruncom version 0.1 (c) 2003 Fabrice Bellard\n"
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95 | 039d3da3 | bellard | "usage: qruncom file.com\n"
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96 | 039d3da3 | bellard | "user mode libqemu demo: run simple .com DOS executables\n");
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97 | 039d3da3 | bellard | exit(1);
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98 | 039d3da3 | bellard | } |
99 | 039d3da3 | bellard | |
100 | 039d3da3 | bellard | static inline uint8_t *seg_to_linear(unsigned int seg, unsigned int reg) |
101 | 039d3da3 | bellard | { |
102 | 039d3da3 | bellard | return (uint8_t *)((seg << 4) + (reg & 0xffff)); |
103 | 039d3da3 | bellard | } |
104 | 039d3da3 | bellard | |
105 | 039d3da3 | bellard | static inline void pushw(CPUState *env, int val) |
106 | 039d3da3 | bellard | { |
107 | 039d3da3 | bellard | env->regs[R_ESP] = (env->regs[R_ESP] & ~0xffff) | ((env->regs[R_ESP] - 2) & 0xffff); |
108 | 039d3da3 | bellard | *(uint16_t *)seg_to_linear(env->segs[R_SS].selector, env->regs[R_ESP]) = val; |
109 | 039d3da3 | bellard | } |
110 | 039d3da3 | bellard | |
111 | 5fafdf24 | ths | static void host_segv_handler(int host_signum, siginfo_t *info, |
112 | 039d3da3 | bellard | void *puc)
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113 | 039d3da3 | bellard | { |
114 | 039d3da3 | bellard | if (cpu_signal_handler(host_signum, info, puc)) {
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115 | 039d3da3 | bellard | return;
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116 | 039d3da3 | bellard | } |
117 | 039d3da3 | bellard | abort(); |
118 | 039d3da3 | bellard | } |
119 | 039d3da3 | bellard | |
120 | 039d3da3 | bellard | int main(int argc, char **argv) |
121 | 039d3da3 | bellard | { |
122 | 039d3da3 | bellard | uint8_t *vm86_mem; |
123 | 039d3da3 | bellard | const char *filename; |
124 | 039d3da3 | bellard | int fd, ret, seg;
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125 | 039d3da3 | bellard | CPUState *env; |
126 | 039d3da3 | bellard | |
127 | 039d3da3 | bellard | if (argc != 2) |
128 | 039d3da3 | bellard | usage(); |
129 | 039d3da3 | bellard | filename = argv[1];
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130 | 3b46e624 | ths | |
131 | 5fafdf24 | ths | vm86_mem = mmap((void *)0x00000000, 0x110000, |
132 | 5fafdf24 | ths | PROT_WRITE | PROT_READ | PROT_EXEC, |
133 | 039d3da3 | bellard | MAP_FIXED | MAP_ANON | MAP_PRIVATE, -1, 0); |
134 | 039d3da3 | bellard | if (vm86_mem == MAP_FAILED) {
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135 | 039d3da3 | bellard | perror("mmap");
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136 | 039d3da3 | bellard | exit(1);
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137 | 039d3da3 | bellard | } |
138 | 039d3da3 | bellard | |
139 | 039d3da3 | bellard | /* load the MSDOS .com executable */
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140 | 039d3da3 | bellard | fd = open(filename, O_RDONLY); |
141 | 039d3da3 | bellard | if (fd < 0) { |
142 | 039d3da3 | bellard | perror(filename); |
143 | 039d3da3 | bellard | exit(1);
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144 | 039d3da3 | bellard | } |
145 | 039d3da3 | bellard | ret = read(fd, vm86_mem + COM_BASE_ADDR, 65536 - 256); |
146 | 039d3da3 | bellard | if (ret < 0) { |
147 | 039d3da3 | bellard | perror("read");
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148 | 039d3da3 | bellard | exit(1);
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149 | 039d3da3 | bellard | } |
150 | 039d3da3 | bellard | close(fd); |
151 | 039d3da3 | bellard | |
152 | 039d3da3 | bellard | /* install exception handler for CPU emulator */
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153 | 039d3da3 | bellard | { |
154 | 039d3da3 | bellard | struct sigaction act;
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155 | 3b46e624 | ths | |
156 | 039d3da3 | bellard | sigfillset(&act.sa_mask); |
157 | 039d3da3 | bellard | act.sa_flags = SA_SIGINFO; |
158 | 039d3da3 | bellard | // act.sa_flags |= SA_ONSTACK;
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159 | 039d3da3 | bellard | |
160 | 039d3da3 | bellard | act.sa_sigaction = host_segv_handler; |
161 | 039d3da3 | bellard | sigaction(SIGSEGV, &act, NULL);
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162 | 039d3da3 | bellard | sigaction(SIGBUS, &act, NULL);
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163 | 039d3da3 | bellard | } |
164 | 039d3da3 | bellard | |
165 | 039d3da3 | bellard | // cpu_set_log(CPU_LOG_TB_IN_ASM | CPU_LOG_TB_OUT_ASM | CPU_LOG_EXEC);
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166 | 039d3da3 | bellard | |
167 | aaed909a | bellard | env = cpu_init("qemu32");
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168 | 039d3da3 | bellard | |
169 | 039d3da3 | bellard | cpu_x86_set_cpl(env, 3);
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170 | 039d3da3 | bellard | |
171 | 039d3da3 | bellard | env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
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172 | 039d3da3 | bellard | /* NOTE: hflags duplicates some of the virtual CPU state */
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173 | 039d3da3 | bellard | env->hflags |= HF_PE_MASK | VM_MASK; |
174 | 039d3da3 | bellard | |
175 | 039d3da3 | bellard | /* flags setup : we activate the IRQs by default as in user
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176 | 039d3da3 | bellard | mode. We also activate the VM86 flag to run DOS code */
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177 | 039d3da3 | bellard | env->eflags |= IF_MASK | VM_MASK; |
178 | 3b46e624 | ths | |
179 | 039d3da3 | bellard | /* init basic registers */
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180 | 039d3da3 | bellard | env->eip = 0x100;
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181 | 039d3da3 | bellard | env->regs[R_ESP] = 0xfffe;
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182 | 039d3da3 | bellard | seg = (COM_BASE_ADDR - 0x100) >> 4; |
183 | 039d3da3 | bellard | |
184 | 5fafdf24 | ths | cpu_x86_load_seg_cache(env, R_CS, seg, |
185 | 2d7a3b9d | bellard | (seg << 4), 0xffff, 0); |
186 | 5fafdf24 | ths | cpu_x86_load_seg_cache(env, R_SS, seg, |
187 | 2d7a3b9d | bellard | (seg << 4), 0xffff, 0); |
188 | 5fafdf24 | ths | cpu_x86_load_seg_cache(env, R_DS, seg, |
189 | 2d7a3b9d | bellard | (seg << 4), 0xffff, 0); |
190 | 5fafdf24 | ths | cpu_x86_load_seg_cache(env, R_ES, seg, |
191 | 2d7a3b9d | bellard | (seg << 4), 0xffff, 0); |
192 | 5fafdf24 | ths | cpu_x86_load_seg_cache(env, R_FS, seg, |
193 | 2d7a3b9d | bellard | (seg << 4), 0xffff, 0); |
194 | 5fafdf24 | ths | cpu_x86_load_seg_cache(env, R_GS, seg, |
195 | 2d7a3b9d | bellard | (seg << 4), 0xffff, 0); |
196 | 039d3da3 | bellard | |
197 | 039d3da3 | bellard | /* exception support */
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198 | 2d7a3b9d | bellard | env->idt.base = (unsigned long)idt_table; |
199 | 039d3da3 | bellard | env->idt.limit = sizeof(idt_table) - 1; |
200 | 039d3da3 | bellard | set_idt(0, 0); |
201 | 039d3da3 | bellard | set_idt(1, 0); |
202 | 039d3da3 | bellard | set_idt(2, 0); |
203 | 039d3da3 | bellard | set_idt(3, 3); |
204 | 039d3da3 | bellard | set_idt(4, 3); |
205 | 039d3da3 | bellard | set_idt(5, 3); |
206 | 039d3da3 | bellard | set_idt(6, 0); |
207 | 039d3da3 | bellard | set_idt(7, 0); |
208 | 039d3da3 | bellard | set_idt(8, 0); |
209 | 039d3da3 | bellard | set_idt(9, 0); |
210 | 039d3da3 | bellard | set_idt(10, 0); |
211 | 039d3da3 | bellard | set_idt(11, 0); |
212 | 039d3da3 | bellard | set_idt(12, 0); |
213 | 039d3da3 | bellard | set_idt(13, 0); |
214 | 039d3da3 | bellard | set_idt(14, 0); |
215 | 039d3da3 | bellard | set_idt(15, 0); |
216 | 039d3da3 | bellard | set_idt(16, 0); |
217 | 039d3da3 | bellard | set_idt(17, 0); |
218 | 039d3da3 | bellard | set_idt(18, 0); |
219 | 039d3da3 | bellard | set_idt(19, 0); |
220 | 3b46e624 | ths | |
221 | 039d3da3 | bellard | /* put return code */
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222 | 039d3da3 | bellard | *seg_to_linear(env->segs[R_CS].selector, 0) = 0xb4; /* mov ah, $0 */ |
223 | 039d3da3 | bellard | *seg_to_linear(env->segs[R_CS].selector, 1) = 0x00; |
224 | 039d3da3 | bellard | *seg_to_linear(env->segs[R_CS].selector, 2) = 0xcd; /* int $0x21 */ |
225 | 039d3da3 | bellard | *seg_to_linear(env->segs[R_CS].selector, 3) = 0x21; |
226 | 039d3da3 | bellard | pushw(env, 0x0000);
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227 | 039d3da3 | bellard | |
228 | 039d3da3 | bellard | /* the value of these registers seem to be assumed by pi_10.com */
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229 | 039d3da3 | bellard | env->regs[R_ESI] = 0x100;
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230 | 039d3da3 | bellard | env->regs[R_ECX] = 0xff;
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231 | 039d3da3 | bellard | env->regs[R_EBP] = 0x0900;
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232 | 039d3da3 | bellard | env->regs[R_EDI] = 0xfffe;
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233 | 039d3da3 | bellard | |
234 | 039d3da3 | bellard | /* inform the emulator of the mmaped memory */
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235 | 5fafdf24 | ths | page_set_flags(0x00000000, 0x110000, |
236 | 039d3da3 | bellard | PAGE_WRITE | PAGE_READ | PAGE_EXEC | PAGE_VALID); |
237 | 039d3da3 | bellard | |
238 | 039d3da3 | bellard | for(;;) {
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239 | 039d3da3 | bellard | ret = cpu_x86_exec(env); |
240 | 039d3da3 | bellard | switch(ret) {
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241 | 039d3da3 | bellard | case EXCP0D_GPF:
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242 | 039d3da3 | bellard | { |
243 | 039d3da3 | bellard | int int_num, ah;
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244 | 2d7a3b9d | bellard | int_num = *(uint8_t *)(env->segs[R_CS].base + env->eip + 1);
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245 | 039d3da3 | bellard | if (int_num != 0x21) |
246 | 039d3da3 | bellard | goto unknown_int;
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247 | 039d3da3 | bellard | ah = (env->regs[R_EAX] >> 8) & 0xff; |
248 | 039d3da3 | bellard | switch(ah) {
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249 | 039d3da3 | bellard | case 0x00: /* exit */ |
250 | 039d3da3 | bellard | exit(0);
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251 | 039d3da3 | bellard | case 0x02: /* write char */ |
252 | 039d3da3 | bellard | { |
253 | 039d3da3 | bellard | uint8_t c = env->regs[R_EDX]; |
254 | 039d3da3 | bellard | write(1, &c, 1); |
255 | 039d3da3 | bellard | } |
256 | 039d3da3 | bellard | break;
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257 | 039d3da3 | bellard | case 0x09: /* write string */ |
258 | 039d3da3 | bellard | { |
259 | 039d3da3 | bellard | uint8_t c; |
260 | 039d3da3 | bellard | for(;;) {
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261 | 039d3da3 | bellard | c = *seg_to_linear(env->segs[R_DS].selector, env->regs[R_EAX]); |
262 | 039d3da3 | bellard | if (c == '$') |
263 | 039d3da3 | bellard | break;
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264 | 039d3da3 | bellard | write(1, &c, 1); |
265 | 039d3da3 | bellard | } |
266 | 039d3da3 | bellard | env->regs[R_EAX] = (env->regs[R_EAX] & ~0xff) | '$'; |
267 | 039d3da3 | bellard | } |
268 | 039d3da3 | bellard | break;
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269 | 039d3da3 | bellard | default:
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270 | 039d3da3 | bellard | unknown_int:
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271 | 039d3da3 | bellard | fprintf(stderr, "unsupported int 0x%02x\n", int_num);
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272 | 2d7a3b9d | bellard | cpu_dump_state(env, stderr, fprintf, 0);
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273 | 039d3da3 | bellard | // exit(1);
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274 | 039d3da3 | bellard | } |
275 | 039d3da3 | bellard | env->eip += 2;
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276 | 039d3da3 | bellard | } |
277 | 039d3da3 | bellard | break;
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278 | 039d3da3 | bellard | default:
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279 | 039d3da3 | bellard | fprintf(stderr, "unhandled cpu_exec return code (0x%x)\n", ret);
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280 | 2d7a3b9d | bellard | cpu_dump_state(env, stderr, fprintf, 0);
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281 | 039d3da3 | bellard | exit(1);
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282 | 039d3da3 | bellard | } |
283 | 039d3da3 | bellard | } |
284 | 039d3da3 | bellard | } |