root / hw / spapr_events.c @ d8c6d07f
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1 | 74d042e5 | David Gibson | /*
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2 | 74d042e5 | David Gibson | * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
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3 | 74d042e5 | David Gibson | *
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4 | 74d042e5 | David Gibson | * RTAS events handling
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5 | 74d042e5 | David Gibson | *
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6 | 74d042e5 | David Gibson | * Copyright (c) 2012 David Gibson, IBM Corporation.
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7 | 74d042e5 | David Gibson | *
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8 | 74d042e5 | David Gibson | * Permission is hereby granted, free of charge, to any person obtaining a copy
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9 | 74d042e5 | David Gibson | * of this software and associated documentation files (the "Software"), to deal
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10 | 74d042e5 | David Gibson | * in the Software without restriction, including without limitation the rights
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11 | 74d042e5 | David Gibson | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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12 | 74d042e5 | David Gibson | * copies of the Software, and to permit persons to whom the Software is
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13 | 74d042e5 | David Gibson | * furnished to do so, subject to the following conditions:
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14 | 74d042e5 | David Gibson | *
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15 | 74d042e5 | David Gibson | * The above copyright notice and this permission notice shall be included in
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16 | 74d042e5 | David Gibson | * all copies or substantial portions of the Software.
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17 | 74d042e5 | David Gibson | *
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18 | 74d042e5 | David Gibson | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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19 | 74d042e5 | David Gibson | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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20 | 74d042e5 | David Gibson | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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21 | 74d042e5 | David Gibson | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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22 | 74d042e5 | David Gibson | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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23 | 74d042e5 | David Gibson | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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24 | 74d042e5 | David Gibson | * THE SOFTWARE.
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25 | 74d042e5 | David Gibson | *
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26 | 74d042e5 | David Gibson | */
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27 | 74d042e5 | David Gibson | #include "cpu.h" |
28 | 9c17d615 | Paolo Bonzini | #include "sysemu/sysemu.h" |
29 | 927d4878 | Paolo Bonzini | #include "char/char.h" |
30 | 74d042e5 | David Gibson | #include "hw/qdev.h" |
31 | 9c17d615 | Paolo Bonzini | #include "sysemu/device_tree.h" |
32 | 74d042e5 | David Gibson | |
33 | 74d042e5 | David Gibson | #include "hw/spapr.h" |
34 | 74d042e5 | David Gibson | #include "hw/spapr_vio.h" |
35 | 74d042e5 | David Gibson | |
36 | 74d042e5 | David Gibson | #include <libfdt.h> |
37 | 74d042e5 | David Gibson | |
38 | 74d042e5 | David Gibson | struct rtas_error_log {
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39 | 74d042e5 | David Gibson | uint32_t summary; |
40 | 74d042e5 | David Gibson | #define RTAS_LOG_VERSION_MASK 0xff000000 |
41 | 74d042e5 | David Gibson | #define RTAS_LOG_VERSION_6 0x06000000 |
42 | 74d042e5 | David Gibson | #define RTAS_LOG_SEVERITY_MASK 0x00e00000 |
43 | 74d042e5 | David Gibson | #define RTAS_LOG_SEVERITY_ALREADY_REPORTED 0x00c00000 |
44 | 74d042e5 | David Gibson | #define RTAS_LOG_SEVERITY_FATAL 0x00a00000 |
45 | 74d042e5 | David Gibson | #define RTAS_LOG_SEVERITY_ERROR 0x00800000 |
46 | 74d042e5 | David Gibson | #define RTAS_LOG_SEVERITY_ERROR_SYNC 0x00600000 |
47 | 74d042e5 | David Gibson | #define RTAS_LOG_SEVERITY_WARNING 0x00400000 |
48 | 74d042e5 | David Gibson | #define RTAS_LOG_SEVERITY_EVENT 0x00200000 |
49 | 74d042e5 | David Gibson | #define RTAS_LOG_SEVERITY_NO_ERROR 0x00000000 |
50 | 74d042e5 | David Gibson | #define RTAS_LOG_DISPOSITION_MASK 0x00180000 |
51 | 74d042e5 | David Gibson | #define RTAS_LOG_DISPOSITION_FULLY_RECOVERED 0x00000000 |
52 | 74d042e5 | David Gibson | #define RTAS_LOG_DISPOSITION_LIMITED_RECOVERY 0x00080000 |
53 | 74d042e5 | David Gibson | #define RTAS_LOG_DISPOSITION_NOT_RECOVERED 0x00100000 |
54 | 74d042e5 | David Gibson | #define RTAS_LOG_OPTIONAL_PART_PRESENT 0x00040000 |
55 | 74d042e5 | David Gibson | #define RTAS_LOG_INITIATOR_MASK 0x0000f000 |
56 | 74d042e5 | David Gibson | #define RTAS_LOG_INITIATOR_UNKNOWN 0x00000000 |
57 | 74d042e5 | David Gibson | #define RTAS_LOG_INITIATOR_CPU 0x00001000 |
58 | 74d042e5 | David Gibson | #define RTAS_LOG_INITIATOR_PCI 0x00002000 |
59 | 74d042e5 | David Gibson | #define RTAS_LOG_INITIATOR_MEMORY 0x00004000 |
60 | 74d042e5 | David Gibson | #define RTAS_LOG_INITIATOR_HOTPLUG 0x00006000 |
61 | 74d042e5 | David Gibson | #define RTAS_LOG_TARGET_MASK 0x00000f00 |
62 | 74d042e5 | David Gibson | #define RTAS_LOG_TARGET_UNKNOWN 0x00000000 |
63 | 74d042e5 | David Gibson | #define RTAS_LOG_TARGET_CPU 0x00000100 |
64 | 74d042e5 | David Gibson | #define RTAS_LOG_TARGET_PCI 0x00000200 |
65 | 74d042e5 | David Gibson | #define RTAS_LOG_TARGET_MEMORY 0x00000400 |
66 | 74d042e5 | David Gibson | #define RTAS_LOG_TARGET_HOTPLUG 0x00000600 |
67 | 74d042e5 | David Gibson | #define RTAS_LOG_TYPE_MASK 0x000000ff |
68 | 74d042e5 | David Gibson | #define RTAS_LOG_TYPE_OTHER 0x00000000 |
69 | 74d042e5 | David Gibson | #define RTAS_LOG_TYPE_RETRY 0x00000001 |
70 | 74d042e5 | David Gibson | #define RTAS_LOG_TYPE_TCE_ERR 0x00000002 |
71 | 74d042e5 | David Gibson | #define RTAS_LOG_TYPE_INTERN_DEV_FAIL 0x00000003 |
72 | 74d042e5 | David Gibson | #define RTAS_LOG_TYPE_TIMEOUT 0x00000004 |
73 | 74d042e5 | David Gibson | #define RTAS_LOG_TYPE_DATA_PARITY 0x00000005 |
74 | 74d042e5 | David Gibson | #define RTAS_LOG_TYPE_ADDR_PARITY 0x00000006 |
75 | 74d042e5 | David Gibson | #define RTAS_LOG_TYPE_CACHE_PARITY 0x00000007 |
76 | 74d042e5 | David Gibson | #define RTAS_LOG_TYPE_ADDR_INVALID 0x00000008 |
77 | 74d042e5 | David Gibson | #define RTAS_LOG_TYPE_ECC_UNCORR 0x00000009 |
78 | 74d042e5 | David Gibson | #define RTAS_LOG_TYPE_ECC_CORR 0x0000000a |
79 | 74d042e5 | David Gibson | #define RTAS_LOG_TYPE_EPOW 0x00000040 |
80 | 74d042e5 | David Gibson | uint32_t extended_length; |
81 | 74d042e5 | David Gibson | } QEMU_PACKED; |
82 | 74d042e5 | David Gibson | |
83 | 74d042e5 | David Gibson | struct rtas_event_log_v6 {
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84 | 74d042e5 | David Gibson | uint8_t b0; |
85 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_B0_VALID 0x80 |
86 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_B0_UNRECOVERABLE_ERROR 0x40 |
87 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_B0_RECOVERABLE_ERROR 0x20 |
88 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_B0_DEGRADED_OPERATION 0x10 |
89 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_B0_PREDICTIVE_ERROR 0x08 |
90 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_B0_NEW_LOG 0x04 |
91 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_B0_BIGENDIAN 0x02 |
92 | 74d042e5 | David Gibson | uint8_t _resv1; |
93 | 74d042e5 | David Gibson | uint8_t b2; |
94 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_B2_POWERPC_FORMAT 0x80 |
95 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_B2_LOG_FORMAT_MASK 0x0f |
96 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_B2_LOG_FORMAT_PLATFORM_EVENT 0x0e |
97 | 74d042e5 | David Gibson | uint8_t _resv2[9];
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98 | 74d042e5 | David Gibson | uint32_t company; |
99 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_COMPANY_IBM 0x49424d00 /* IBM<null> */ |
100 | 74d042e5 | David Gibson | } QEMU_PACKED; |
101 | 74d042e5 | David Gibson | |
102 | 74d042e5 | David Gibson | struct rtas_event_log_v6_section_header {
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103 | 74d042e5 | David Gibson | uint16_t section_id; |
104 | 74d042e5 | David Gibson | uint16_t section_length; |
105 | 74d042e5 | David Gibson | uint8_t section_version; |
106 | 74d042e5 | David Gibson | uint8_t section_subtype; |
107 | 74d042e5 | David Gibson | uint16_t creator_component_id; |
108 | 74d042e5 | David Gibson | } QEMU_PACKED; |
109 | 74d042e5 | David Gibson | |
110 | 74d042e5 | David Gibson | struct rtas_event_log_v6_maina {
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111 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_SECTION_ID_MAINA 0x5048 /* PH */ |
112 | 74d042e5 | David Gibson | struct rtas_event_log_v6_section_header hdr;
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113 | 74d042e5 | David Gibson | uint32_t creation_date; /* BCD: YYYYMMDD */
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114 | 74d042e5 | David Gibson | uint32_t creation_time; /* BCD: HHMMSS00 */
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115 | 74d042e5 | David Gibson | uint8_t _platform1[8];
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116 | 74d042e5 | David Gibson | char creator_id;
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117 | 74d042e5 | David Gibson | uint8_t _resv1[2];
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118 | 74d042e5 | David Gibson | uint8_t section_count; |
119 | 74d042e5 | David Gibson | uint8_t _resv2[4];
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120 | 74d042e5 | David Gibson | uint8_t _platform2[8];
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121 | 74d042e5 | David Gibson | uint32_t plid; |
122 | 74d042e5 | David Gibson | uint8_t _platform3[4];
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123 | 74d042e5 | David Gibson | } QEMU_PACKED; |
124 | 74d042e5 | David Gibson | |
125 | 74d042e5 | David Gibson | struct rtas_event_log_v6_mainb {
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126 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_SECTION_ID_MAINB 0x5548 /* UH */ |
127 | 74d042e5 | David Gibson | struct rtas_event_log_v6_section_header hdr;
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128 | 74d042e5 | David Gibson | uint8_t subsystem_id; |
129 | 74d042e5 | David Gibson | uint8_t _platform1; |
130 | 74d042e5 | David Gibson | uint8_t event_severity; |
131 | 74d042e5 | David Gibson | uint8_t event_subtype; |
132 | 74d042e5 | David Gibson | uint8_t _platform2[4];
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133 | 74d042e5 | David Gibson | uint8_t _resv1[2];
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134 | 74d042e5 | David Gibson | uint16_t action_flags; |
135 | 74d042e5 | David Gibson | uint8_t _resv2[4];
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136 | 74d042e5 | David Gibson | } QEMU_PACKED; |
137 | 74d042e5 | David Gibson | |
138 | 74d042e5 | David Gibson | struct rtas_event_log_v6_epow {
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139 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_SECTION_ID_EPOW 0x4550 /* EP */ |
140 | 74d042e5 | David Gibson | struct rtas_event_log_v6_section_header hdr;
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141 | 74d042e5 | David Gibson | uint8_t sensor_value; |
142 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_EPOW_ACTION_RESET 0 |
143 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_EPOW_ACTION_WARN_COOLING 1 |
144 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_EPOW_ACTION_WARN_POWER 2 |
145 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_EPOW_ACTION_SYSTEM_SHUTDOWN 3 |
146 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_EPOW_ACTION_SYSTEM_HALT 4 |
147 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_EPOW_ACTION_MAIN_ENCLOSURE 5 |
148 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_EPOW_ACTION_POWER_OFF 7 |
149 | 74d042e5 | David Gibson | uint8_t event_modifier; |
150 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_EPOW_MODIFIER_NORMAL 1 |
151 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_EPOW_MODIFIER_ON_UPS 2 |
152 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_EPOW_MODIFIER_CRITICAL 3 |
153 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_EPOW_MODIFIER_TEMPERATURE 4 |
154 | 74d042e5 | David Gibson | uint8_t extended_modifier; |
155 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_EPOW_XMODIFIER_SYSTEM_WIDE 0 |
156 | 74d042e5 | David Gibson | #define RTAS_LOG_V6_EPOW_XMODIFIER_PARTITION_SPECIFIC 1 |
157 | 74d042e5 | David Gibson | uint8_t _resv; |
158 | 74d042e5 | David Gibson | uint64_t reason_code; |
159 | 74d042e5 | David Gibson | } QEMU_PACKED; |
160 | 74d042e5 | David Gibson | |
161 | 74d042e5 | David Gibson | struct epow_log_full {
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162 | 74d042e5 | David Gibson | struct rtas_error_log hdr;
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163 | 74d042e5 | David Gibson | struct rtas_event_log_v6 v6hdr;
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164 | 74d042e5 | David Gibson | struct rtas_event_log_v6_maina maina;
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165 | 74d042e5 | David Gibson | struct rtas_event_log_v6_mainb mainb;
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166 | 74d042e5 | David Gibson | struct rtas_event_log_v6_epow epow;
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167 | 74d042e5 | David Gibson | } QEMU_PACKED; |
168 | 74d042e5 | David Gibson | |
169 | 74d042e5 | David Gibson | #define EVENT_MASK_INTERNAL_ERRORS 0x80000000 |
170 | 74d042e5 | David Gibson | #define EVENT_MASK_EPOW 0x40000000 |
171 | 74d042e5 | David Gibson | #define EVENT_MASK_HOTPLUG 0x10000000 |
172 | 74d042e5 | David Gibson | #define EVENT_MASK_IO 0x08000000 |
173 | 74d042e5 | David Gibson | |
174 | 74d042e5 | David Gibson | #define _FDT(exp) \
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175 | 74d042e5 | David Gibson | do { \
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176 | 74d042e5 | David Gibson | int ret = (exp); \
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177 | 74d042e5 | David Gibson | if (ret < 0) { \ |
178 | 74d042e5 | David Gibson | fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
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179 | 74d042e5 | David Gibson | #exp, fdt_strerror(ret)); \
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180 | 74d042e5 | David Gibson | exit(1); \
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181 | 74d042e5 | David Gibson | } \ |
182 | 74d042e5 | David Gibson | } while (0) |
183 | 74d042e5 | David Gibson | |
184 | 74d042e5 | David Gibson | void spapr_events_fdt_skel(void *fdt, uint32_t epow_irq) |
185 | 74d042e5 | David Gibson | { |
186 | 74d042e5 | David Gibson | uint32_t epow_irq_ranges[] = {cpu_to_be32(epow_irq), cpu_to_be32(1)};
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187 | 74d042e5 | David Gibson | uint32_t epow_interrupts[] = {cpu_to_be32(epow_irq), 0};
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188 | 74d042e5 | David Gibson | |
189 | 74d042e5 | David Gibson | _FDT((fdt_begin_node(fdt, "event-sources")));
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190 | 74d042e5 | David Gibson | |
191 | 74d042e5 | David Gibson | _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
192 | 74d042e5 | David Gibson | _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2))); |
193 | 74d042e5 | David Gibson | _FDT((fdt_property(fdt, "interrupt-ranges",
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194 | 74d042e5 | David Gibson | epow_irq_ranges, sizeof(epow_irq_ranges))));
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195 | 74d042e5 | David Gibson | |
196 | 74d042e5 | David Gibson | _FDT((fdt_begin_node(fdt, "epow-events")));
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197 | 74d042e5 | David Gibson | _FDT((fdt_property(fdt, "interrupts",
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198 | 74d042e5 | David Gibson | epow_interrupts, sizeof(epow_interrupts))));
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199 | 74d042e5 | David Gibson | _FDT((fdt_end_node(fdt))); |
200 | 74d042e5 | David Gibson | |
201 | 74d042e5 | David Gibson | _FDT((fdt_end_node(fdt))); |
202 | 74d042e5 | David Gibson | } |
203 | 74d042e5 | David Gibson | |
204 | 74d042e5 | David Gibson | static struct epow_log_full *pending_epow; |
205 | 74d042e5 | David Gibson | static uint32_t next_plid;
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206 | 74d042e5 | David Gibson | |
207 | 74d042e5 | David Gibson | static void spapr_powerdown_req(Notifier *n, void *opaque) |
208 | 74d042e5 | David Gibson | { |
209 | 74d042e5 | David Gibson | sPAPREnvironment *spapr = container_of(n, sPAPREnvironment, epow_notifier); |
210 | 74d042e5 | David Gibson | struct rtas_error_log *hdr;
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211 | 74d042e5 | David Gibson | struct rtas_event_log_v6 *v6hdr;
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212 | 74d042e5 | David Gibson | struct rtas_event_log_v6_maina *maina;
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213 | 74d042e5 | David Gibson | struct rtas_event_log_v6_mainb *mainb;
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214 | 74d042e5 | David Gibson | struct rtas_event_log_v6_epow *epow;
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215 | 74d042e5 | David Gibson | struct tm tm;
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216 | 74d042e5 | David Gibson | int year;
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217 | 74d042e5 | David Gibson | |
218 | 74d042e5 | David Gibson | if (pending_epow) {
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219 | 74d042e5 | David Gibson | /* For now, we just throw away earlier events if two come
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220 | 74d042e5 | David Gibson | * along before any are consumed. This is sufficient for our
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221 | 74d042e5 | David Gibson | * powerdown messages, but we'll need more if we do more
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222 | 74d042e5 | David Gibson | * general error/event logging */
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223 | 74d042e5 | David Gibson | g_free(pending_epow); |
224 | 74d042e5 | David Gibson | } |
225 | 74d042e5 | David Gibson | pending_epow = g_malloc0(sizeof(*pending_epow));
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226 | 74d042e5 | David Gibson | hdr = &pending_epow->hdr; |
227 | 74d042e5 | David Gibson | v6hdr = &pending_epow->v6hdr; |
228 | 74d042e5 | David Gibson | maina = &pending_epow->maina; |
229 | 74d042e5 | David Gibson | mainb = &pending_epow->mainb; |
230 | 74d042e5 | David Gibson | epow = &pending_epow->epow; |
231 | 74d042e5 | David Gibson | |
232 | 74d042e5 | David Gibson | hdr->summary = cpu_to_be32(RTAS_LOG_VERSION_6 |
233 | 74d042e5 | David Gibson | | RTAS_LOG_SEVERITY_EVENT |
234 | 74d042e5 | David Gibson | | RTAS_LOG_DISPOSITION_NOT_RECOVERED |
235 | 74d042e5 | David Gibson | | RTAS_LOG_OPTIONAL_PART_PRESENT |
236 | 74d042e5 | David Gibson | | RTAS_LOG_TYPE_EPOW); |
237 | 74d042e5 | David Gibson | hdr->extended_length = cpu_to_be32(sizeof(*pending_epow)
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238 | 74d042e5 | David Gibson | - sizeof(pending_epow->hdr));
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239 | 74d042e5 | David Gibson | |
240 | 74d042e5 | David Gibson | v6hdr->b0 = RTAS_LOG_V6_B0_VALID | RTAS_LOG_V6_B0_NEW_LOG |
241 | 74d042e5 | David Gibson | | RTAS_LOG_V6_B0_BIGENDIAN; |
242 | 74d042e5 | David Gibson | v6hdr->b2 = RTAS_LOG_V6_B2_POWERPC_FORMAT |
243 | 74d042e5 | David Gibson | | RTAS_LOG_V6_B2_LOG_FORMAT_PLATFORM_EVENT; |
244 | 74d042e5 | David Gibson | v6hdr->company = cpu_to_be32(RTAS_LOG_V6_COMPANY_IBM); |
245 | 74d042e5 | David Gibson | |
246 | 74d042e5 | David Gibson | maina->hdr.section_id = cpu_to_be16(RTAS_LOG_V6_SECTION_ID_MAINA); |
247 | 74d042e5 | David Gibson | maina->hdr.section_length = cpu_to_be16(sizeof(*maina));
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248 | 74d042e5 | David Gibson | /* FIXME: section version, subtype and creator id? */
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249 | 74d042e5 | David Gibson | qemu_get_timedate(&tm, spapr->rtc_offset); |
250 | 74d042e5 | David Gibson | year = tm.tm_year + 1900;
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251 | 74d042e5 | David Gibson | maina->creation_date = cpu_to_be32((to_bcd(year / 100) << 24) |
252 | 74d042e5 | David Gibson | | (to_bcd(year % 100) << 16) |
253 | 74d042e5 | David Gibson | | (to_bcd(tm.tm_mon + 1) << 8) |
254 | 74d042e5 | David Gibson | | to_bcd(tm.tm_mday)); |
255 | 74d042e5 | David Gibson | maina->creation_time = cpu_to_be32((to_bcd(tm.tm_hour) << 24)
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256 | 74d042e5 | David Gibson | | (to_bcd(tm.tm_min) << 16)
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257 | 74d042e5 | David Gibson | | (to_bcd(tm.tm_sec) << 8));
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258 | 74d042e5 | David Gibson | maina->creator_id = 'H'; /* Hypervisor */ |
259 | 74d042e5 | David Gibson | maina->section_count = 3; /* Main-A, Main-B and EPOW */ |
260 | 74d042e5 | David Gibson | maina->plid = next_plid++; |
261 | 74d042e5 | David Gibson | |
262 | 74d042e5 | David Gibson | mainb->hdr.section_id = cpu_to_be16(RTAS_LOG_V6_SECTION_ID_MAINB); |
263 | 74d042e5 | David Gibson | mainb->hdr.section_length = cpu_to_be16(sizeof(*mainb));
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264 | 74d042e5 | David Gibson | /* FIXME: section version, subtype and creator id? */
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265 | 74d042e5 | David Gibson | mainb->subsystem_id = 0xa0; /* External environment */ |
266 | 74d042e5 | David Gibson | mainb->event_severity = 0x00; /* Informational / non-error */ |
267 | 74d042e5 | David Gibson | mainb->event_subtype = 0xd0; /* Normal shutdown */ |
268 | 74d042e5 | David Gibson | |
269 | 74d042e5 | David Gibson | epow->hdr.section_id = cpu_to_be16(RTAS_LOG_V6_SECTION_ID_EPOW); |
270 | 74d042e5 | David Gibson | epow->hdr.section_length = cpu_to_be16(sizeof(*epow));
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271 | 74d042e5 | David Gibson | epow->hdr.section_version = 2; /* includes extended modifier */ |
272 | 74d042e5 | David Gibson | /* FIXME: section subtype and creator id? */
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273 | 74d042e5 | David Gibson | epow->sensor_value = RTAS_LOG_V6_EPOW_ACTION_SYSTEM_SHUTDOWN; |
274 | 74d042e5 | David Gibson | epow->event_modifier = RTAS_LOG_V6_EPOW_MODIFIER_NORMAL; |
275 | 74d042e5 | David Gibson | epow->extended_modifier = RTAS_LOG_V6_EPOW_XMODIFIER_PARTITION_SPECIFIC; |
276 | 74d042e5 | David Gibson | |
277 | 74d042e5 | David Gibson | qemu_irq_pulse(xics_get_qirq(spapr->icp, spapr->epow_irq)); |
278 | 74d042e5 | David Gibson | } |
279 | 74d042e5 | David Gibson | |
280 | 74d042e5 | David Gibson | static void check_exception(sPAPREnvironment *spapr, |
281 | 74d042e5 | David Gibson | uint32_t token, uint32_t nargs, |
282 | 74d042e5 | David Gibson | target_ulong args, |
283 | 74d042e5 | David Gibson | uint32_t nret, target_ulong rets) |
284 | 74d042e5 | David Gibson | { |
285 | 74d042e5 | David Gibson | uint32_t mask, buf, len; |
286 | 74d042e5 | David Gibson | uint64_t xinfo; |
287 | 74d042e5 | David Gibson | |
288 | 74d042e5 | David Gibson | if ((nargs < 6) || (nargs > 7) || nret != 1) { |
289 | 74d042e5 | David Gibson | rtas_st(rets, 0, -3); |
290 | 74d042e5 | David Gibson | return;
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291 | 74d042e5 | David Gibson | } |
292 | 74d042e5 | David Gibson | |
293 | 74d042e5 | David Gibson | xinfo = rtas_ld(args, 1);
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294 | 74d042e5 | David Gibson | mask = rtas_ld(args, 2);
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295 | 74d042e5 | David Gibson | buf = rtas_ld(args, 4);
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296 | 74d042e5 | David Gibson | len = rtas_ld(args, 5);
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297 | 74d042e5 | David Gibson | if (nargs == 7) { |
298 | 74d042e5 | David Gibson | xinfo |= (uint64_t)rtas_ld(args, 6) << 32; |
299 | 74d042e5 | David Gibson | } |
300 | 74d042e5 | David Gibson | |
301 | 74d042e5 | David Gibson | if ((mask & EVENT_MASK_EPOW) && pending_epow) {
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302 | 74d042e5 | David Gibson | if (sizeof(*pending_epow) < len) { |
303 | 74d042e5 | David Gibson | len = sizeof(*pending_epow);
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304 | 74d042e5 | David Gibson | } |
305 | 74d042e5 | David Gibson | |
306 | 74d042e5 | David Gibson | cpu_physical_memory_write(buf, pending_epow, len); |
307 | 74d042e5 | David Gibson | g_free(pending_epow); |
308 | 74d042e5 | David Gibson | pending_epow = NULL;
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309 | 74d042e5 | David Gibson | rtas_st(rets, 0, 0); |
310 | 74d042e5 | David Gibson | } else {
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311 | 74d042e5 | David Gibson | rtas_st(rets, 0, 1); |
312 | 74d042e5 | David Gibson | } |
313 | 74d042e5 | David Gibson | } |
314 | 74d042e5 | David Gibson | |
315 | 74d042e5 | David Gibson | void spapr_events_init(sPAPREnvironment *spapr)
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316 | 74d042e5 | David Gibson | { |
317 | 74d042e5 | David Gibson | spapr->epow_irq = spapr_allocate_msi(0);
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318 | 74d042e5 | David Gibson | spapr->epow_notifier.notify = spapr_powerdown_req; |
319 | 74d042e5 | David Gibson | qemu_register_powerdown_notifier(&spapr->epow_notifier); |
320 | 74d042e5 | David Gibson | spapr_rtas_register("check-exception", check_exception);
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321 | 74d042e5 | David Gibson | } |