Revision d8ee0384 hw/kvm/ioapic.c
b/hw/kvm/ioapic.c | ||
---|---|---|
15 | 15 |
#include "hw/apic_internal.h" |
16 | 16 |
#include "kvm.h" |
17 | 17 |
|
18 |
/* PC Utility function */ |
|
19 |
void kvm_pc_setup_irq_routing(bool pci_enabled) |
|
20 |
{ |
|
21 |
KVMState *s = kvm_state; |
|
22 |
int i; |
|
23 |
|
|
24 |
if (kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) { |
|
25 |
for (i = 0; i < 8; ++i) { |
|
26 |
if (i == 2) { |
|
27 |
continue; |
|
28 |
} |
|
29 |
kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_MASTER, i); |
|
30 |
} |
|
31 |
for (i = 8; i < 16; ++i) { |
|
32 |
kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_SLAVE, i - 8); |
|
33 |
} |
|
34 |
if (pci_enabled) { |
|
35 |
for (i = 0; i < 24; ++i) { |
|
36 |
if (i == 0) { |
|
37 |
kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, 2); |
|
38 |
} else if (i != 2) { |
|
39 |
kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, i); |
|
40 |
} |
|
41 |
} |
|
42 |
} |
|
43 |
} |
|
44 |
} |
|
45 |
|
|
46 |
void kvm_pc_gsi_handler(void *opaque, int n, int level) |
|
47 |
{ |
|
48 |
GSIState *s = opaque; |
|
49 |
|
|
50 |
if (n < ISA_NUM_IRQS) { |
|
51 |
/* Kernel will forward to both PIC and IOAPIC */ |
|
52 |
qemu_set_irq(s->i8259_irq[n], level); |
|
53 |
} else { |
|
54 |
qemu_set_irq(s->ioapic_irq[n], level); |
|
55 |
} |
|
56 |
} |
|
57 |
|
|
18 | 58 |
typedef struct KVMIOAPICState KVMIOAPICState; |
19 | 59 |
|
20 | 60 |
struct KVMIOAPICState { |
Also available in: Unified diff