pc: map PCI address space as catchall region for not mapped addresses
With a help of negative memory region priority PCI address spaceis mapped underneath RAM regions effectively catching every accessto addresses not mapped by any other region.It simplifies PCI address space mapping into system address space....
Fix pc migration from qemu <= 1.5
The following commit introduced a migration incompatibility:
commit 568f0690fd9aa4d39d84b04c1a5dbb53a915c3feAuthor: David Gibson <david@gibson.dropbear.id.au>Date: Thu Jun 6 18:48:49 2013 +1000
pci: Replace pci_find_domain() with more general pci_root_bus_path()...
Merge remote-tracking branch 'mst/tags/for_anthony' into staging
pci, pc, acpi fixes, enhancements
This includes some pretty big changes:- pci master abort support by Marcel- pci IRQ API rework by Marcel- acpi generation support by myself
Everything has gone through several revisions, latest versions have been on...
ich9: APIs for pc guest info
This adds APIs that will be used to fill inacpi tables, implemented using QOM,to various ich9 components.Some information is still missing in QOM,so we fall back on lookups by type instead.
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>...
q35: Fix typo in constant DEFUALT -> DEFAULT.
Signed-off-by: Richard W.M. Jones <rjones@redhat.com>Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
spapr-pci: rework MSI/MSIX
On the sPAPR platform a guest allocates MSI/MSIX vectors via RTAShypercalls which return global IRQ numbers to a guest so it onlyoperates with those and never touches MSIMessage.
Therefore MSIMessage handling is completely hidden in QEMU....
pc: limit 64 bit hole to 2G by default
It turns out that some 32 bit windows guests crashif 64 bit PCI hole size is >2G.Limit it to 2G for piix and q35 by default.User may override default 64-bit PCI hole size byusing "pci-hole64-size" property.
Examples:...
pseries: savevm support for PCI host bridge
This adds the necessary support for saving the state of the PAPR virtualPCI host bridge (or host bridges).
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>...
q35: Use type-safe cast instead of direct access of parent dev
And remove variables if possible.
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>[AF: Converted remaining access and renamed to parent_obj]Signed-off-by: Andreas Färber <afaerber@suse.de>
pci,misc enhancements
This includes some pci enhancements:
Better support for systems with multiple PCI root busesFW cfg interface for more robust pci programming in BIOSMinor fixes/cleanups for fw cfg and cross-version migration -...
pam: pass device to init_pam and use it to set owner
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
pci: store PCI hole ranges in guestinfo structure
Will be used to pass hole ranges to guests.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
spapr: convert TCE API to use an opaque type
The TCE table is currently returned as a DMAContext, and non-type-safeAPIs are called later passing back the DMAContext. Since we want to moveaway from DMAContext, use an opaque type instead, and add an accessor...
pci: use memory core for iommu support
Use the new iommu support in the memory core for iommu support. The onlyuser, spapr, is also converted, but it still provides a DMAContextinterface until the non-PCI bits switch to AddressSpace.
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>...
hw: move PCI bridges to hw/pci-* or hw/ARCH
hw: move headers to include/
Many of these should be cleaned up with proper qdev-/QOM-ification.Right now there are many catch-all headers in include/hw/ARCH dependingon cpu.h, and this makes it necessary to compile these files per-target.However, fixing this does not belong in these patches....