Revision d9bce9d9
| b/target-ppc/cpu.h | ||
|---|---|---|
| 365 | 365 |
PPC_E500_VECTOR = 0x20000000, |
| 366 | 366 |
/* PowerPC 4xx dedicated instructions */ |
| 367 | 367 |
PPC_4xx_COMMON = 0x40000000, |
| 368 |
/* PowerPC 2.03 specification extensions */ |
|
| 369 |
PPC_203 = 0x80000000, |
|
| 368 | 370 |
}; |
| 369 | 371 |
|
| 370 | 372 |
/* CPU run-time flags (MMU and exception model) */ |
| ... | ... | |
| 385 | 387 |
PPC_FLAGS_MMU_403 = 0x00000005, |
| 386 | 388 |
/* Freescale e500 MMU model */ |
| 387 | 389 |
PPC_FLAGS_MMU_e500 = 0x00000006, |
| 390 |
/* BookE MMU model */ |
|
| 391 |
PPC_FLAGS_MMU_BOOKE = 0x00000007, |
|
| 388 | 392 |
/* Exception model */ |
| 389 | 393 |
PPC_FLAGS_EXCP_MASK = 0x000000F0, |
| 390 | 394 |
/* Standard PowerPC exception model */ |
| ... | ... | |
| 407 | 411 |
PPC_FLAGS_EXCP_74xx = 0x00000080, |
| 408 | 412 |
/* PowerPC 970 exception model */ |
| 409 | 413 |
PPC_FLAGS_EXCP_970 = 0x00000090, |
| 414 |
/* BookE exception model */ |
|
| 415 |
PPC_FLAGS_EXCP_BOOKE = 0x000000A0, |
|
| 410 | 416 |
}; |
| 411 | 417 |
|
| 412 | 418 |
#define PPC_MMU(env) (env->flags & PPC_FLAGS_MMU_MASK) |
| ... | ... | |
| 437 | 443 |
/* PowerPC 440 */ |
| 438 | 444 |
#define PPC_INSNS_440 (PPC_INSNS_EMB | PPC_CACHE_OPT | PPC_BOOKE | \ |
| 439 | 445 |
PPC_4xx_COMMON | PPC_405_MAC | PPC_440_SPEC) |
| 440 |
#define PPC_FLAGS_440 (PPC_FLAGS_TODO)
|
|
| 446 |
#define PPC_FLAGS_440 (PPC_FLAGS_MMU_BOOKE | PPC_FLAGS_EXCP_BOOKE)
|
|
| 441 | 447 |
/* Generic BookE PowerPC */ |
| 442 | 448 |
#define PPC_INSNS_BOOKE (PPC_INSNS_EMB | PPC_BOOKE | PPC_MEM_EIEIO | \ |
| 443 | 449 |
PPC_FLOAT | PPC_FLOAT_OPT | PPC_CACHE_OPT) |
| 444 |
#define PPC_FLAGS_BOOKE (PPC_FLAGS_MMU_SOFT_4xx | PPC_FLAGS_EXCP_40x)
|
|
| 450 |
#define PPC_FLAGS_BOOKE (PPC_FLAGS_MMU_BOOKE | PPC_FLAGS_EXCP_BOOKE)
|
|
| 445 | 451 |
/* e500 core */ |
| 446 | 452 |
#define PPC_INSNS_E500 (PPC_INSNS_EMB | PPC_BOOKE | PPC_MEM_EIEIO | \ |
| 447 | 453 |
PPC_CACHE_OPT | PPC_E500_VECTOR) |
| ... | ... | |
| 502 | 508 |
typedef struct ppc_avr_t ppc_avr_t; |
| 503 | 509 |
typedef struct ppc_tlb_t ppc_tlb_t; |
| 504 | 510 |
|
| 505 |
|
|
| 506 | 511 |
/* SPR access micro-ops generations callbacks */ |
| 507 | 512 |
struct ppc_spr_t {
|
| 508 | 513 |
void (*uea_read)(void *opaque, int spr_num); |
| ... | ... | |
| 619 | 624 |
*/ |
| 620 | 625 |
target_ulong t0, t1, t2; |
| 621 | 626 |
#endif |
| 627 |
ppc_avr_t t0_avr, t1_avr, t2_avr; |
|
| 628 |
|
|
| 622 | 629 |
/* general purpose registers */ |
| 623 | 630 |
ppc_gpr_t gpr[32]; |
| 624 | 631 |
/* LR */ |
| ... | ... | |
| 674 | 681 |
/* Altivec registers */ |
| 675 | 682 |
ppc_avr_t avr[32]; |
| 676 | 683 |
uint32_t vscr; |
| 684 |
/* SPE registers */ |
|
| 685 |
ppc_gpr_t spe_acc; |
|
| 686 |
uint32_t spe_fscr; |
|
| 677 | 687 |
|
| 678 | 688 |
/* Internal devices resources */ |
| 679 | 689 |
/* Time base and decrementer */ |
| ... | ... | |
| 762 | 772 |
void do_store_dbatl (CPUPPCState *env, int nr, target_ulong value); |
| 763 | 773 |
target_ulong do_load_sdr1 (CPUPPCState *env); |
| 764 | 774 |
void do_store_sdr1 (CPUPPCState *env, target_ulong value); |
| 765 |
target_ulong do_load_asr (CPUPPCState *env); |
|
| 766 |
void do_store_asr (CPUPPCState *env, target_ulong value); |
|
| 775 |
#if defined(TARGET_PPC64) |
|
| 776 |
target_ulong ppc_load_asr (CPUPPCState *env); |
|
| 777 |
void ppc_store_asr (CPUPPCState *env, target_ulong value); |
|
| 778 |
#endif |
|
| 767 | 779 |
target_ulong do_load_sr (CPUPPCState *env, int srnum); |
| 768 | 780 |
void do_store_sr (CPUPPCState *env, int srnum, target_ulong value); |
| 769 | 781 |
#endif |
| ... | ... | |
| 771 | 783 |
void ppc_store_xer (CPUPPCState *env, uint32_t value); |
| 772 | 784 |
target_ulong do_load_msr (CPUPPCState *env); |
| 773 | 785 |
void do_store_msr (CPUPPCState *env, target_ulong value); |
| 786 |
void ppc_store_msr32 (CPUPPCState *env, uint32_t value); |
|
| 774 | 787 |
|
| 775 | 788 |
void do_compute_hflags (CPUPPCState *env); |
| 776 | 789 |
|
| ... | ... | |
| 787 | 800 |
void cpu_ppc_store_tbl (CPUPPCState *env, uint32_t value); |
| 788 | 801 |
uint32_t cpu_ppc_load_decr (CPUPPCState *env); |
| 789 | 802 |
void cpu_ppc_store_decr (CPUPPCState *env, uint32_t value); |
| 803 |
uint32_t cpu_ppc601_load_rtcl (CPUPPCState *env); |
|
| 804 |
uint32_t cpu_ppc601_load_rtcu (CPUPPCState *env); |
|
| 805 |
#if !defined(CONFIG_USER_ONLY) |
|
| 806 |
void cpu_ppc601_store_rtcl (CPUPPCState *env, uint32_t value); |
|
| 807 |
void cpu_ppc601_store_rtcu (CPUPPCState *env, uint32_t value); |
|
| 808 |
target_ulong load_40x_pit (CPUPPCState *env); |
|
| 809 |
void store_40x_pit (CPUPPCState *env, target_ulong val); |
|
| 810 |
void store_booke_tcr (CPUPPCState *env, target_ulong val); |
|
| 811 |
void store_booke_tsr (CPUPPCState *env, target_ulong val); |
|
| 812 |
#endif |
|
| 790 | 813 |
#endif |
| 791 | 814 |
|
| 792 | 815 |
#define TARGET_PAGE_BITS 12 |
| b/target-ppc/exec.h | ||
|---|---|---|
| 34 | 34 |
#define T1 (env->t1) |
| 35 | 35 |
#define T2 (env->t2) |
| 36 | 36 |
#else |
| 37 |
/* This may be more efficient if HOST_LONG_BITS > TARGET_LONG_BITS |
|
| 38 |
* To be set to one when we'll be sure it does not cause bugs.... |
|
| 39 |
*/ |
|
| 40 |
#if 0 |
|
| 41 | 37 |
register unsigned long T0 asm(AREG1); |
| 42 | 38 |
register unsigned long T1 asm(AREG2); |
| 43 | 39 |
register unsigned long T2 asm(AREG3); |
| 44 |
#else |
|
| 45 |
register target_ulong T0 asm(AREG1); |
|
| 46 |
register target_ulong T1 asm(AREG2); |
|
| 47 |
register target_ulong T2 asm(AREG3); |
|
| 48 | 40 |
#endif |
| 41 |
/* We may, sometime, need 64 bits registers on 32 bits target */ |
|
| 42 |
#if defined(TARGET_PPC64) || (HOST_LONG_BITS == 64) |
|
| 43 |
#define T0_64 T0 |
|
| 44 |
#define T1_64 T0 |
|
| 45 |
#define T2_64 T0 |
|
| 46 |
#else |
|
| 47 |
/* no registers can be used */ |
|
| 48 |
#define T0_64 (env->t0) |
|
| 49 |
#define T1_64 (env->t1) |
|
| 50 |
#define T2_64 (env->t2) |
|
| 49 | 51 |
#endif |
| 52 |
/* Provision for Altivec */ |
|
| 53 |
#define T0_avr (env->t0_avr) |
|
| 54 |
#define T1_avr (env->t1_avr) |
|
| 55 |
#define T2_avr (env->t2_avr) |
|
| 50 | 56 |
|
| 51 | 57 |
/* XXX: to clean: remove this mess */ |
| 52 | 58 |
#define PARAM(n) ((uint32_t)PARAM##n) |
| b/target-ppc/helper.c | ||
|---|---|---|
| 37 | 37 |
/*****************************************************************************/ |
| 38 | 38 |
/* PowerPC MMU emulation */ |
| 39 | 39 |
|
| 40 |
#if defined(CONFIG_USER_ONLY)
|
|
| 40 |
#if defined(CONFIG_USER_ONLY) |
|
| 41 | 41 |
int cpu_ppc_handle_mmu_fault (CPUState *env, uint32_t address, int rw, |
| 42 | 42 |
int is_user, int is_softmmu) |
| 43 | 43 |
{
|
| 44 | 44 |
int exception, error_code; |
| 45 |
|
|
| 45 |
|
|
| 46 | 46 |
if (rw == 2) {
|
| 47 | 47 |
exception = EXCP_ISI; |
| 48 | 48 |
error_code = 0; |
| ... | ... | |
| 277 | 277 |
ppc_tlb_t *tlb; |
| 278 | 278 |
int nr, best, way; |
| 279 | 279 |
int ret; |
| 280 |
|
|
| 280 |
|
|
| 281 | 281 |
best = -1; |
| 282 | 282 |
ret = -1; /* No TLB found */ |
| 283 | 283 |
for (way = 0; way < env->nb_ways; way++) {
|
| ... | ... | |
| 672 | 672 |
if (loglevel > 0) {
|
| 673 | 673 |
fprintf(logfile, "%s\n", __func__); |
| 674 | 674 |
} |
| 675 |
#endif
|
|
| 675 |
#endif |
|
| 676 | 676 |
if ((access_type == ACCESS_CODE && msr_ir == 0) || |
| 677 | 677 |
(access_type != ACCESS_CODE && msr_dr == 0)) {
|
| 678 | 678 |
/* No address translation */ |
| ... | ... | |
| 693 | 693 |
__func__, eaddr, ctx->raddr); |
| 694 | 694 |
} |
| 695 | 695 |
#endif |
| 696 |
|
|
| 696 |
|
|
| 697 | 697 |
return ret; |
| 698 | 698 |
} |
| 699 | 699 |
|
| ... | ... | |
| 715 | 715 |
int exception = 0, error_code = 0; |
| 716 | 716 |
int access_type; |
| 717 | 717 |
int ret = 0; |
| 718 |
|
|
| 718 |
|
|
| 719 | 719 |
if (rw == 2) {
|
| 720 | 720 |
/* code access */ |
| 721 | 721 |
rw = 0; |
| ... | ... | |
| 975 | 975 |
|
| 976 | 976 |
/*****************************************************************************/ |
| 977 | 977 |
/* Special registers manipulation */ |
| 978 |
#if defined(TARGET_PPC64) |
|
| 979 |
target_ulong ppc_load_asr (CPUPPCState *env) |
|
| 980 |
{
|
|
| 981 |
return env->asr; |
|
| 982 |
} |
|
| 983 |
|
|
| 984 |
void ppc_store_asr (CPUPPCState *env, target_ulong value) |
|
| 985 |
{
|
|
| 986 |
if (env->asr != value) {
|
|
| 987 |
env->asr = value; |
|
| 988 |
tlb_flush(env, 1); |
|
| 989 |
} |
|
| 990 |
} |
|
| 991 |
#endif |
|
| 992 |
|
|
| 978 | 993 |
target_ulong do_load_sdr1 (CPUPPCState *env) |
| 979 | 994 |
{
|
| 980 | 995 |
return env->sdr1; |
| ... | ... | |
| 1039 | 1054 |
xer_ov = (value >> XER_OV) & 0x01; |
| 1040 | 1055 |
xer_ca = (value >> XER_CA) & 0x01; |
| 1041 | 1056 |
xer_cmp = (value >> XER_CMP) & 0xFF; |
| 1042 |
xer_bc = (value >> XER_BC) & 0x3F;
|
|
| 1057 |
xer_bc = (value >> XER_BC) & 0x7F;
|
|
| 1043 | 1058 |
} |
| 1044 | 1059 |
|
| 1045 | 1060 |
/* Swap temporary saved registers with GPRs */ |
| ... | ... | |
| 1066 | 1081 |
{
|
| 1067 | 1082 |
return |
| 1068 | 1083 |
#if defined (TARGET_PPC64) |
| 1069 |
(msr_sf << MSR_SF) | |
|
| 1070 |
(msr_isf << MSR_ISF) | |
|
| 1071 |
(msr_hv << MSR_HV) | |
|
| 1084 |
((target_ulong)msr_sf << MSR_SF) |
|
|
| 1085 |
((target_ulong)msr_isf << MSR_ISF) |
|
|
| 1086 |
((target_ulong)msr_hv << MSR_HV) |
|
|
| 1072 | 1087 |
#endif |
| 1073 |
(msr_ucle << MSR_UCLE) | |
|
| 1074 |
(msr_vr << MSR_VR) | /* VR / SPE */ |
|
| 1075 |
(msr_ap << MSR_AP) | |
|
| 1076 |
(msr_sa << MSR_SA) | |
|
| 1077 |
(msr_key << MSR_KEY) | |
|
| 1078 |
(msr_pow << MSR_POW) | /* POW / WE */ |
|
| 1079 |
(msr_tlb << MSR_TLB) | /* TLB / TGPE / CE */ |
|
| 1080 |
(msr_ile << MSR_ILE) | |
|
| 1081 |
(msr_ee << MSR_EE) | |
|
| 1082 |
(msr_pr << MSR_PR) | |
|
| 1083 |
(msr_fp << MSR_FP) | |
|
| 1084 |
(msr_me << MSR_ME) | |
|
| 1085 |
(msr_fe0 << MSR_FE0) | |
|
| 1086 |
(msr_se << MSR_SE) | /* SE / DWE / UBLE */ |
|
| 1087 |
(msr_be << MSR_BE) | /* BE / DE */ |
|
| 1088 |
(msr_fe1 << MSR_FE1) | |
|
| 1089 |
(msr_al << MSR_AL) | |
|
| 1090 |
(msr_ip << MSR_IP) | |
|
| 1091 |
(msr_ir << MSR_IR) | /* IR / IS */ |
|
| 1092 |
(msr_dr << MSR_DR) | /* DR / DS */ |
|
| 1093 |
(msr_pe << MSR_PE) | /* PE / EP */ |
|
| 1094 |
(msr_px << MSR_PX) | /* PX / PMM */ |
|
| 1095 |
(msr_ri << MSR_RI) | |
|
| 1096 |
(msr_le << MSR_LE); |
|
| 1088 |
((target_ulong)msr_ucle << MSR_UCLE) |
|
|
| 1089 |
((target_ulong)msr_vr << MSR_VR) | /* VR / SPE */
|
|
| 1090 |
((target_ulong)msr_ap << MSR_AP) |
|
|
| 1091 |
((target_ulong)msr_sa << MSR_SA) |
|
|
| 1092 |
((target_ulong)msr_key << MSR_KEY) |
|
|
| 1093 |
((target_ulong)msr_pow << MSR_POW) | /* POW / WE */
|
|
| 1094 |
((target_ulong)msr_tlb << MSR_TLB) | /* TLB / TGPE / CE */
|
|
| 1095 |
((target_ulong)msr_ile << MSR_ILE) |
|
|
| 1096 |
((target_ulong)msr_ee << MSR_EE) |
|
|
| 1097 |
((target_ulong)msr_pr << MSR_PR) |
|
|
| 1098 |
((target_ulong)msr_fp << MSR_FP) |
|
|
| 1099 |
((target_ulong)msr_me << MSR_ME) |
|
|
| 1100 |
((target_ulong)msr_fe0 << MSR_FE0) |
|
|
| 1101 |
((target_ulong)msr_se << MSR_SE) | /* SE / DWE / UBLE */
|
|
| 1102 |
((target_ulong)msr_be << MSR_BE) | /* BE / DE */
|
|
| 1103 |
((target_ulong)msr_fe1 << MSR_FE1) |
|
|
| 1104 |
((target_ulong)msr_al << MSR_AL) |
|
|
| 1105 |
((target_ulong)msr_ip << MSR_IP) |
|
|
| 1106 |
((target_ulong)msr_ir << MSR_IR) | /* IR / IS */
|
|
| 1107 |
((target_ulong)msr_dr << MSR_DR) | /* DR / DS */
|
|
| 1108 |
((target_ulong)msr_pe << MSR_PE) | /* PE / EP */
|
|
| 1109 |
((target_ulong)msr_px << MSR_PX) | /* PX / PMM */
|
|
| 1110 |
((target_ulong)msr_ri << MSR_RI) |
|
|
| 1111 |
((target_ulong)msr_le << MSR_LE);
|
|
| 1097 | 1112 |
} |
| 1098 | 1113 |
|
| 1099 | 1114 |
void do_store_msr (CPUPPCState *env, target_ulong value) |
| ... | ... | |
| 1156 | 1171 |
|
| 1157 | 1172 |
enter_pm = 0; |
| 1158 | 1173 |
switch (PPC_EXCP(env)) {
|
| 1174 |
case PPC_FLAGS_EXCP_603: |
|
| 1175 |
/* Don't handle SLEEP mode: we should disable all clocks... |
|
| 1176 |
* No dynamic power-management. |
|
| 1177 |
*/ |
|
| 1178 |
if (msr_pow == 1 && (env->spr[SPR_HID0] & 0x00C00000) != 0) |
|
| 1179 |
enter_pm = 1; |
|
| 1180 |
break; |
|
| 1181 |
case PPC_FLAGS_EXCP_604: |
|
| 1182 |
if (msr_pow == 1) |
|
| 1183 |
enter_pm = 1; |
|
| 1184 |
break; |
|
| 1159 | 1185 |
case PPC_FLAGS_EXCP_7x0: |
| 1160 | 1186 |
if (msr_pow == 1 && (env->spr[SPR_HID0] & 0x00E00000) != 0) |
| 1161 | 1187 |
enter_pm = 1; |
| ... | ... | |
| 1171 | 1197 |
} |
| 1172 | 1198 |
} |
| 1173 | 1199 |
|
| 1200 |
#if defined(TARGET_PPC64) |
|
| 1201 |
void ppc_store_msr_32 (CPUPPCState *env, target_ulong value) |
|
| 1202 |
{
|
|
| 1203 |
do_store_msr(env, (uint32_t)value); |
|
| 1204 |
} |
|
| 1205 |
#endif |
|
| 1206 |
|
|
| 1174 | 1207 |
void do_compute_hflags (CPUPPCState *env) |
| 1175 | 1208 |
{
|
| 1176 | 1209 |
/* Compute current hflags */ |
| 1177 | 1210 |
env->hflags = (msr_pr << MSR_PR) | (msr_le << MSR_LE) | |
| 1178 | 1211 |
(msr_fp << MSR_FP) | (msr_fe0 << MSR_FE0) | (msr_fe1 << MSR_FE1) | |
| 1179 |
(msr_vr << MSR_VR) | (msr_ap << MSR_AP) | (msr_sa << MSR_SA) |
|
|
| 1212 |
(msr_vr << MSR_VR) | (msr_ap << MSR_AP) | (msr_sa << MSR_SA) | |
|
| 1180 | 1213 |
(msr_se << MSR_SE) | (msr_be << MSR_BE); |
| 1181 | 1214 |
#if defined (TARGET_PPC64) |
| 1182 |
env->hflags |= (msr_sf << MSR_SF) | (msr_hv << MSR_HV);
|
|
| 1215 |
env->hflags |= (msr_sf << (MSR_SF - 32)) | (msr_hv << (MSR_HV - 32));
|
|
| 1183 | 1216 |
#endif |
| 1184 | 1217 |
} |
| 1185 | 1218 |
|
| ... | ... | |
| 1193 | 1226 |
#else /* defined (CONFIG_USER_ONLY) */ |
| 1194 | 1227 |
static void dump_syscall(CPUState *env) |
| 1195 | 1228 |
{
|
| 1196 |
fprintf(logfile, "syscall r0=0x%08x r3=0x%08x r4=0x%08x "
|
|
| 1197 |
"r5=0x%08x r6=0x%08x nip=0x%08x\n",
|
|
| 1229 |
fprintf(logfile, "syscall r0=0x" REGX " r3=0x" REGX " r4=0x" REGX
|
|
| 1230 |
" r5=0x" REGX " r6=0x" REGX " nip=0x" REGX "\n",
|
|
| 1198 | 1231 |
env->gpr[0], env->gpr[3], env->gpr[4], |
| 1199 | 1232 |
env->gpr[5], env->gpr[6], env->nip); |
| 1200 | 1233 |
} |
| b/target-ppc/op.c | ||
|---|---|---|
| 26 | 26 |
|
| 27 | 27 |
/* XXX: this is to be suppressed */ |
| 28 | 28 |
#define regs (env) |
| 29 |
#define Ts0 (int32_t)T0 |
|
| 30 |
#define Ts1 (int32_t)T1 |
|
| 31 |
#define Ts2 (int32_t)T2 |
|
| 32 | 29 |
|
| 33 | 30 |
#define FT0 (env->ft0) |
| 34 | 31 |
#define FT1 (env->ft1) |
| ... | ... | |
| 157 | 154 |
|
| 158 | 155 |
PPC_OP(set_T0) |
| 159 | 156 |
{
|
| 160 |
T0 = PARAM(1);
|
|
| 157 |
T0 = (uint32_t)PARAM1;
|
|
| 161 | 158 |
RETURN(); |
| 162 | 159 |
} |
| 163 | 160 |
|
| 161 |
#if defined(TARGET_PPC64) |
|
| 162 |
void OPPROTO op_set_T0_64 (void) |
|
| 163 |
{
|
|
| 164 |
T0 = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
|
| 165 |
RETURN(); |
|
| 166 |
} |
|
| 167 |
#endif |
|
| 168 |
|
|
| 164 | 169 |
PPC_OP(set_T1) |
| 165 | 170 |
{
|
| 166 |
T1 = PARAM(1); |
|
| 171 |
T1 = (uint32_t)PARAM1; |
|
| 172 |
RETURN(); |
|
| 173 |
} |
|
| 174 |
|
|
| 175 |
#if defined(TARGET_PPC64) |
|
| 176 |
void OPPROTO op_set_T1_64 (void) |
|
| 177 |
{
|
|
| 178 |
T1 = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
|
| 167 | 179 |
RETURN(); |
| 168 | 180 |
} |
| 181 |
#endif |
|
| 169 | 182 |
|
| 170 | 183 |
#if 0 // unused |
| 171 | 184 |
PPC_OP(set_T2) |
| ... | ... | |
| 181 | 194 |
RETURN(); |
| 182 | 195 |
} |
| 183 | 196 |
|
| 197 |
void OPPROTO op_move_T2_T0 (void) |
|
| 198 |
{
|
|
| 199 |
T2 = T0; |
|
| 200 |
RETURN(); |
|
| 201 |
} |
|
| 202 |
|
|
| 184 | 203 |
/* Generate exceptions */ |
| 185 | 204 |
PPC_OP(raise_exception_err) |
| 186 | 205 |
{
|
| ... | ... | |
| 189 | 208 |
|
| 190 | 209 |
PPC_OP(update_nip) |
| 191 | 210 |
{
|
| 192 |
env->nip = PARAM(1);
|
|
| 211 |
env->nip = (uint32_t)PARAM1;
|
|
| 193 | 212 |
RETURN(); |
| 194 | 213 |
} |
| 195 | 214 |
|
| 215 |
#if defined(TARGET_PPC64) |
|
| 216 |
void OPPROTO op_update_nip_64 (void) |
|
| 217 |
{
|
|
| 218 |
env->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
|
| 219 |
RETURN(); |
|
| 220 |
} |
|
| 221 |
#endif |
|
| 222 |
|
|
| 196 | 223 |
PPC_OP(debug) |
| 197 | 224 |
{
|
| 198 | 225 |
do_raise_exception(EXCP_DEBUG); |
| 199 | 226 |
} |
| 200 | 227 |
|
| 201 |
|
|
| 202 | 228 |
PPC_OP(exit_tb) |
| 203 | 229 |
{
|
| 204 | 230 |
EXIT_TB(); |
| ... | ... | |
| 293 | 319 |
RETURN(); |
| 294 | 320 |
} |
| 295 | 321 |
|
| 322 |
#if defined (TARGET_PPC64) |
|
| 323 |
void OPPROTO op_load_asr (void) |
|
| 324 |
{
|
|
| 325 |
T0 = env->asr; |
|
| 326 |
RETURN(); |
|
| 327 |
} |
|
| 328 |
|
|
| 329 |
void OPPROTO op_store_asr (void) |
|
| 330 |
{
|
|
| 331 |
ppc_store_asr(env, T0); |
|
| 332 |
RETURN(); |
|
| 333 |
} |
|
| 334 |
#endif |
|
| 335 |
|
|
| 296 | 336 |
PPC_OP(load_msr) |
| 297 | 337 |
{
|
| 298 | 338 |
T0 = do_load_msr(env); |
| ... | ... | |
| 304 | 344 |
do_store_msr(env, T0); |
| 305 | 345 |
RETURN(); |
| 306 | 346 |
} |
| 347 |
|
|
| 348 |
#if defined (TARGET_PPC64) |
|
| 349 |
void OPPROTO op_store_msr_32 (void) |
|
| 350 |
{
|
|
| 351 |
ppc_store_msr_32(env, T0); |
|
| 352 |
RETURN(); |
|
| 353 |
} |
|
| 354 |
#endif |
|
| 307 | 355 |
#endif |
| 308 | 356 |
|
| 309 | 357 |
/* SPR */ |
| ... | ... | |
| 459 | 507 |
|
| 460 | 508 |
PPC_OP(setcrfbit) |
| 461 | 509 |
{
|
| 462 |
T1 = (T1 & PARAM(1)) | (T0 << PARAM(2));
|
|
| 510 |
T1 = (T1 & PARAM(1)) | (T0 << PARAM(2)); |
|
| 463 | 511 |
RETURN(); |
| 464 | 512 |
} |
| 465 | 513 |
|
| ... | ... | |
| 468 | 516 |
|
| 469 | 517 |
PPC_OP(setlr) |
| 470 | 518 |
{
|
| 471 |
regs->lr = PARAM1; |
|
| 519 |
regs->lr = (uint32_t)PARAM1;
|
|
| 472 | 520 |
RETURN(); |
| 473 | 521 |
} |
| 474 | 522 |
|
| 523 |
#if defined (TARGET_PPC64) |
|
| 524 |
void OPPROTO op_setlr_64 (void) |
|
| 525 |
{
|
|
| 526 |
regs->lr = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
|
| 527 |
RETURN(); |
|
| 528 |
} |
|
| 529 |
#endif |
|
| 530 |
|
|
| 475 | 531 |
PPC_OP(goto_tb0) |
| 476 | 532 |
{
|
| 477 | 533 |
GOTO_TB(op_goto_tb0, PARAM1, 0); |
| ... | ... | |
| 482 | 538 |
GOTO_TB(op_goto_tb1, PARAM1, 1); |
| 483 | 539 |
} |
| 484 | 540 |
|
| 485 |
PPC_OP(b_T1)
|
|
| 541 |
void OPPROTO op_b_T1 (void)
|
|
| 486 | 542 |
{
|
| 487 |
regs->nip = T1 & ~3;
|
|
| 543 |
regs->nip = (uint32_t)(T1 & ~3);
|
|
| 488 | 544 |
RETURN(); |
| 489 | 545 |
} |
| 490 | 546 |
|
| 547 |
#if defined (TARGET_PPC64) |
|
| 548 |
void OPPROTO op_b_T1_64 (void) |
|
| 549 |
{
|
|
| 550 |
regs->nip = (uint64_t)(T1 & ~3); |
|
| 551 |
RETURN(); |
|
| 552 |
} |
|
| 553 |
#endif |
|
| 554 |
|
|
| 491 | 555 |
PPC_OP(jz_T0) |
| 492 | 556 |
{
|
| 493 | 557 |
if (!T0) |
| ... | ... | |
| 495 | 559 |
RETURN(); |
| 496 | 560 |
} |
| 497 | 561 |
|
| 498 |
PPC_OP(btest_T1)
|
|
| 562 |
void OPPROTO op_btest_T1 (void)
|
|
| 499 | 563 |
{
|
| 500 | 564 |
if (T0) {
|
| 501 |
regs->nip = T1 & ~3;
|
|
| 565 |
regs->nip = (uint32_t)(T1 & ~3);
|
|
| 502 | 566 |
} else {
|
| 503 |
regs->nip = PARAM1; |
|
| 567 |
regs->nip = (uint32_t)PARAM1;
|
|
| 504 | 568 |
} |
| 505 | 569 |
RETURN(); |
| 506 | 570 |
} |
| 507 | 571 |
|
| 572 |
#if defined (TARGET_PPC64) |
|
| 573 |
void OPPROTO op_btest_T1_64 (void) |
|
| 574 |
{
|
|
| 575 |
if (T0) {
|
|
| 576 |
regs->nip = (uint64_t)(T1 & ~3); |
|
| 577 |
} else {
|
|
| 578 |
regs->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
|
| 579 |
} |
|
| 580 |
RETURN(); |
|
| 581 |
} |
|
| 582 |
#endif |
|
| 583 |
|
|
| 508 | 584 |
PPC_OP(movl_T1_ctr) |
| 509 | 585 |
{
|
| 510 | 586 |
T1 = regs->ctr; |
| ... | ... | |
| 518 | 594 |
} |
| 519 | 595 |
|
| 520 | 596 |
/* tests with result in T0 */ |
| 597 |
void OPPROTO op_test_ctr (void) |
|
| 598 |
{
|
|
| 599 |
T0 = (uint32_t)regs->ctr; |
|
| 600 |
RETURN(); |
|
| 601 |
} |
|
| 521 | 602 |
|
| 522 |
PPC_OP(test_ctr) |
|
| 603 |
#if defined(TARGET_PPC64) |
|
| 604 |
void OPPROTO op_test_ctr_64 (void) |
|
| 523 | 605 |
{
|
| 524 |
T0 = regs->ctr; |
|
| 606 |
T0 = (uint64_t)regs->ctr; |
|
| 607 |
RETURN(); |
|
| 608 |
} |
|
| 609 |
#endif |
|
| 610 |
|
|
| 611 |
void OPPROTO op_test_ctr_true (void) |
|
| 612 |
{
|
|
| 613 |
T0 = ((uint32_t)regs->ctr != 0 && (T0 & PARAM1) != 0); |
|
| 525 | 614 |
RETURN(); |
| 526 | 615 |
} |
| 527 | 616 |
|
| 528 |
PPC_OP(test_ctr_true) |
|
| 617 |
#if defined(TARGET_PPC64) |
|
| 618 |
void OPPROTO op_test_ctr_true_64 (void) |
|
| 529 | 619 |
{
|
| 530 |
T0 = (regs->ctr != 0 && (T0 & PARAM(1)) != 0);
|
|
| 620 |
T0 = ((uint64_t)regs->ctr != 0 && (T0 & PARAM1) != 0);
|
|
| 531 | 621 |
RETURN(); |
| 532 | 622 |
} |
| 623 |
#endif |
|
| 533 | 624 |
|
| 534 |
PPC_OP(test_ctr_false)
|
|
| 625 |
void OPPROTO op_test_ctr_false (void)
|
|
| 535 | 626 |
{
|
| 536 |
T0 = (regs->ctr != 0 && (T0 & PARAM(1)) == 0);
|
|
| 627 |
T0 = ((uint32_t)regs->ctr != 0 && (T0 & PARAM1) == 0);
|
|
| 537 | 628 |
RETURN(); |
| 538 | 629 |
} |
| 539 | 630 |
|
| 540 |
PPC_OP(test_ctrz) |
|
| 631 |
#if defined(TARGET_PPC64) |
|
| 632 |
void OPPROTO op_test_ctr_false_64 (void) |
|
| 541 | 633 |
{
|
| 542 |
T0 = (regs->ctr == 0);
|
|
| 634 |
T0 = ((uint64_t)regs->ctr != 0 && (T0 & PARAM1) == 0);
|
|
| 543 | 635 |
RETURN(); |
| 544 | 636 |
} |
| 637 |
#endif |
|
| 638 |
|
|
| 639 |
void OPPROTO op_test_ctrz (void) |
|
| 640 |
{
|
|
| 641 |
T0 = ((uint32_t)regs->ctr == 0); |
|
| 642 |
RETURN(); |
|
| 643 |
} |
|
| 644 |
|
|
| 645 |
#if defined(TARGET_PPC64) |
|
| 646 |
void OPPROTO op_test_ctrz_64 (void) |
|
| 647 |
{
|
|
| 648 |
T0 = ((uint64_t)regs->ctr == 0); |
|
| 649 |
RETURN(); |
|
| 650 |
} |
|
| 651 |
#endif |
|
| 652 |
|
|
| 653 |
void OPPROTO op_test_ctrz_true (void) |
|
| 654 |
{
|
|
| 655 |
T0 = ((uint32_t)regs->ctr == 0 && (T0 & PARAM1) != 0); |
|
| 656 |
RETURN(); |
|
| 657 |
} |
|
| 658 |
|
|
| 659 |
#if defined(TARGET_PPC64) |
|
| 660 |
void OPPROTO op_test_ctrz_true_64 (void) |
|
| 661 |
{
|
|
| 662 |
T0 = ((uint64_t)regs->ctr == 0 && (T0 & PARAM1) != 0); |
|
| 663 |
RETURN(); |
|
| 664 |
} |
|
| 665 |
#endif |
|
| 545 | 666 |
|
| 546 |
PPC_OP(test_ctrz_true)
|
|
| 667 |
void OPPROTO op_test_ctrz_false (void)
|
|
| 547 | 668 |
{
|
| 548 |
T0 = (regs->ctr == 0 && (T0 & PARAM(1)) != 0);
|
|
| 669 |
T0 = ((uint32_t)regs->ctr == 0 && (T0 & PARAM1) == 0);
|
|
| 549 | 670 |
RETURN(); |
| 550 | 671 |
} |
| 551 | 672 |
|
| 552 |
PPC_OP(test_ctrz_false) |
|
| 673 |
#if defined(TARGET_PPC64) |
|
| 674 |
void OPPROTO op_test_ctrz_false_64 (void) |
|
| 553 | 675 |
{
|
| 554 |
T0 = (regs->ctr == 0 && (T0 & PARAM(1)) == 0);
|
|
| 676 |
T0 = ((uint64_t)regs->ctr == 0 && (T0 & PARAM1) == 0);
|
|
| 555 | 677 |
RETURN(); |
| 556 | 678 |
} |
| 679 |
#endif |
|
| 557 | 680 |
|
| 558 | 681 |
PPC_OP(test_true) |
| 559 | 682 |
{
|
| ... | ... | |
| 582 | 705 |
RETURN(); |
| 583 | 706 |
} |
| 584 | 707 |
|
| 585 |
void OPPROTO op_addo (void) |
|
| 708 |
void OPPROTO op_check_addo (void)
|
|
| 586 | 709 |
{
|
| 587 |
do_addo(); |
|
| 588 |
RETURN(); |
|
| 710 |
if (likely(!(((uint32_t)T2 ^ (uint32_t)T1 ^ UINT32_MAX) & |
|
| 711 |
((uint32_t)T2 ^ (uint32_t)T0) & (1UL << 31)))) {
|
|
| 712 |
xer_ov = 0; |
|
| 713 |
} else {
|
|
| 714 |
xer_so = 1; |
|
| 715 |
xer_ov = 1; |
|
| 716 |
} |
|
| 589 | 717 |
} |
| 590 | 718 |
|
| 591 |
/* add carrying */
|
|
| 592 |
PPC_OP(addc)
|
|
| 719 |
#if defined(TARGET_PPC64)
|
|
| 720 |
void OPPROTO op_check_addo_64 (void)
|
|
| 593 | 721 |
{
|
| 594 |
T2 = T0; |
|
| 595 |
T0 += T1; |
|
| 596 |
if (T0 < T2) {
|
|
| 597 |
xer_ca = 1; |
|
| 722 |
if (likely(!(((uint64_t)T2 ^ (uint64_t)T1 ^ UINT64_MAX) & |
|
| 723 |
((uint64_t)T2 ^ (uint64_t)T0) & (1UL << 63)))) {
|
|
| 724 |
xer_ov = 0; |
|
| 598 | 725 |
} else {
|
| 726 |
xer_so = 1; |
|
| 727 |
xer_ov = 1; |
|
| 728 |
} |
|
| 729 |
} |
|
| 730 |
#endif |
|
| 731 |
|
|
| 732 |
/* add carrying */ |
|
| 733 |
void OPPROTO op_check_addc (void) |
|
| 734 |
{
|
|
| 735 |
if (likely((uint32_t)T0 >= (uint32_t)T2)) {
|
|
| 599 | 736 |
xer_ca = 0; |
| 737 |
} else {
|
|
| 738 |
xer_ca = 1; |
|
| 600 | 739 |
} |
| 601 | 740 |
RETURN(); |
| 602 | 741 |
} |
| 603 | 742 |
|
| 604 |
void OPPROTO op_addco (void) |
|
| 743 |
#if defined(TARGET_PPC64) |
|
| 744 |
void OPPROTO op_check_addc_64 (void) |
|
| 605 | 745 |
{
|
| 606 |
do_addco(); |
|
| 746 |
if (likely((uint64_t)T0 >= (uint64_t)T2)) {
|
|
| 747 |
xer_ca = 0; |
|
| 748 |
} else {
|
|
| 749 |
xer_ca = 1; |
|
| 750 |
} |
|
| 607 | 751 |
RETURN(); |
| 608 | 752 |
} |
| 753 |
#endif |
|
| 609 | 754 |
|
| 610 | 755 |
/* add extended */ |
| 611 | 756 |
void OPPROTO op_adde (void) |
| ... | ... | |
| 614 | 759 |
RETURN(); |
| 615 | 760 |
} |
| 616 | 761 |
|
| 617 |
PPC_OP(addeo) |
|
| 762 |
#if defined(TARGET_PPC64) |
|
| 763 |
void OPPROTO op_adde_64 (void) |
|
| 618 | 764 |
{
|
| 619 |
do_addeo();
|
|
| 765 |
do_adde_64();
|
|
| 620 | 766 |
RETURN(); |
| 621 | 767 |
} |
| 768 |
#endif |
|
| 622 | 769 |
|
| 623 | 770 |
/* add immediate */ |
| 624 | 771 |
PPC_OP(addi) |
| ... | ... | |
| 627 | 774 |
RETURN(); |
| 628 | 775 |
} |
| 629 | 776 |
|
| 630 |
/* add immediate carrying */
|
|
| 631 |
PPC_OP(addic)
|
|
| 777 |
/* add to minus one extended */
|
|
| 778 |
void OPPROTO op_add_me (void)
|
|
| 632 | 779 |
{
|
| 633 |
T1 = T0; |
|
| 634 |
T0 += PARAM(1); |
|
| 635 |
if (T0 < T1) {
|
|
| 780 |
T0 += xer_ca + (-1); |
|
| 781 |
if (likely((uint32_t)T1 != 0)) |
|
| 636 | 782 |
xer_ca = 1; |
| 637 |
} else {
|
|
| 638 |
xer_ca = 0; |
|
| 639 |
} |
|
| 640 | 783 |
RETURN(); |
| 641 | 784 |
} |
| 642 | 785 |
|
| 643 |
/* add to minus one extended */
|
|
| 644 |
PPC_OP(addme)
|
|
| 786 |
#if defined(TARGET_PPC64)
|
|
| 787 |
void OPPROTO op_add_me_64 (void)
|
|
| 645 | 788 |
{
|
| 646 |
T1 = T0; |
|
| 647 | 789 |
T0 += xer_ca + (-1); |
| 648 |
if (T1 != 0)
|
|
| 790 |
if (likely((uint64_t)T1 != 0))
|
|
| 649 | 791 |
xer_ca = 1; |
| 650 | 792 |
RETURN(); |
| 651 | 793 |
} |
| 794 |
#endif |
|
| 652 | 795 |
|
| 653 | 796 |
void OPPROTO op_addmeo (void) |
| 654 | 797 |
{
|
| ... | ... | |
| 656 | 799 |
RETURN(); |
| 657 | 800 |
} |
| 658 | 801 |
|
| 802 |
void OPPROTO op_addmeo_64 (void) |
|
| 803 |
{
|
|
| 804 |
do_addmeo(); |
|
| 805 |
RETURN(); |
|
| 806 |
} |
|
| 807 |
|
|
| 659 | 808 |
/* add to zero extended */ |
| 660 |
PPC_OP(addze)
|
|
| 809 |
void OPPROTO op_add_ze (void)
|
|
| 661 | 810 |
{
|
| 662 |
T1 = T0; |
|
| 663 | 811 |
T0 += xer_ca; |
| 664 |
if (T0 < T1) {
|
|
| 665 |
xer_ca = 1; |
|
| 666 |
} else {
|
|
| 667 |
xer_ca = 0; |
|
| 668 |
} |
|
| 669 | 812 |
RETURN(); |
| 670 | 813 |
} |
| 671 | 814 |
|
| 672 |
void OPPROTO op_addzeo (void) |
|
| 815 |
/* divide word */ |
|
| 816 |
void OPPROTO op_divw (void) |
|
| 673 | 817 |
{
|
| 674 |
do_addzeo(); |
|
| 818 |
if (unlikely(((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || |
|
| 819 |
(int32_t)T1 == 0)) {
|
|
| 820 |
T0 = (int32_t)((-1) * ((uint32_t)T0 >> 31)); |
|
| 821 |
} else {
|
|
| 822 |
T0 = (int32_t)T0 / (int32_t)T1; |
|
| 823 |
} |
|
| 675 | 824 |
RETURN(); |
| 676 | 825 |
} |
| 677 | 826 |
|
| 678 |
/* divide word */
|
|
| 679 |
PPC_OP(divw)
|
|
| 827 |
#if defined(TARGET_PPC64)
|
|
| 828 |
void OPPROTO op_divd (void)
|
|
| 680 | 829 |
{
|
| 681 |
if ((Ts0 == INT32_MIN && Ts1 == -1) || Ts1 == 0) {
|
|
| 682 |
T0 = (int32_t)((-1) * (T0 >> 31)); |
|
| 830 |
if (unlikely(((int64_t)T0 == INT64_MIN && (int64_t)T1 == -1) || |
|
| 831 |
(int64_t)T1 == 0)) {
|
|
| 832 |
T0 = (int64_t)((-1ULL) * ((uint64_t)T0 >> 63)); |
|
| 683 | 833 |
} else {
|
| 684 |
T0 = (Ts0 / Ts1);
|
|
| 834 |
T0 = (int64_t)T0 / (int64_t)T1;
|
|
| 685 | 835 |
} |
| 686 | 836 |
RETURN(); |
| 687 | 837 |
} |
| 838 |
#endif |
|
| 688 | 839 |
|
| 689 | 840 |
void OPPROTO op_divwo (void) |
| 690 | 841 |
{
|
| ... | ... | |
| 692 | 843 |
RETURN(); |
| 693 | 844 |
} |
| 694 | 845 |
|
| 846 |
#if defined(TARGET_PPC64) |
|
| 847 |
void OPPROTO op_divdo (void) |
|
| 848 |
{
|
|
| 849 |
do_divdo(); |
|
| 850 |
RETURN(); |
|
| 851 |
} |
|
| 852 |
#endif |
|
| 853 |
|
|
| 695 | 854 |
/* divide word unsigned */ |
| 696 |
PPC_OP(divwu) |
|
| 855 |
void OPPROTO op_divwu (void) |
|
| 856 |
{
|
|
| 857 |
if (unlikely(T1 == 0)) {
|
|
| 858 |
T0 = 0; |
|
| 859 |
} else {
|
|
| 860 |
T0 = (uint32_t)T0 / (uint32_t)T1; |
|
| 861 |
} |
|
| 862 |
RETURN(); |
|
| 863 |
} |
|
| 864 |
|
|
| 865 |
#if defined(TARGET_PPC64) |
|
| 866 |
void OPPROTO op_divdu (void) |
|
| 697 | 867 |
{
|
| 698 |
if (T1 == 0) {
|
|
| 868 |
if (unlikely(T1 == 0)) {
|
|
| 699 | 869 |
T0 = 0; |
| 700 | 870 |
} else {
|
| 701 | 871 |
T0 /= T1; |
| 702 | 872 |
} |
| 703 | 873 |
RETURN(); |
| 704 | 874 |
} |
| 875 |
#endif |
|
| 705 | 876 |
|
| 706 | 877 |
void OPPROTO op_divwuo (void) |
| 707 | 878 |
{
|
| ... | ... | |
| 709 | 880 |
RETURN(); |
| 710 | 881 |
} |
| 711 | 882 |
|
| 883 |
#if defined(TARGET_PPC64) |
|
| 884 |
void OPPROTO op_divduo (void) |
|
| 885 |
{
|
|
| 886 |
do_divduo(); |
|
| 887 |
RETURN(); |
|
| 888 |
} |
|
| 889 |
#endif |
|
| 890 |
|
|
| 712 | 891 |
/* multiply high word */ |
| 713 |
PPC_OP(mulhw)
|
|
| 892 |
void OPPROTO op_mulhw (void)
|
|
| 714 | 893 |
{
|
| 715 |
T0 = ((int64_t)Ts0 * (int64_t)Ts1) >> 32;
|
|
| 894 |
T0 = ((int64_t)((int32_t)T0) * (int64_t)((int32_t)T1)) >> 32;
|
|
| 716 | 895 |
RETURN(); |
| 717 | 896 |
} |
| 718 | 897 |
|
| 898 |
#if defined(TARGET_PPC64) |
|
| 899 |
void OPPROTO op_mulhd (void) |
|
| 900 |
{
|
|
| 901 |
uint64_t tl, th; |
|
| 902 |
|
|
| 903 |
do_imul64(&tl, &th); |
|
| 904 |
T0 = th; |
|
| 905 |
RETURN(); |
|
| 906 |
} |
|
| 907 |
#endif |
|
| 908 |
|
|
| 719 | 909 |
/* multiply high word unsigned */ |
| 720 |
PPC_OP(mulhwu)
|
|
| 910 |
void OPPROTO op_mulhwu (void)
|
|
| 721 | 911 |
{
|
| 722 |
T0 = ((uint64_t)T0 * (uint64_t)T1) >> 32;
|
|
| 912 |
T0 = ((uint64_t)(uint32_t)T0 * (uint64_t)(uint32_t)T1) >> 32;
|
|
| 723 | 913 |
RETURN(); |
| 724 | 914 |
} |
| 725 | 915 |
|
| 916 |
#if defined(TARGET_PPC64) |
|
| 917 |
void OPPROTO op_mulhdu (void) |
|
| 918 |
{
|
|
| 919 |
uint64_t tl, th; |
|
| 920 |
|
|
| 921 |
do_mul64(&tl, &th); |
|
| 922 |
T0 = th; |
|
| 923 |
RETURN(); |
|
| 924 |
} |
|
| 925 |
#endif |
|
| 926 |
|
|
| 726 | 927 |
/* multiply low immediate */ |
| 727 | 928 |
PPC_OP(mulli) |
| 728 | 929 |
{
|
| 729 |
T0 = (Ts0 * SPARAM(1));
|
|
| 930 |
T0 = ((int32_t)T0 * (int32_t)PARAM1);
|
|
| 730 | 931 |
RETURN(); |
| 731 | 932 |
} |
| 732 | 933 |
|
| 733 | 934 |
/* multiply low word */ |
| 734 | 935 |
PPC_OP(mullw) |
| 735 | 936 |
{
|
| 937 |
T0 = (int32_t)(T0 * T1); |
|
| 938 |
RETURN(); |
|
| 939 |
} |
|
| 940 |
|
|
| 941 |
#if defined(TARGET_PPC64) |
|
| 942 |
void OPPROTO op_mulld (void) |
|
| 943 |
{
|
|
| 736 | 944 |
T0 *= T1; |
| 737 | 945 |
RETURN(); |
| 738 | 946 |
} |
| 947 |
#endif |
|
| 739 | 948 |
|
| 740 | 949 |
void OPPROTO op_mullwo (void) |
| 741 | 950 |
{
|
| ... | ... | |
| 743 | 952 |
RETURN(); |
| 744 | 953 |
} |
| 745 | 954 |
|
| 955 |
#if defined(TARGET_PPC64) |
|
| 956 |
void OPPROTO op_mulldo (void) |
|
| 957 |
{
|
|
| 958 |
do_mulldo(); |
|
| 959 |
RETURN(); |
|
| 960 |
} |
|
| 961 |
#endif |
|
| 962 |
|
|
| 746 | 963 |
/* negate */ |
| 747 |
PPC_OP(neg)
|
|
| 964 |
void OPPROTO op_neg (void)
|
|
| 748 | 965 |
{
|
| 749 |
if (T0 != 0x80000000) {
|
|
| 750 |
T0 = -Ts0;
|
|
| 966 |
if (likely(T0 != INT32_MIN)) {
|
|
| 967 |
T0 = -(int32_t)T0;
|
|
| 751 | 968 |
} |
| 752 | 969 |
RETURN(); |
| 753 | 970 |
} |
| 754 | 971 |
|
| 972 |
#if defined(TARGET_PPC64) |
|
| 973 |
void OPPROTO op_neg_64 (void) |
|
| 974 |
{
|
|
| 975 |
if (likely(T0 != INT64_MIN)) {
|
|
| 976 |
T0 = -(int64_t)T0; |
|
| 977 |
} |
|
| 978 |
RETURN(); |
|
| 979 |
} |
|
| 980 |
#endif |
|
| 981 |
|
|
| 755 | 982 |
void OPPROTO op_nego (void) |
| 756 | 983 |
{
|
| 757 | 984 |
do_nego(); |
| 758 | 985 |
RETURN(); |
| 759 | 986 |
} |
| 760 | 987 |
|
| 988 |
#if defined(TARGET_PPC64) |
|
| 989 |
void OPPROTO op_nego_64 (void) |
|
| 990 |
{
|
|
| 991 |
do_nego_64(); |
|
| 992 |
RETURN(); |
|
| 993 |
} |
|
| 994 |
#endif |
|
| 995 |
|
|
| 761 | 996 |
/* substract from */ |
| 762 | 997 |
PPC_OP(subf) |
| 763 | 998 |
{
|
| ... | ... | |
| 765 | 1000 |
RETURN(); |
| 766 | 1001 |
} |
| 767 | 1002 |
|
| 768 |
void OPPROTO op_subfo (void) |
|
| 1003 |
void OPPROTO op_check_subfo (void) |
|
| 1004 |
{
|
|
| 1005 |
if (likely(!(((uint32_t)(~T2) ^ (uint32_t)T1 ^ UINT32_MAX) & |
|
| 1006 |
((uint32_t)(~T2) ^ (uint32_t)T0) & (1UL << 31)))) {
|
|
| 1007 |
xer_ov = 0; |
|
| 1008 |
} else {
|
|
| 1009 |
xer_so = 1; |
|
| 1010 |
xer_ov = 1; |
|
| 1011 |
} |
|
| 1012 |
RETURN(); |
|
| 1013 |
} |
|
| 1014 |
|
|
| 1015 |
#if defined(TARGET_PPC64) |
|
| 1016 |
void OPPROTO op_check_subfo_64 (void) |
|
| 769 | 1017 |
{
|
| 770 |
do_subfo(); |
|
| 1018 |
if (likely(!(((uint64_t)(~T2) ^ (uint64_t)T1 ^ UINT64_MAX) & |
|
| 1019 |
((uint64_t)(~T2) ^ (uint64_t)T0) & (1ULL << 63)))) {
|
|
| 1020 |
xer_ov = 0; |
|
| 1021 |
} else {
|
|
| 1022 |
xer_so = 1; |
|
| 1023 |
xer_ov = 1; |
|
| 1024 |
} |
|
| 771 | 1025 |
RETURN(); |
| 772 | 1026 |
} |
| 1027 |
#endif |
|
| 773 | 1028 |
|
| 774 | 1029 |
/* substract from carrying */ |
| 775 |
PPC_OP(subfc)
|
|
| 1030 |
void OPPROTO op_check_subfc (void)
|
|
| 776 | 1031 |
{
|
| 777 |
T0 = T1 - T0; |
|
| 778 |
if (T0 <= T1) {
|
|
| 779 |
xer_ca = 1; |
|
| 780 |
} else {
|
|
| 1032 |
if (likely((uint32_t)T0 > (uint32_t)T1)) {
|
|
| 781 | 1033 |
xer_ca = 0; |
| 1034 |
} else {
|
|
| 1035 |
xer_ca = 1; |
|
| 782 | 1036 |
} |
| 783 | 1037 |
RETURN(); |
| 784 | 1038 |
} |
| 785 | 1039 |
|
| 786 |
void OPPROTO op_subfco (void) |
|
| 1040 |
#if defined(TARGET_PPC64) |
|
| 1041 |
void OPPROTO op_check_subfc_64 (void) |
|
| 787 | 1042 |
{
|
| 788 |
do_subfco(); |
|
| 1043 |
if (likely((uint64_t)T0 > (uint64_t)T1)) {
|
|
| 1044 |
xer_ca = 0; |
|
| 1045 |
} else {
|
|
| 1046 |
xer_ca = 1; |
|
| 1047 |
} |
|
| 789 | 1048 |
RETURN(); |
| 790 | 1049 |
} |
| 1050 |
#endif |
|
| 791 | 1051 |
|
| 792 | 1052 |
/* substract from extended */ |
| 793 | 1053 |
void OPPROTO op_subfe (void) |
| ... | ... | |
| 796 | 1056 |
RETURN(); |
| 797 | 1057 |
} |
| 798 | 1058 |
|
| 799 |
PPC_OP(subfeo) |
|
| 1059 |
#if defined(TARGET_PPC64) |
|
| 1060 |
void OPPROTO op_subfe_64 (void) |
|
| 800 | 1061 |
{
|
| 801 |
do_subfeo();
|
|
| 1062 |
do_subfe_64();
|
|
| 802 | 1063 |
RETURN(); |
| 803 | 1064 |
} |
| 1065 |
#endif |
|
| 804 | 1066 |
|
| 805 | 1067 |
/* substract from immediate carrying */ |
| 806 |
PPC_OP(subfic)
|
|
| 1068 |
void OPPROTO op_subfic (void)
|
|
| 807 | 1069 |
{
|
| 808 |
T0 = PARAM(1) + ~T0 + 1;
|
|
| 809 |
if (T0 <= PARAM(1)) {
|
|
| 1070 |
T0 = PARAM1 + ~T0 + 1;
|
|
| 1071 |
if ((uint32_t)T0 <= (uint32_t)PARAM1) {
|
|
| 810 | 1072 |
xer_ca = 1; |
| 811 | 1073 |
} else {
|
| 812 | 1074 |
xer_ca = 0; |
| ... | ... | |
| 814 | 1076 |
RETURN(); |
| 815 | 1077 |
} |
| 816 | 1078 |
|
| 1079 |
#if defined(TARGET_PPC64) |
|
| 1080 |
void OPPROTO op_subfic_64 (void) |
|
| 1081 |
{
|
|
| 1082 |
T0 = PARAM1 + ~T0 + 1; |
|
| 1083 |
if ((uint64_t)T0 <= (uint64_t)PARAM1) {
|
|
| 1084 |
xer_ca = 1; |
|
| 1085 |
} else {
|
|
| 1086 |
xer_ca = 0; |
|
| 1087 |
} |
|
| 1088 |
RETURN(); |
|
| 1089 |
} |
|
| 1090 |
#endif |
|
| 1091 |
|
|
| 817 | 1092 |
/* substract from minus one extended */ |
| 818 |
PPC_OP(subfme)
|
|
| 1093 |
void OPPROTO op_subfme (void)
|
|
| 819 | 1094 |
{
|
| 820 | 1095 |
T0 = ~T0 + xer_ca - 1; |
| 1096 |
if (likely((uint32_t)T0 != (uint32_t)-1)) |
|
| 1097 |
xer_ca = 1; |
|
| 1098 |
RETURN(); |
|
| 1099 |
} |
|
| 821 | 1100 |
|
| 822 |
if (T0 != -1) |
|
| 1101 |
#if defined(TARGET_PPC64) |
|
| 1102 |
void OPPROTO op_subfme_64 (void) |
|
| 1103 |
{
|
|
| 1104 |
T0 = ~T0 + xer_ca - 1; |
|
| 1105 |
if (likely((uint64_t)T0 != (uint64_t)-1)) |
|
| 823 | 1106 |
xer_ca = 1; |
| 824 | 1107 |
RETURN(); |
| 825 | 1108 |
} |
| 1109 |
#endif |
|
| 826 | 1110 |
|
| 827 | 1111 |
void OPPROTO op_subfmeo (void) |
| 828 | 1112 |
{
|
| ... | ... | |
| 830 | 1114 |
RETURN(); |
| 831 | 1115 |
} |
| 832 | 1116 |
|
| 1117 |
#if defined(TARGET_PPC64) |
|
| 1118 |
void OPPROTO op_subfmeo_64 (void) |
|
| 1119 |
{
|
|
| 1120 |
do_subfmeo_64(); |
|
| 1121 |
RETURN(); |
|
| 1122 |
} |
|
| 1123 |
#endif |
|
| 1124 |
|
|
| 833 | 1125 |
/* substract from zero extended */ |
| 834 |
PPC_OP(subfze)
|
|
| 1126 |
void OPPROTO op_subfze (void)
|
|
| 835 | 1127 |
{
|
| 836 | 1128 |
T1 = ~T0; |
| 837 | 1129 |
T0 = T1 + xer_ca; |
| 838 |
if (T0 < T1) {
|
|
| 1130 |
if ((uint32_t)T0 < (uint32_t)T1) {
|
|
| 839 | 1131 |
xer_ca = 1; |
| 840 | 1132 |
} else {
|
| 841 | 1133 |
xer_ca = 0; |
| ... | ... | |
| 843 | 1135 |
RETURN(); |
| 844 | 1136 |
} |
| 845 | 1137 |
|
| 1138 |
#if defined(TARGET_PPC64) |
|
| 1139 |
void OPPROTO op_subfze_64 (void) |
|
| 1140 |
{
|
|
| 1141 |
T1 = ~T0; |
|
| 1142 |
T0 = T1 + xer_ca; |
|
| 1143 |
if ((uint64_t)T0 < (uint64_t)T1) {
|
|
| 1144 |
xer_ca = 1; |
|
| 1145 |
} else {
|
|
| 1146 |
xer_ca = 0; |
|
| 1147 |
} |
|
| 1148 |
RETURN(); |
|
| 1149 |
} |
|
| 1150 |
#endif |
|
| 1151 |
|
|
| 846 | 1152 |
void OPPROTO op_subfzeo (void) |
| 847 | 1153 |
{
|
| 848 | 1154 |
do_subfzeo(); |
| 849 | 1155 |
RETURN(); |
| 850 | 1156 |
} |
| 851 | 1157 |
|
| 1158 |
#if defined(TARGET_PPC64) |
|
| 1159 |
void OPPROTO op_subfzeo_64 (void) |
|
| 1160 |
{
|
|
| 1161 |
do_subfzeo_64(); |
|
| 1162 |
RETURN(); |
|
| 1163 |
} |
|
| 1164 |
#endif |
|
| 1165 |
|
|
| 852 | 1166 |
/*** Integer comparison ***/ |
| 853 | 1167 |
/* compare */ |
| 854 |
PPC_OP(cmp) |
|
| 1168 |
void OPPROTO op_cmp (void) |
|
| 1169 |
{
|
|
| 1170 |
if ((int32_t)T0 < (int32_t)T1) {
|
|
| 1171 |
T0 = 0x08; |
|
| 1172 |
} else if ((int32_t)T0 > (int32_t)T1) {
|
|
| 1173 |
T0 = 0x04; |
|
| 1174 |
} else {
|
|
| 1175 |
T0 = 0x02; |
|
| 1176 |
} |
|
| 1177 |
RETURN(); |
|
| 1178 |
} |
|
| 1179 |
|
|
| 1180 |
#if defined(TARGET_PPC64) |
|
| 1181 |
void OPPROTO op_cmp_64 (void) |
|
| 855 | 1182 |
{
|
| 856 |
if (Ts0 < Ts1) {
|
|
| 1183 |
if ((int64_t)T0 < (int64_t)T1) {
|
|
| 857 | 1184 |
T0 = 0x08; |
| 858 |
} else if (Ts0 > Ts1) {
|
|
| 1185 |
} else if ((int64_t)T0 > (int64_t)T1) {
|
|
| 859 | 1186 |
T0 = 0x04; |
| 860 | 1187 |
} else {
|
| 861 | 1188 |
T0 = 0x02; |
| 862 | 1189 |
} |
| 863 | 1190 |
RETURN(); |
| 864 | 1191 |
} |
| 1192 |
#endif |
|
| 865 | 1193 |
|
| 866 | 1194 |
/* compare immediate */ |
| 867 |
PPC_OP(cmpi)
|
|
| 1195 |
void OPPROTO op_cmpi (void)
|
|
| 868 | 1196 |
{
|
| 869 |
if (Ts0 < SPARAM(1)) {
|
|
| 1197 |
if ((int32_t)T0 < (int32_t)PARAM1) {
|
|
| 870 | 1198 |
T0 = 0x08; |
| 871 |
} else if (Ts0 > SPARAM(1)) {
|
|
| 1199 |
} else if ((int32_t)T0 > (int32_t)PARAM1) {
|
|
| 872 | 1200 |
T0 = 0x04; |
| 873 | 1201 |
} else {
|
| 874 | 1202 |
T0 = 0x02; |
| ... | ... | |
| 876 | 1204 |
RETURN(); |
| 877 | 1205 |
} |
| 878 | 1206 |
|
| 1207 |
#if defined(TARGET_PPC64) |
|
| 1208 |
void OPPROTO op_cmpi_64 (void) |
|
| 1209 |
{
|
|
| 1210 |
if ((int64_t)T0 < (int64_t)((int32_t)PARAM1)) {
|
|
| 1211 |
T0 = 0x08; |
|
| 1212 |
} else if ((int64_t)T0 > (int64_t)((int32_t)PARAM1)) {
|
|
| 1213 |
T0 = 0x04; |
|
| 1214 |
} else {
|
|
| 1215 |
T0 = 0x02; |
|
| 1216 |
} |
|
| 1217 |
RETURN(); |
|
| 1218 |
} |
|
| 1219 |
#endif |
|
| 1220 |
|
|
| 879 | 1221 |
/* compare logical */ |
| 880 |
PPC_OP(cmpl)
|
|
| 1222 |
void OPPROTO op_cmpl (void)
|
|
| 881 | 1223 |
{
|
| 882 |
if (T0 < T1) {
|
|
| 1224 |
if ((uint32_t)T0 < (uint32_t)T1) {
|
|
| 883 | 1225 |
T0 = 0x08; |
| 884 |
} else if (T0 > T1) {
|
|
| 1226 |
} else if ((uint32_t)T0 > (uint32_t)T1) {
|
|
| 885 | 1227 |
T0 = 0x04; |
| 886 | 1228 |
} else {
|
| 887 | 1229 |
T0 = 0x02; |
| ... | ... | |
| 889 | 1231 |
RETURN(); |
| 890 | 1232 |
} |
| 891 | 1233 |
|
| 1234 |
#if defined(TARGET_PPC64) |
|
| 1235 |
void OPPROTO op_cmpl_64 (void) |
|
| 1236 |
{
|
|
| 1237 |
if ((uint64_t)T0 < (uint64_t)T1) {
|
|
| 1238 |
T0 = 0x08; |
|
| 1239 |
} else if ((uint64_t)T0 > (uint64_t)T1) {
|
|
| 1240 |
T0 = 0x04; |
|
| 1241 |
} else {
|
|
| 1242 |
T0 = 0x02; |
|
| 1243 |
} |
|
| 1244 |
RETURN(); |
|
| 1245 |
} |
|
| 1246 |
#endif |
|
| 1247 |
|
|
| 892 | 1248 |
/* compare logical immediate */ |
| 893 |
PPC_OP(cmpli) |
|
| 1249 |
void OPPROTO op_cmpli (void) |
|
| 1250 |
{
|
|
| 1251 |
if ((uint32_t)T0 < (uint32_t)PARAM1) {
|
|
| 1252 |
T0 = 0x08; |
|
| 1253 |
} else if ((uint32_t)T0 > (uint32_t)PARAM1) {
|
|
| 1254 |
T0 = 0x04; |
|
| 1255 |
} else {
|
|
| 1256 |
T0 = 0x02; |
|
| 1257 |
} |
|
| 1258 |
RETURN(); |
|
| 1259 |
} |
|
| 1260 |
|
|
| 1261 |
#if defined(TARGET_PPC64) |
|
| 1262 |
void OPPROTO op_cmpli_64 (void) |
|
| 894 | 1263 |
{
|
| 895 |
if (T0 < PARAM(1)) {
|
|
| 1264 |
if ((uint64_t)T0 < (uint64_t)PARAM1) {
|
|
| 896 | 1265 |
T0 = 0x08; |
| 897 |
} else if (T0 > PARAM(1)) {
|
|
| 1266 |
} else if ((uint64_t)T0 > (uint64_t)PARAM1) {
|
|
| 898 | 1267 |
T0 = 0x04; |
| 899 | 1268 |
} else {
|
| 900 | 1269 |
T0 = 0x02; |
| 901 | 1270 |
} |
| 902 | 1271 |
RETURN(); |
| 903 | 1272 |
} |
| 1273 |
#endif |
|
| 1274 |
|
|
| 1275 |
void OPPROTO op_isel (void) |
|
| 1276 |
{
|
|
| 1277 |
if (T0) |
|
| 1278 |
T0 = T1; |
|
| 1279 |
else |
|
| 1280 |
T0 = T2; |
|
| 1281 |
RETURN(); |
|
| 1282 |
} |
|
| 1283 |
|
|
| 1284 |
void OPPROTO op_popcntb (void) |
|
| 1285 |
{
|
|
| 1286 |
do_popcntb(); |
|
| 1287 |
RETURN(); |
|
| 1288 |
} |
|
| 1289 |
|
|
| 1290 |
#if defined(TARGET_PPC64) |
|
| 1291 |
void OPPROTO op_popcntb_64 (void) |
|
| 1292 |
{
|
|
| 1293 |
do_popcntb_64(); |
|
| 1294 |
RETURN(); |
|
| 1295 |
} |
|
| 1296 |
#endif |
|
| 904 | 1297 |
|
| 905 | 1298 |
/*** Integer logical ***/ |
| 906 | 1299 |
/* and */ |
| ... | ... | |
| 963 | 1356 |
RETURN(); |
| 964 | 1357 |
} |
| 965 | 1358 |
|
| 1359 |
#if defined(TARGET_PPC64) |
|
| 1360 |
void OPPROTO op_cntlzd (void) |
|
| 1361 |
{
|
|
| 1362 |
#if HOST_LONG_BITS == 64 |
|
| 1363 |
int cnt; |
|
| 1364 |
|
|
| 1365 |
cnt = 0; |
|
| 1366 |
if (!(T0 & 0xFFFFFFFF00000000ULL)) {
|
|
| 1367 |
cnt += 32; |
|
| 1368 |
T0 <<= 32; |
|
| 1369 |
} |
|
| 1370 |
if (!(T0 & 0xFFFF000000000000ULL)) {
|
|
| 1371 |
cnt += 16; |
|
| 1372 |
T0 <<= 16; |
|
| 1373 |
} |
|
| 1374 |
if (!(T0 & 0xFF00000000000000ULL)) {
|
|
| 1375 |
cnt += 8; |
|
| 1376 |
T0 <<= 8; |
|
| 1377 |
} |
|
| 1378 |
if (!(T0 & 0xF000000000000000ULL)) {
|
|
| 1379 |
cnt += 4; |
|
| 1380 |
T0 <<= 4; |
|
| 1381 |
} |
|
| 1382 |
if (!(T0 & 0xC000000000000000ULL)) {
|
|
| 1383 |
cnt += 2; |
|
| 1384 |
T0 <<= 2; |
|
| 1385 |
} |
|
| 1386 |
if (!(T0 & 0x8000000000000000ULL)) {
|
|
| 1387 |
cnt++; |
|
| 1388 |
T0 <<= 1; |
|
| 1389 |
} |
|
| 1390 |
if (!(T0 & 0x8000000000000000ULL)) {
|
|
| 1391 |
cnt++; |
|
| 1392 |
} |
|
| 1393 |
T0 = cnt; |
|
| 1394 |
#else |
|
| 1395 |
uint32_t tmp; |
|
| 1396 |
|
|
| 1397 |
/* Make it easier on 32 bits host machines */ |
|
| 1398 |
if (!(T0 >> 32)) {
|
|
| 1399 |
tmp = T0; |
|
| 1400 |
T0 = 32; |
|
| 1401 |
} else {
|
|
| 1402 |
tmp = T0 >> 32; |
|
| 1403 |
T0 = 0; |
|
| 1404 |
} |
|
| 1405 |
if (!(tmp & 0xFFFF0000UL)) {
|
|
| 1406 |
T0 += 16; |
|
| 1407 |
tmp <<= 16; |
|
| 1408 |
} |
|
| 1409 |
if (!(tmp & 0xFF000000UL)) {
|
|
| 1410 |
T0 += 8; |
|
| 1411 |
tmp <<= 8; |
|
| 1412 |
} |
|
| 1413 |
if (!(tmp & 0xF0000000UL)) {
|
|
| 1414 |
T0 += 4; |
|
| 1415 |
tmp <<= 4; |
|
| 1416 |
} |
|
| 1417 |
if (!(tmp & 0xC0000000UL)) {
|
|
| 1418 |
T0 += 2; |
|
| 1419 |
tmp <<= 2; |
|
| 1420 |
} |
|
| 1421 |
if (!(tmp & 0x80000000UL)) {
|
|
| 1422 |
T0++; |
|
| 1423 |
tmp <<= 1; |
|
| 1424 |
} |
|
| 1425 |
if (!(tmp & 0x80000000UL)) {
|
|
| 1426 |
T0++; |
|
| 1427 |
} |
|
| 1428 |
#endif |
|
| 1429 |
RETURN(); |
|
| 1430 |
} |
|
| 1431 |
#endif |
|
| 1432 |
|
|
| 966 | 1433 |
/* eqv */ |
| 967 | 1434 |
PPC_OP(eqv) |
| 968 | 1435 |
{
|
| ... | ... | |
| 971 | 1438 |
} |
| 972 | 1439 |
|
| 973 | 1440 |
/* extend sign byte */ |
| 974 |
PPC_OP(extsb)
|
|
| 1441 |
void OPPROTO op_extsb (void)
|
|
| 975 | 1442 |
{
|
| 976 |
T0 = (int32_t)((int8_t)(Ts0)); |
|
| 1443 |
#if defined (TARGET_PPC64) |
|
| 1444 |
T0 = (int64_t)((int8_t)T0); |
|
| 1445 |
#else |
|
| 1446 |
T0 = (int32_t)((int8_t)T0); |
|
| 1447 |
#endif |
|
| 977 | 1448 |
RETURN(); |
| 978 | 1449 |
} |
| 979 | 1450 |
|
| 980 | 1451 |
/* extend sign half word */ |
| 981 |
PPC_OP(extsh)
|
|
| 1452 |
void OPPROTO op_extsh (void)
|
|
| 982 | 1453 |
{
|
| 983 |
T0 = (int32_t)((int16_t)(Ts0)); |
|
| 1454 |
#if defined (TARGET_PPC64) |
|
| 1455 |
T0 = (int64_t)((int16_t)T0); |
|
| 1456 |
#else |
|
| 1457 |
T0 = (int32_t)((int16_t)T0); |
|
| 1458 |
#endif |
|
| 984 | 1459 |
RETURN(); |
| 985 | 1460 |
} |
| 986 | 1461 |
|
| 1462 |
#if defined (TARGET_PPC64) |
|
| 1463 |
void OPPROTO op_extsw (void) |
|
| 1464 |
{
|
|
| 1465 |
T0 = (int64_t)((int32_t)T0); |
|
| 1466 |
RETURN(); |
|
| 1467 |
} |
|
| 1468 |
#endif |
|
| 1469 |
|
|
| 987 | 1470 |
/* nand */ |
| 988 | 1471 |
PPC_OP(nand) |
| 989 | 1472 |
{
|
| ... | ... | |
| 1048 | 1531 |
|
| 1049 | 1532 |
/*** Integer shift ***/ |
| 1050 | 1533 |
/* shift left word */ |
| 1051 |
PPC_OP(slw)
|
|
| 1534 |
void OPPROTO op_slw (void)
|
|
| 1052 | 1535 |
{
|
| 1053 | 1536 |
if (T1 & 0x20) {
|
| 1054 | 1537 |
T0 = 0; |
| 1055 | 1538 |
} else {
|
| 1539 |
T0 = (uint32_t)(T0 << T1); |
|
| 1540 |
} |
|
| 1541 |
RETURN(); |
|
| 1542 |
} |
|
| 1543 |
|
|
| 1544 |
#if defined(TARGET_PPC64) |
|
| 1545 |
void OPPROTO op_sld (void) |
|
| 1546 |
{
|
|
| 1547 |
if (T1 & 0x40) {
|
|
| 1548 |
T0 = 0; |
|
| 1549 |
} else {
|
|
| 1056 | 1550 |
T0 = T0 << T1; |
| 1057 | 1551 |
} |
| 1058 | 1552 |
RETURN(); |
| 1059 | 1553 |
} |
| 1554 |
#endif |
|
| 1060 | 1555 |
|
| 1061 | 1556 |
/* shift right algebraic word */ |
| 1062 | 1557 |
void OPPROTO op_sraw (void) |
| ... | ... | |
| 1065 | 1560 |
RETURN(); |
| 1066 | 1561 |
} |
Also available in: Unified diff