Revision d9bce9d9 target-ppc/cpu.h
| b/target-ppc/cpu.h | ||
|---|---|---|
| 365 | 365 |
PPC_E500_VECTOR = 0x20000000, |
| 366 | 366 |
/* PowerPC 4xx dedicated instructions */ |
| 367 | 367 |
PPC_4xx_COMMON = 0x40000000, |
| 368 |
/* PowerPC 2.03 specification extensions */ |
|
| 369 |
PPC_203 = 0x80000000, |
|
| 368 | 370 |
}; |
| 369 | 371 |
|
| 370 | 372 |
/* CPU run-time flags (MMU and exception model) */ |
| ... | ... | |
| 385 | 387 |
PPC_FLAGS_MMU_403 = 0x00000005, |
| 386 | 388 |
/* Freescale e500 MMU model */ |
| 387 | 389 |
PPC_FLAGS_MMU_e500 = 0x00000006, |
| 390 |
/* BookE MMU model */ |
|
| 391 |
PPC_FLAGS_MMU_BOOKE = 0x00000007, |
|
| 388 | 392 |
/* Exception model */ |
| 389 | 393 |
PPC_FLAGS_EXCP_MASK = 0x000000F0, |
| 390 | 394 |
/* Standard PowerPC exception model */ |
| ... | ... | |
| 407 | 411 |
PPC_FLAGS_EXCP_74xx = 0x00000080, |
| 408 | 412 |
/* PowerPC 970 exception model */ |
| 409 | 413 |
PPC_FLAGS_EXCP_970 = 0x00000090, |
| 414 |
/* BookE exception model */ |
|
| 415 |
PPC_FLAGS_EXCP_BOOKE = 0x000000A0, |
|
| 410 | 416 |
}; |
| 411 | 417 |
|
| 412 | 418 |
#define PPC_MMU(env) (env->flags & PPC_FLAGS_MMU_MASK) |
| ... | ... | |
| 437 | 443 |
/* PowerPC 440 */ |
| 438 | 444 |
#define PPC_INSNS_440 (PPC_INSNS_EMB | PPC_CACHE_OPT | PPC_BOOKE | \ |
| 439 | 445 |
PPC_4xx_COMMON | PPC_405_MAC | PPC_440_SPEC) |
| 440 |
#define PPC_FLAGS_440 (PPC_FLAGS_TODO)
|
|
| 446 |
#define PPC_FLAGS_440 (PPC_FLAGS_MMU_BOOKE | PPC_FLAGS_EXCP_BOOKE)
|
|
| 441 | 447 |
/* Generic BookE PowerPC */ |
| 442 | 448 |
#define PPC_INSNS_BOOKE (PPC_INSNS_EMB | PPC_BOOKE | PPC_MEM_EIEIO | \ |
| 443 | 449 |
PPC_FLOAT | PPC_FLOAT_OPT | PPC_CACHE_OPT) |
| 444 |
#define PPC_FLAGS_BOOKE (PPC_FLAGS_MMU_SOFT_4xx | PPC_FLAGS_EXCP_40x)
|
|
| 450 |
#define PPC_FLAGS_BOOKE (PPC_FLAGS_MMU_BOOKE | PPC_FLAGS_EXCP_BOOKE)
|
|
| 445 | 451 |
/* e500 core */ |
| 446 | 452 |
#define PPC_INSNS_E500 (PPC_INSNS_EMB | PPC_BOOKE | PPC_MEM_EIEIO | \ |
| 447 | 453 |
PPC_CACHE_OPT | PPC_E500_VECTOR) |
| ... | ... | |
| 502 | 508 |
typedef struct ppc_avr_t ppc_avr_t; |
| 503 | 509 |
typedef struct ppc_tlb_t ppc_tlb_t; |
| 504 | 510 |
|
| 505 |
|
|
| 506 | 511 |
/* SPR access micro-ops generations callbacks */ |
| 507 | 512 |
struct ppc_spr_t {
|
| 508 | 513 |
void (*uea_read)(void *opaque, int spr_num); |
| ... | ... | |
| 619 | 624 |
*/ |
| 620 | 625 |
target_ulong t0, t1, t2; |
| 621 | 626 |
#endif |
| 627 |
ppc_avr_t t0_avr, t1_avr, t2_avr; |
|
| 628 |
|
|
| 622 | 629 |
/* general purpose registers */ |
| 623 | 630 |
ppc_gpr_t gpr[32]; |
| 624 | 631 |
/* LR */ |
| ... | ... | |
| 674 | 681 |
/* Altivec registers */ |
| 675 | 682 |
ppc_avr_t avr[32]; |
| 676 | 683 |
uint32_t vscr; |
| 684 |
/* SPE registers */ |
|
| 685 |
ppc_gpr_t spe_acc; |
|
| 686 |
uint32_t spe_fscr; |
|
| 677 | 687 |
|
| 678 | 688 |
/* Internal devices resources */ |
| 679 | 689 |
/* Time base and decrementer */ |
| ... | ... | |
| 762 | 772 |
void do_store_dbatl (CPUPPCState *env, int nr, target_ulong value); |
| 763 | 773 |
target_ulong do_load_sdr1 (CPUPPCState *env); |
| 764 | 774 |
void do_store_sdr1 (CPUPPCState *env, target_ulong value); |
| 765 |
target_ulong do_load_asr (CPUPPCState *env); |
|
| 766 |
void do_store_asr (CPUPPCState *env, target_ulong value); |
|
| 775 |
#if defined(TARGET_PPC64) |
|
| 776 |
target_ulong ppc_load_asr (CPUPPCState *env); |
|
| 777 |
void ppc_store_asr (CPUPPCState *env, target_ulong value); |
|
| 778 |
#endif |
|
| 767 | 779 |
target_ulong do_load_sr (CPUPPCState *env, int srnum); |
| 768 | 780 |
void do_store_sr (CPUPPCState *env, int srnum, target_ulong value); |
| 769 | 781 |
#endif |
| ... | ... | |
| 771 | 783 |
void ppc_store_xer (CPUPPCState *env, uint32_t value); |
| 772 | 784 |
target_ulong do_load_msr (CPUPPCState *env); |
| 773 | 785 |
void do_store_msr (CPUPPCState *env, target_ulong value); |
| 786 |
void ppc_store_msr32 (CPUPPCState *env, uint32_t value); |
|
| 774 | 787 |
|
| 775 | 788 |
void do_compute_hflags (CPUPPCState *env); |
| 776 | 789 |
|
| ... | ... | |
| 787 | 800 |
void cpu_ppc_store_tbl (CPUPPCState *env, uint32_t value); |
| 788 | 801 |
uint32_t cpu_ppc_load_decr (CPUPPCState *env); |
| 789 | 802 |
void cpu_ppc_store_decr (CPUPPCState *env, uint32_t value); |
| 803 |
uint32_t cpu_ppc601_load_rtcl (CPUPPCState *env); |
|
| 804 |
uint32_t cpu_ppc601_load_rtcu (CPUPPCState *env); |
|
| 805 |
#if !defined(CONFIG_USER_ONLY) |
|
| 806 |
void cpu_ppc601_store_rtcl (CPUPPCState *env, uint32_t value); |
|
| 807 |
void cpu_ppc601_store_rtcu (CPUPPCState *env, uint32_t value); |
|
| 808 |
target_ulong load_40x_pit (CPUPPCState *env); |
|
| 809 |
void store_40x_pit (CPUPPCState *env, target_ulong val); |
|
| 810 |
void store_booke_tcr (CPUPPCState *env, target_ulong val); |
|
| 811 |
void store_booke_tsr (CPUPPCState *env, target_ulong val); |
|
| 812 |
#endif |
|
| 790 | 813 |
#endif |
| 791 | 814 |
|
| 792 | 815 |
#define TARGET_PAGE_BITS 12 |
Also available in: Unified diff