Statistics
| Branch: | Revision:

root / target-i386 / exec.h @ db8d9902

History | View | Annotate | Download (9.6 kB)

1
/*
2
 *  i386 execution defines
3
 *
4
 *  Copyright (c) 2003 Fabrice Bellard
5
 *
6
 * This library is free software; you can redistribute it and/or
7
 * modify it under the terms of the GNU Lesser General Public
8
 * License as published by the Free Software Foundation; either
9
 * version 2 of the License, or (at your option) any later version.
10
 *
11
 * This library is distributed in the hope that it will be useful,
12
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14
 * Lesser General Public License for more details.
15
 *
16
 * You should have received a copy of the GNU Lesser General Public
17
 * License along with this library; if not, write to the Free Software
18
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19
 */
20
#include "config.h"
21
#include "dyngen-exec.h"
22

    
23
/* XXX: factorize this mess */
24
#ifdef TARGET_X86_64
25
#define TARGET_LONG_BITS 64
26
#else
27
#define TARGET_LONG_BITS 32
28
#endif
29

    
30
#include "cpu-defs.h"
31

    
32
register struct CPUX86State *env asm(AREG0);
33

    
34
#include "qemu-log.h"
35

    
36
#define EAX (env->regs[R_EAX])
37
#define ECX (env->regs[R_ECX])
38
#define EDX (env->regs[R_EDX])
39
#define EBX (env->regs[R_EBX])
40
#define ESP (env->regs[R_ESP])
41
#define EBP (env->regs[R_EBP])
42
#define ESI (env->regs[R_ESI])
43
#define EDI (env->regs[R_EDI])
44
#define EIP (env->eip)
45
#define DF  (env->df)
46

    
47
#define CC_SRC (env->cc_src)
48
#define CC_DST (env->cc_dst)
49
#define CC_OP  (env->cc_op)
50

    
51
/* float macros */
52
#define FT0    (env->ft0)
53
#define ST0    (env->fpregs[env->fpstt].d)
54
#define ST(n)  (env->fpregs[(env->fpstt + (n)) & 7].d)
55
#define ST1    ST(1)
56

    
57
#include "cpu.h"
58
#include "exec-all.h"
59

    
60
void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
61
void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
62
int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
63
                             int is_write, int mmu_idx, int is_softmmu);
64
void __hidden cpu_lock(void);
65
void __hidden cpu_unlock(void);
66
void do_interrupt(int intno, int is_int, int error_code,
67
                  target_ulong next_eip, int is_hw);
68
void do_interrupt_user(int intno, int is_int, int error_code,
69
                       target_ulong next_eip);
70
void raise_interrupt(int intno, int is_int, int error_code,
71
                     int next_eip_addend);
72
void raise_exception_err(int exception_index, int error_code);
73
void raise_exception(int exception_index);
74
void do_smm_enter(void);
75

    
76
/* n must be a constant to be efficient */
77
static inline target_long lshift(target_long x, int n)
78
{
79
    if (n >= 0)
80
        return x << n;
81
    else
82
        return x >> (-n);
83
}
84

    
85
#include "helper.h"
86

    
87
static inline void svm_check_intercept(uint32_t type)
88
{
89
    helper_svm_check_intercept_param(type, 0);
90
}
91

    
92
#if !defined(CONFIG_USER_ONLY)
93

    
94
#include "softmmu_exec.h"
95

    
96
#endif /* !defined(CONFIG_USER_ONLY) */
97

    
98
#ifdef USE_X86LDOUBLE
99
/* use long double functions */
100
#define floatx_to_int32 floatx80_to_int32
101
#define floatx_to_int64 floatx80_to_int64
102
#define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
103
#define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
104
#define int32_to_floatx int32_to_floatx80
105
#define int64_to_floatx int64_to_floatx80
106
#define float32_to_floatx float32_to_floatx80
107
#define float64_to_floatx float64_to_floatx80
108
#define floatx_to_float32 floatx80_to_float32
109
#define floatx_to_float64 floatx80_to_float64
110
#define floatx_abs floatx80_abs
111
#define floatx_chs floatx80_chs
112
#define floatx_round_to_int floatx80_round_to_int
113
#define floatx_compare floatx80_compare
114
#define floatx_compare_quiet floatx80_compare_quiet
115
#else
116
#define floatx_to_int32 float64_to_int32
117
#define floatx_to_int64 float64_to_int64
118
#define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
119
#define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
120
#define int32_to_floatx int32_to_float64
121
#define int64_to_floatx int64_to_float64
122
#define float32_to_floatx float32_to_float64
123
#define float64_to_floatx(x, e) (x)
124
#define floatx_to_float32 float64_to_float32
125
#define floatx_to_float64(x, e) (x)
126
#define floatx_abs float64_abs
127
#define floatx_chs float64_chs
128
#define floatx_round_to_int float64_round_to_int
129
#define floatx_compare float64_compare
130
#define floatx_compare_quiet float64_compare_quiet
131
#endif
132

    
133
#define RC_MASK         0xc00
134
#define RC_NEAR                0x000
135
#define RC_DOWN                0x400
136
#define RC_UP                0x800
137
#define RC_CHOP                0xc00
138

    
139
#define MAXTAN 9223372036854775808.0
140

    
141
#ifdef USE_X86LDOUBLE
142

    
143
/* only for x86 */
144
typedef union {
145
    long double d;
146
    struct {
147
        unsigned long long lower;
148
        unsigned short upper;
149
    } l;
150
} CPU86_LDoubleU;
151

    
152
/* the following deal with x86 long double-precision numbers */
153
#define MAXEXPD 0x7fff
154
#define EXPBIAS 16383
155
#define EXPD(fp)        (fp.l.upper & 0x7fff)
156
#define SIGND(fp)        ((fp.l.upper) & 0x8000)
157
#define MANTD(fp)       (fp.l.lower)
158
#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
159

    
160
#else
161

    
162
/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
163
typedef union {
164
    double d;
165
#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
166
    struct {
167
        uint32_t lower;
168
        int32_t upper;
169
    } l;
170
#else
171
    struct {
172
        int32_t upper;
173
        uint32_t lower;
174
    } l;
175
#endif
176
#ifndef __arm__
177
    int64_t ll;
178
#endif
179
} CPU86_LDoubleU;
180

    
181
/* the following deal with IEEE double-precision numbers */
182
#define MAXEXPD 0x7ff
183
#define EXPBIAS 1023
184
#define EXPD(fp)        (((fp.l.upper) >> 20) & 0x7FF)
185
#define SIGND(fp)        ((fp.l.upper) & 0x80000000)
186
#ifdef __arm__
187
#define MANTD(fp)        (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
188
#else
189
#define MANTD(fp)        (fp.ll & ((1LL << 52) - 1))
190
#endif
191
#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
192
#endif
193

    
194
static inline void fpush(void)
195
{
196
    env->fpstt = (env->fpstt - 1) & 7;
197
    env->fptags[env->fpstt] = 0; /* validate stack entry */
198
}
199

    
200
static inline void fpop(void)
201
{
202
    env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
203
    env->fpstt = (env->fpstt + 1) & 7;
204
}
205

    
206
#ifndef USE_X86LDOUBLE
207
static inline CPU86_LDouble helper_fldt(target_ulong ptr)
208
{
209
    CPU86_LDoubleU temp;
210
    int upper, e;
211
    uint64_t ll;
212

    
213
    /* mantissa */
214
    upper = lduw(ptr + 8);
215
    /* XXX: handle overflow ? */
216
    e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
217
    e |= (upper >> 4) & 0x800; /* sign */
218
    ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
219
#ifdef __arm__
220
    temp.l.upper = (e << 20) | (ll >> 32);
221
    temp.l.lower = ll;
222
#else
223
    temp.ll = ll | ((uint64_t)e << 52);
224
#endif
225
    return temp.d;
226
}
227

    
228
static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
229
{
230
    CPU86_LDoubleU temp;
231
    int e;
232

    
233
    temp.d = f;
234
    /* mantissa */
235
    stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
236
    /* exponent + sign */
237
    e = EXPD(temp) - EXPBIAS + 16383;
238
    e |= SIGND(temp) >> 16;
239
    stw(ptr + 8, e);
240
}
241
#else
242

    
243
/* we use memory access macros */
244

    
245
static inline CPU86_LDouble helper_fldt(target_ulong ptr)
246
{
247
    CPU86_LDoubleU temp;
248

    
249
    temp.l.lower = ldq(ptr);
250
    temp.l.upper = lduw(ptr + 8);
251
    return temp.d;
252
}
253

    
254
static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
255
{
256
    CPU86_LDoubleU temp;
257

    
258
    temp.d = f;
259
    stq(ptr, temp.l.lower);
260
    stw(ptr + 8, temp.l.upper);
261
}
262

    
263
#endif /* USE_X86LDOUBLE */
264

    
265
#define FPUS_IE (1 << 0)
266
#define FPUS_DE (1 << 1)
267
#define FPUS_ZE (1 << 2)
268
#define FPUS_OE (1 << 3)
269
#define FPUS_UE (1 << 4)
270
#define FPUS_PE (1 << 5)
271
#define FPUS_SF (1 << 6)
272
#define FPUS_SE (1 << 7)
273
#define FPUS_B  (1 << 15)
274

    
275
#define FPUC_EM 0x3f
276

    
277
extern const CPU86_LDouble f15rk[7];
278

    
279
void fpu_raise_exception(void);
280
void restore_native_fp_state(CPUState *env);
281
void save_native_fp_state(CPUState *env);
282

    
283
extern const uint8_t parity_table[256];
284
extern const uint8_t rclw_table[32];
285
extern const uint8_t rclb_table[32];
286

    
287
static inline uint32_t compute_eflags(void)
288
{
289
    return env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
290
}
291

    
292
/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
293
static inline void load_eflags(int eflags, int update_mask)
294
{
295
    CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
296
    DF = 1 - (2 * ((eflags >> 10) & 1));
297
    env->eflags = (env->eflags & ~update_mask) |
298
        (eflags & update_mask) | 0x2;
299
}
300

    
301
static inline void env_to_regs(void)
302
{
303
#ifdef reg_EAX
304
    EAX = env->regs[R_EAX];
305
#endif
306
#ifdef reg_ECX
307
    ECX = env->regs[R_ECX];
308
#endif
309
#ifdef reg_EDX
310
    EDX = env->regs[R_EDX];
311
#endif
312
#ifdef reg_EBX
313
    EBX = env->regs[R_EBX];
314
#endif
315
#ifdef reg_ESP
316
    ESP = env->regs[R_ESP];
317
#endif
318
#ifdef reg_EBP
319
    EBP = env->regs[R_EBP];
320
#endif
321
#ifdef reg_ESI
322
    ESI = env->regs[R_ESI];
323
#endif
324
#ifdef reg_EDI
325
    EDI = env->regs[R_EDI];
326
#endif
327
}
328

    
329
static inline void regs_to_env(void)
330
{
331
#ifdef reg_EAX
332
    env->regs[R_EAX] = EAX;
333
#endif
334
#ifdef reg_ECX
335
    env->regs[R_ECX] = ECX;
336
#endif
337
#ifdef reg_EDX
338
    env->regs[R_EDX] = EDX;
339
#endif
340
#ifdef reg_EBX
341
    env->regs[R_EBX] = EBX;
342
#endif
343
#ifdef reg_ESP
344
    env->regs[R_ESP] = ESP;
345
#endif
346
#ifdef reg_EBP
347
    env->regs[R_EBP] = EBP;
348
#endif
349
#ifdef reg_ESI
350
    env->regs[R_ESI] = ESI;
351
#endif
352
#ifdef reg_EDI
353
    env->regs[R_EDI] = EDI;
354
#endif
355
}
356

    
357
static inline int cpu_halted(CPUState *env) {
358
    /* handle exit of HALTED state */
359
    if (!env->halted)
360
        return 0;
361
    /* disable halt condition */
362
    if (((env->interrupt_request & CPU_INTERRUPT_HARD) &&
363
         (env->eflags & IF_MASK)) ||
364
        (env->interrupt_request & CPU_INTERRUPT_NMI)) {
365
        env->halted = 0;
366
        return 0;
367
    }
368
    return EXCP_HALTED;
369
}
370

    
371
/* load efer and update the corresponding hflags. XXX: do consistency
372
   checks with cpuid bits ? */
373
static inline void cpu_load_efer(CPUState *env, uint64_t val)
374
{
375
    env->efer = val;
376
    env->hflags &= ~(HF_LMA_MASK | HF_SVME_MASK);
377
    if (env->efer & MSR_EFER_LMA)
378
        env->hflags |= HF_LMA_MASK;
379
    if (env->efer & MSR_EFER_SVME)
380
        env->hflags |= HF_SVME_MASK;
381
}