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1 | b92e5a22 | bellard | /*
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2 | b92e5a22 | bellard | * Software MMU support
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3 | b92e5a22 | bellard | *
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4 | b92e5a22 | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | b92e5a22 | bellard | *
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6 | b92e5a22 | bellard | * This library is free software; you can redistribute it and/or
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7 | b92e5a22 | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | b92e5a22 | bellard | * License as published by the Free Software Foundation; either
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9 | b92e5a22 | bellard | * version 2 of the License, or (at your option) any later version.
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10 | b92e5a22 | bellard | *
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11 | b92e5a22 | bellard | * This library is distributed in the hope that it will be useful,
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12 | b92e5a22 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | b92e5a22 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | b92e5a22 | bellard | * Lesser General Public License for more details.
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15 | b92e5a22 | bellard | *
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16 | b92e5a22 | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | b92e5a22 | bellard | * License along with this library; if not, write to the Free Software
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18 | b92e5a22 | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | b92e5a22 | bellard | */
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20 | b92e5a22 | bellard | #define DATA_SIZE (1 << SHIFT) |
21 | b92e5a22 | bellard | |
22 | b92e5a22 | bellard | #if DATA_SIZE == 8 |
23 | b92e5a22 | bellard | #define SUFFIX q
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24 | b92e5a22 | bellard | #define DATA_TYPE uint64_t
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25 | b92e5a22 | bellard | #elif DATA_SIZE == 4 |
26 | b92e5a22 | bellard | #define SUFFIX l
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27 | b92e5a22 | bellard | #define DATA_TYPE uint32_t
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28 | b92e5a22 | bellard | #elif DATA_SIZE == 2 |
29 | b92e5a22 | bellard | #define SUFFIX w
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30 | b92e5a22 | bellard | #define DATA_TYPE uint16_t
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31 | b92e5a22 | bellard | #elif DATA_SIZE == 1 |
32 | b92e5a22 | bellard | #define SUFFIX b
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33 | b92e5a22 | bellard | #define DATA_TYPE uint8_t
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34 | b92e5a22 | bellard | #else
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35 | b92e5a22 | bellard | #error unsupported data size
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36 | b92e5a22 | bellard | #endif
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37 | b92e5a22 | bellard | |
38 | b92e5a22 | bellard | static DATA_TYPE glue(slow_ld, SUFFIX)(unsigned long addr, void *retaddr); |
39 | b92e5a22 | bellard | static void glue(slow_st, SUFFIX)(unsigned long addr, DATA_TYPE val, |
40 | b92e5a22 | bellard | void *retaddr);
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41 | b92e5a22 | bellard | |
42 | b92e5a22 | bellard | static inline DATA_TYPE glue(io_read, SUFFIX)(unsigned long physaddr, |
43 | b92e5a22 | bellard | unsigned long tlb_addr) |
44 | b92e5a22 | bellard | { |
45 | b92e5a22 | bellard | DATA_TYPE res; |
46 | b92e5a22 | bellard | int index;
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47 | b92e5a22 | bellard | |
48 | b92e5a22 | bellard | index = (tlb_addr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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49 | b92e5a22 | bellard | #if SHIFT <= 2 |
50 | b92e5a22 | bellard | res = io_mem_read[index][SHIFT](physaddr); |
51 | b92e5a22 | bellard | #else
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52 | b92e5a22 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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53 | b92e5a22 | bellard | res = (uint64_t)io_mem_read[index][2](physaddr) << 32; |
54 | b92e5a22 | bellard | res |= io_mem_read[index][2](physaddr + 4); |
55 | b92e5a22 | bellard | #else
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56 | b92e5a22 | bellard | res = io_mem_read[index][2](physaddr);
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57 | b92e5a22 | bellard | res |= (uint64_t)io_mem_read[index][2](physaddr + 4) << 32; |
58 | b92e5a22 | bellard | #endif
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59 | b92e5a22 | bellard | #endif /* SHIFT > 2 */ |
60 | b92e5a22 | bellard | return res;
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61 | b92e5a22 | bellard | } |
62 | b92e5a22 | bellard | |
63 | b92e5a22 | bellard | static inline void glue(io_write, SUFFIX)(unsigned long physaddr, |
64 | b92e5a22 | bellard | DATA_TYPE val, |
65 | b92e5a22 | bellard | unsigned long tlb_addr) |
66 | b92e5a22 | bellard | { |
67 | b92e5a22 | bellard | int index;
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68 | b92e5a22 | bellard | |
69 | b92e5a22 | bellard | index = (tlb_addr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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70 | b92e5a22 | bellard | #if SHIFT <= 2 |
71 | b92e5a22 | bellard | io_mem_write[index][SHIFT](physaddr, val); |
72 | b92e5a22 | bellard | #else
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73 | b92e5a22 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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74 | b92e5a22 | bellard | io_mem_write[index][2](physaddr, val >> 32); |
75 | b92e5a22 | bellard | io_mem_write[index][2](physaddr + 4, val); |
76 | b92e5a22 | bellard | #else
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77 | b92e5a22 | bellard | io_mem_write[index][2](physaddr, val);
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78 | b92e5a22 | bellard | io_mem_write[index][2](physaddr + 4, val >> 32); |
79 | b92e5a22 | bellard | #endif
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80 | b92e5a22 | bellard | #endif /* SHIFT > 2 */ |
81 | b92e5a22 | bellard | } |
82 | b92e5a22 | bellard | |
83 | b92e5a22 | bellard | /* handle all cases except unaligned access which span two pages */
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84 | e2222c39 | bellard | DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), _mmu)(unsigned long addr) |
85 | b92e5a22 | bellard | { |
86 | b92e5a22 | bellard | DATA_TYPE res; |
87 | b92e5a22 | bellard | int is_user, index;
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88 | b92e5a22 | bellard | unsigned long physaddr, tlb_addr; |
89 | b92e5a22 | bellard | void *retaddr;
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90 | b92e5a22 | bellard | |
91 | b92e5a22 | bellard | /* test if there is match for unaligned or IO access */
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92 | b92e5a22 | bellard | /* XXX: could done more in memory macro in a non portable way */
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93 | 3f337316 | bellard | is_user = ((env->hflags & HF_CPL_MASK) == 3);
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94 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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95 | b92e5a22 | bellard | redo:
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96 | b92e5a22 | bellard | tlb_addr = env->tlb_read[is_user][index].address; |
97 | b92e5a22 | bellard | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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98 | b92e5a22 | bellard | physaddr = addr + env->tlb_read[is_user][index].addend; |
99 | b92e5a22 | bellard | if (tlb_addr & ~TARGET_PAGE_MASK) {
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100 | b92e5a22 | bellard | /* IO access */
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101 | b92e5a22 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
102 | b92e5a22 | bellard | goto do_unaligned_access;
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103 | b92e5a22 | bellard | res = glue(io_read, SUFFIX)(physaddr, tlb_addr); |
104 | b92e5a22 | bellard | } else if (((addr & 0xfff) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
105 | b92e5a22 | bellard | /* slow unaligned access (it spans two pages or IO) */
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106 | b92e5a22 | bellard | do_unaligned_access:
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107 | b92e5a22 | bellard | retaddr = __builtin_return_address(0);
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108 | b92e5a22 | bellard | res = glue(slow_ld, SUFFIX)(addr, retaddr); |
109 | b92e5a22 | bellard | } else {
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110 | b92e5a22 | bellard | /* unaligned access in the same page */
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111 | b92e5a22 | bellard | res = glue(glue(ldu, SUFFIX), _raw)((uint8_t *)physaddr); |
112 | b92e5a22 | bellard | } |
113 | b92e5a22 | bellard | } else {
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114 | b92e5a22 | bellard | /* the page is not in the TLB : fill it */
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115 | b92e5a22 | bellard | retaddr = __builtin_return_address(0);
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116 | b92e5a22 | bellard | tlb_fill(addr, 0, retaddr);
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117 | b92e5a22 | bellard | goto redo;
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118 | b92e5a22 | bellard | } |
119 | b92e5a22 | bellard | return res;
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120 | b92e5a22 | bellard | } |
121 | b92e5a22 | bellard | |
122 | b92e5a22 | bellard | /* handle all unaligned cases */
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123 | b92e5a22 | bellard | static DATA_TYPE glue(slow_ld, SUFFIX)(unsigned long addr, void *retaddr) |
124 | b92e5a22 | bellard | { |
125 | b92e5a22 | bellard | DATA_TYPE res, res1, res2; |
126 | b92e5a22 | bellard | int is_user, index, shift;
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127 | b92e5a22 | bellard | unsigned long physaddr, tlb_addr, addr1, addr2; |
128 | b92e5a22 | bellard | |
129 | 3f337316 | bellard | is_user = ((env->hflags & HF_CPL_MASK) == 3);
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130 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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131 | b92e5a22 | bellard | redo:
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132 | b92e5a22 | bellard | tlb_addr = env->tlb_read[is_user][index].address; |
133 | b92e5a22 | bellard | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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134 | b92e5a22 | bellard | physaddr = addr + env->tlb_read[is_user][index].addend; |
135 | b92e5a22 | bellard | if (tlb_addr & ~TARGET_PAGE_MASK) {
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136 | b92e5a22 | bellard | /* IO access */
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137 | b92e5a22 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
138 | b92e5a22 | bellard | goto do_unaligned_access;
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139 | b92e5a22 | bellard | res = glue(io_read, SUFFIX)(physaddr, tlb_addr); |
140 | b92e5a22 | bellard | } else if (((addr & 0xfff) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
141 | b92e5a22 | bellard | do_unaligned_access:
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142 | b92e5a22 | bellard | /* slow unaligned access (it spans two pages) */
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143 | b92e5a22 | bellard | addr1 = addr & ~(DATA_SIZE - 1);
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144 | b92e5a22 | bellard | addr2 = addr1 + DATA_SIZE; |
145 | b92e5a22 | bellard | res1 = glue(slow_ld, SUFFIX)(addr1, retaddr); |
146 | b92e5a22 | bellard | res2 = glue(slow_ld, SUFFIX)(addr2, retaddr); |
147 | b92e5a22 | bellard | shift = (addr & (DATA_SIZE - 1)) * 8; |
148 | b92e5a22 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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149 | b92e5a22 | bellard | res = (res1 << shift) | (res2 >> ((DATA_SIZE * 8) - shift));
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150 | b92e5a22 | bellard | #else
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151 | b92e5a22 | bellard | res = (res1 >> shift) | (res2 << ((DATA_SIZE * 8) - shift));
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152 | b92e5a22 | bellard | #endif
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153 | b92e5a22 | bellard | } else {
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154 | b92e5a22 | bellard | /* unaligned/aligned access in the same page */
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155 | b92e5a22 | bellard | res = glue(glue(ldu, SUFFIX), _raw)((uint8_t *)physaddr); |
156 | b92e5a22 | bellard | } |
157 | b92e5a22 | bellard | } else {
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158 | b92e5a22 | bellard | /* the page is not in the TLB : fill it */
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159 | b92e5a22 | bellard | tlb_fill(addr, 0, retaddr);
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160 | b92e5a22 | bellard | goto redo;
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161 | b92e5a22 | bellard | } |
162 | b92e5a22 | bellard | return res;
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163 | b92e5a22 | bellard | } |
164 | b92e5a22 | bellard | |
165 | b92e5a22 | bellard | |
166 | e2222c39 | bellard | void REGPARM(2) glue(glue(__st, SUFFIX), _mmu)(unsigned long addr, DATA_TYPE val) |
167 | b92e5a22 | bellard | { |
168 | b92e5a22 | bellard | unsigned long physaddr, tlb_addr; |
169 | b92e5a22 | bellard | void *retaddr;
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170 | b92e5a22 | bellard | int is_user, index;
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171 | b92e5a22 | bellard | |
172 | 3f337316 | bellard | is_user = ((env->hflags & HF_CPL_MASK) == 3);
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173 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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174 | b92e5a22 | bellard | redo:
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175 | b92e5a22 | bellard | tlb_addr = env->tlb_write[is_user][index].address; |
176 | b92e5a22 | bellard | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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177 | b92e5a22 | bellard | physaddr = addr + env->tlb_read[is_user][index].addend; |
178 | b92e5a22 | bellard | if (tlb_addr & ~TARGET_PAGE_MASK) {
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179 | b92e5a22 | bellard | /* IO access */
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180 | b92e5a22 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
181 | b92e5a22 | bellard | goto do_unaligned_access;
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182 | b92e5a22 | bellard | glue(io_write, SUFFIX)(physaddr, val, tlb_addr); |
183 | b92e5a22 | bellard | } else if (((addr & 0xfff) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
184 | b92e5a22 | bellard | do_unaligned_access:
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185 | b92e5a22 | bellard | retaddr = __builtin_return_address(0);
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186 | b92e5a22 | bellard | glue(slow_st, SUFFIX)(addr, val, retaddr); |
187 | b92e5a22 | bellard | } else {
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188 | b92e5a22 | bellard | /* aligned/unaligned access in the same page */
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189 | b92e5a22 | bellard | glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, val); |
190 | b92e5a22 | bellard | } |
191 | b92e5a22 | bellard | } else {
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192 | b92e5a22 | bellard | /* the page is not in the TLB : fill it */
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193 | b92e5a22 | bellard | retaddr = __builtin_return_address(0);
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194 | b92e5a22 | bellard | tlb_fill(addr, 1, retaddr);
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195 | b92e5a22 | bellard | goto redo;
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196 | b92e5a22 | bellard | } |
197 | b92e5a22 | bellard | } |
198 | b92e5a22 | bellard | |
199 | b92e5a22 | bellard | /* handles all unaligned cases */
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200 | b92e5a22 | bellard | static void glue(slow_st, SUFFIX)(unsigned long addr, DATA_TYPE val, |
201 | b92e5a22 | bellard | void *retaddr)
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202 | b92e5a22 | bellard | { |
203 | b92e5a22 | bellard | unsigned long physaddr, tlb_addr; |
204 | b92e5a22 | bellard | int is_user, index, i;
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205 | b92e5a22 | bellard | |
206 | 3f337316 | bellard | is_user = ((env->hflags & HF_CPL_MASK) == 3);
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207 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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208 | b92e5a22 | bellard | redo:
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209 | b92e5a22 | bellard | tlb_addr = env->tlb_write[is_user][index].address; |
210 | b92e5a22 | bellard | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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211 | b92e5a22 | bellard | physaddr = addr + env->tlb_read[is_user][index].addend; |
212 | b92e5a22 | bellard | if (tlb_addr & ~TARGET_PAGE_MASK) {
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213 | b92e5a22 | bellard | /* IO access */
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214 | b92e5a22 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
215 | b92e5a22 | bellard | goto do_unaligned_access;
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216 | b92e5a22 | bellard | glue(io_write, SUFFIX)(physaddr, val, tlb_addr); |
217 | b92e5a22 | bellard | } else if (((addr & 0xfff) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
218 | b92e5a22 | bellard | do_unaligned_access:
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219 | b92e5a22 | bellard | /* XXX: not efficient, but simple */
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220 | b92e5a22 | bellard | for(i = 0;i < DATA_SIZE; i++) { |
221 | b92e5a22 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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222 | b92e5a22 | bellard | slow_stb(addr + i, val >> (((DATA_SIZE - 1) * 8) - (i * 8)), retaddr); |
223 | b92e5a22 | bellard | #else
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224 | b92e5a22 | bellard | slow_stb(addr + i, val >> (i * 8), retaddr);
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225 | b92e5a22 | bellard | #endif
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226 | b92e5a22 | bellard | } |
227 | b92e5a22 | bellard | } else {
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228 | b92e5a22 | bellard | /* aligned/unaligned access in the same page */
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229 | b92e5a22 | bellard | glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, val); |
230 | b92e5a22 | bellard | } |
231 | b92e5a22 | bellard | } else {
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232 | b92e5a22 | bellard | /* the page is not in the TLB : fill it */
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233 | b92e5a22 | bellard | tlb_fill(addr, 1, retaddr);
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234 | b92e5a22 | bellard | goto redo;
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235 | b92e5a22 | bellard | } |
236 | b92e5a22 | bellard | } |
237 | b92e5a22 | bellard | |
238 | b92e5a22 | bellard | #undef SHIFT
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239 | b92e5a22 | bellard | #undef DATA_TYPE
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240 | b92e5a22 | bellard | #undef SUFFIX
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241 | b92e5a22 | bellard | #undef DATA_SIZE |