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/*
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 * QEMU IDE disk and CD-ROM Emulator
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 * 
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 * Copyright (c) 2003 Fabrice Bellard
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 * 
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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#include "vl.h"
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/* debug IDE devices */
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//#define DEBUG_IDE
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//#define DEBUG_IDE_ATAPI
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/* Bits of HD_STATUS */
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#define ERR_STAT                0x01
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#define INDEX_STAT                0x02
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#define ECC_STAT                0x04        /* Corrected error */
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#define DRQ_STAT                0x08
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#define SEEK_STAT                0x10
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#define SRV_STAT                0x10
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#define WRERR_STAT                0x20
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#define READY_STAT                0x40
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#define BUSY_STAT                0x80
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/* Bits for HD_ERROR */
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#define MARK_ERR                0x01        /* Bad address mark */
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#define TRK0_ERR                0x02        /* couldn't find track 0 */
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#define ABRT_ERR                0x04        /* Command aborted */
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#define MCR_ERR                        0x08        /* media change request */
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#define ID_ERR                        0x10        /* ID field not found */
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#define MC_ERR                        0x20        /* media changed */
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#define ECC_ERR                        0x40        /* Uncorrectable ECC error */
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#define BBD_ERR                        0x80        /* pre-EIDE meaning:  block marked bad */
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#define ICRC_ERR                0x80        /* new meaning:  CRC error during transfer */
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/* Bits of HD_NSECTOR */
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#define CD                        0x01
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#define IO                        0x02
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#define REL                        0x04
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#define TAG_MASK                0xf8
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#define IDE_CMD_RESET           0x04
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#define IDE_CMD_DISABLE_IRQ     0x02
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/* ATA/ATAPI Commands pre T13 Spec */
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#define WIN_NOP                                0x00
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/*
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 *        0x01->0x02 Reserved
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 */
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#define CFA_REQ_EXT_ERROR_CODE                0x03 /* CFA Request Extended Error Code */
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/*
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 *        0x04->0x07 Reserved
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 */
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#define WIN_SRST                        0x08 /* ATAPI soft reset command */
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#define WIN_DEVICE_RESET                0x08
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/*
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 *        0x09->0x0F Reserved
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 */
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#define WIN_RECAL                        0x10
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#define WIN_RESTORE                        WIN_RECAL
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/*
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 *        0x10->0x1F Reserved
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 */
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#define WIN_READ                        0x20 /* 28-Bit */
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#define WIN_READ_ONCE                        0x21 /* 28-Bit without retries */
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#define WIN_READ_LONG                        0x22 /* 28-Bit */
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#define WIN_READ_LONG_ONCE                0x23 /* 28-Bit without retries */
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#define WIN_READ_EXT                        0x24 /* 48-Bit */
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#define WIN_READDMA_EXT                        0x25 /* 48-Bit */
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#define WIN_READDMA_QUEUED_EXT                0x26 /* 48-Bit */
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#define WIN_READ_NATIVE_MAX_EXT                0x27 /* 48-Bit */
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/*
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 *        0x28
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 */
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#define WIN_MULTREAD_EXT                0x29 /* 48-Bit */
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/*
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 *        0x2A->0x2F Reserved
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 */
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#define WIN_WRITE                        0x30 /* 28-Bit */
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#define WIN_WRITE_ONCE                        0x31 /* 28-Bit without retries */
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#define WIN_WRITE_LONG                        0x32 /* 28-Bit */
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#define WIN_WRITE_LONG_ONCE                0x33 /* 28-Bit without retries */
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#define WIN_WRITE_EXT                        0x34 /* 48-Bit */
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#define WIN_WRITEDMA_EXT                0x35 /* 48-Bit */
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#define WIN_WRITEDMA_QUEUED_EXT                0x36 /* 48-Bit */
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#define WIN_SET_MAX_EXT                        0x37 /* 48-Bit */
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#define CFA_WRITE_SECT_WO_ERASE                0x38 /* CFA Write Sectors without erase */
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#define WIN_MULTWRITE_EXT                0x39 /* 48-Bit */
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/*
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 *        0x3A->0x3B Reserved
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 */
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#define WIN_WRITE_VERIFY                0x3C /* 28-Bit */
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/*
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 *        0x3D->0x3F Reserved
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 */
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#define WIN_VERIFY                        0x40 /* 28-Bit - Read Verify Sectors */
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#define WIN_VERIFY_ONCE                        0x41 /* 28-Bit - without retries */
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#define WIN_VERIFY_EXT                        0x42 /* 48-Bit */
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/*
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 *        0x43->0x4F Reserved
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 */
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#define WIN_FORMAT                        0x50
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/*
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 *        0x51->0x5F Reserved
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 */
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#define WIN_INIT                        0x60
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/*
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 *        0x61->0x5F Reserved
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 */
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#define WIN_SEEK                        0x70 /* 0x70-0x7F Reserved */
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#define CFA_TRANSLATE_SECTOR                0x87 /* CFA Translate Sector */
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#define WIN_DIAGNOSE                        0x90
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#define WIN_SPECIFY                        0x91 /* set drive geometry translation */
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#define WIN_DOWNLOAD_MICROCODE                0x92
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#define WIN_STANDBYNOW2                        0x94
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#define WIN_STANDBY2                        0x96
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#define WIN_SETIDLE2                        0x97
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#define WIN_CHECKPOWERMODE2                0x98
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#define WIN_SLEEPNOW2                        0x99
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/*
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 *        0x9A VENDOR
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 */
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#define WIN_PACKETCMD                        0xA0 /* Send a packet command. */
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#define WIN_PIDENTIFY                        0xA1 /* identify ATAPI device        */
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#define WIN_QUEUED_SERVICE                0xA2
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#define WIN_SMART                        0xB0 /* self-monitoring and reporting */
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#define CFA_ERASE_SECTORS               0xC0
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#define WIN_MULTREAD                        0xC4 /* read sectors using multiple mode*/
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#define WIN_MULTWRITE                        0xC5 /* write sectors using multiple mode */
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#define WIN_SETMULT                        0xC6 /* enable/disable multiple mode */
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#define WIN_READDMA_QUEUED                0xC7 /* read sectors using Queued DMA transfers */
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#define WIN_READDMA                        0xC8 /* read sectors using DMA transfers */
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#define WIN_READDMA_ONCE                0xC9 /* 28-Bit - without retries */
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#define WIN_WRITEDMA                        0xCA /* write sectors using DMA transfers */
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#define WIN_WRITEDMA_ONCE                0xCB /* 28-Bit - without retries */
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#define WIN_WRITEDMA_QUEUED                0xCC /* write sectors using Queued DMA transfers */
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#define CFA_WRITE_MULTI_WO_ERASE        0xCD /* CFA Write multiple without erase */
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#define WIN_GETMEDIASTATUS                0xDA        
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#define WIN_ACKMEDIACHANGE                0xDB /* ATA-1, ATA-2 vendor */
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#define WIN_POSTBOOT                        0xDC
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#define WIN_PREBOOT                        0xDD
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#define WIN_DOORLOCK                        0xDE /* lock door on removable drives */
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#define WIN_DOORUNLOCK                        0xDF /* unlock door on removable drives */
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#define WIN_STANDBYNOW1                        0xE0
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#define WIN_IDLEIMMEDIATE                0xE1 /* force drive to become "ready" */
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#define WIN_STANDBY                     0xE2 /* Set device in Standby Mode */
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#define WIN_SETIDLE1                        0xE3
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#define WIN_READ_BUFFER                        0xE4 /* force read only 1 sector */
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#define WIN_CHECKPOWERMODE1                0xE5
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#define WIN_SLEEPNOW1                        0xE6
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#define WIN_FLUSH_CACHE                        0xE7
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#define WIN_WRITE_BUFFER                0xE8 /* force write only 1 sector */
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#define WIN_WRITE_SAME                        0xE9 /* read ata-2 to use */
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        /* SET_FEATURES 0x22 or 0xDD */
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#define WIN_FLUSH_CACHE_EXT                0xEA /* 48-Bit */
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#define WIN_IDENTIFY                        0xEC /* ask drive to identify itself        */
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#define WIN_MEDIAEJECT                        0xED
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#define WIN_IDENTIFY_DMA                0xEE /* same as WIN_IDENTIFY, but DMA */
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#define WIN_SETFEATURES                        0xEF /* set special drive features */
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#define EXABYTE_ENABLE_NEST                0xF0
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#define WIN_SECURITY_SET_PASS                0xF1
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#define WIN_SECURITY_UNLOCK                0xF2
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#define WIN_SECURITY_ERASE_PREPARE        0xF3
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#define WIN_SECURITY_ERASE_UNIT                0xF4
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#define WIN_SECURITY_FREEZE_LOCK        0xF5
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#define WIN_SECURITY_DISABLE                0xF6
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#define WIN_READ_NATIVE_MAX                0xF8 /* return the native maximum address */
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#define WIN_SET_MAX                        0xF9
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#define DISABLE_SEAGATE                        0xFB
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/* set to 1 set disable mult support */
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#define MAX_MULT_SECTORS 16
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/* ATAPI defines */
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#define ATAPI_PACKET_SIZE 12
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/* The generic packet command opcodes for CD/DVD Logical Units,
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 * From Table 57 of the SFF8090 Ver. 3 (Mt. Fuji) draft standard. */
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#define GPCMD_BLANK                            0xa1
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#define GPCMD_CLOSE_TRACK                    0x5b
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#define GPCMD_FLUSH_CACHE                    0x35
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#define GPCMD_FORMAT_UNIT                    0x04
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#define GPCMD_GET_CONFIGURATION                    0x46
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#define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a
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#define GPCMD_GET_PERFORMANCE                    0xac
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#define GPCMD_INQUIRY                            0x12
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#define GPCMD_LOAD_UNLOAD                    0xa6
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#define GPCMD_MECHANISM_STATUS                    0xbd
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#define GPCMD_MODE_SELECT_10                    0x55
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#define GPCMD_MODE_SENSE_10                    0x5a
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#define GPCMD_PAUSE_RESUME                    0x4b
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#define GPCMD_PLAY_AUDIO_10                    0x45
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#define GPCMD_PLAY_AUDIO_MSF                    0x47
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#define GPCMD_PLAY_AUDIO_TI                    0x48
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#define GPCMD_PLAY_CD                            0xbc
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#define GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL  0x1e
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#define GPCMD_READ_10                            0x28
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#define GPCMD_READ_12                            0xa8
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#define GPCMD_READ_CDVD_CAPACITY            0x25
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#define GPCMD_READ_CD                            0xbe
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#define GPCMD_READ_CD_MSF                    0xb9
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#define GPCMD_READ_DISC_INFO                    0x51
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#define GPCMD_READ_DVD_STRUCTURE            0xad
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#define GPCMD_READ_FORMAT_CAPACITIES            0x23
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#define GPCMD_READ_HEADER                    0x44
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#define GPCMD_READ_TRACK_RZONE_INFO            0x52
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#define GPCMD_READ_SUBCHANNEL                    0x42
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#define GPCMD_READ_TOC_PMA_ATIP                    0x43
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#define GPCMD_REPAIR_RZONE_TRACK            0x58
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#define GPCMD_REPORT_KEY                    0xa4
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#define GPCMD_REQUEST_SENSE                    0x03
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#define GPCMD_RESERVE_RZONE_TRACK            0x53
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#define GPCMD_SCAN                            0xba
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#define GPCMD_SEEK                            0x2b
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#define GPCMD_SEND_DVD_STRUCTURE            0xad
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#define GPCMD_SEND_EVENT                    0xa2
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#define GPCMD_SEND_KEY                            0xa3
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#define GPCMD_SEND_OPC                            0x54
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#define GPCMD_SET_READ_AHEAD                    0xa7
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#define GPCMD_SET_STREAMING                    0xb6
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#define GPCMD_START_STOP_UNIT                    0x1b
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#define GPCMD_STOP_PLAY_SCAN                    0x4e
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#define GPCMD_TEST_UNIT_READY                    0x00
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#define GPCMD_VERIFY_10                            0x2f
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#define GPCMD_WRITE_10                            0x2a
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#define GPCMD_WRITE_AND_VERIFY_10            0x2e
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/* This is listed as optional in ATAPI 2.6, but is (curiously) 
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 * missing from Mt. Fuji, Table 57.  It _is_ mentioned in Mt. Fuji
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 * Table 377 as an MMC command for SCSi devices though...  Most ATAPI
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 * drives support it. */
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#define GPCMD_SET_SPEED                            0xbb
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/* This seems to be a SCSI specific CD-ROM opcode 
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 * to play data at track/index */
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#define GPCMD_PLAYAUDIO_TI                    0x48
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/*
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 * From MS Media Status Notification Support Specification. For
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 * older drives only.
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 */
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#define GPCMD_GET_MEDIA_STATUS                    0xda
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/* Mode page codes for mode sense/set */
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#define GPMODE_R_W_ERROR_PAGE                0x01
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#define GPMODE_WRITE_PARMS_PAGE                0x05
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#define GPMODE_AUDIO_CTL_PAGE                0x0e
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#define GPMODE_POWER_PAGE                0x1a
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#define GPMODE_FAULT_FAIL_PAGE                0x1c
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#define GPMODE_TO_PROTECT_PAGE                0x1d
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#define GPMODE_CAPABILITIES_PAGE        0x2a
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#define GPMODE_ALL_PAGES                0x3f
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/* Not in Mt. Fuji, but in ATAPI 2.6 -- depricated now in favor
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 * of MODE_SENSE_POWER_PAGE */
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#define GPMODE_CDROM_PAGE                0x0d
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#define ATAPI_INT_REASON_CD             0x01 /* 0 = data transfer */
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#define ATAPI_INT_REASON_IO             0x02 /* 1 = transfer to the host */
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#define ATAPI_INT_REASON_REL            0x04
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#define ATAPI_INT_REASON_TAG            0xf8
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/* same constants as bochs */
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#define ASC_ILLEGAL_OPCODE                   0x20
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#define ASC_LOGICAL_BLOCK_OOR                0x21
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#define ASC_INV_FIELD_IN_CMD_PACKET          0x24
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#define ASC_MEDIUM_NOT_PRESENT               0x3a
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#define ASC_SAVING_PARAMETERS_NOT_SUPPORTED  0x39
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#define SENSE_NONE            0
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#define SENSE_NOT_READY       2
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#define SENSE_ILLEGAL_REQUEST 5
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#define SENSE_UNIT_ATTENTION  6
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struct IDEState;
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typedef void EndTransferFunc(struct IDEState *);
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/* NOTE: IDEState represents in fact one drive */
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typedef struct IDEState {
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    /* ide config */
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    int is_cdrom;
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    int cylinders, heads, sectors;
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    int64_t nb_sectors;
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    int mult_sectors;
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    int irq;
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    openpic_t *openpic;
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    PCIDevice *pci_dev;
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    int drive_serial;
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    /* ide regs */
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    uint8_t feature;
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    uint8_t error;
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    uint16_t nsector; /* 0 is 256 to ease computations */
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    uint8_t sector;
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    uint8_t lcyl;
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    uint8_t hcyl;
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    uint8_t select;
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    uint8_t status;
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    /* 0x3f6 command, only meaningful for drive 0 */
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    uint8_t cmd;
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    /* depends on bit 4 in select, only meaningful for drive 0 */
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    struct IDEState *cur_drive; 
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    BlockDriverState *bs;
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    /* ATAPI specific */
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    uint8_t sense_key;
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    uint8_t asc;
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    int packet_transfer_size;
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    int elementary_transfer_size;
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    int io_buffer_index;
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    int lba;
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    /* transfer handling */
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    int req_nb_sectors; /* number of sectors per interrupt */
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    EndTransferFunc *end_transfer_func;
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    uint8_t *data_ptr;
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    uint8_t *data_end;
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    uint8_t io_buffer[MAX_MULT_SECTORS*512 + 4];
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} IDEState;
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static void padstr(char *str, const char *src, int len)
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{
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    int i, v;
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    for(i = 0; i < len; i++) {
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        if (*src)
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            v = *src++;
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        else
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            v = ' ';
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        *(char *)((long)str ^ 1) = v;
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        str++;
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    }
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}
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static void padstr8(uint8_t *buf, int buf_size, const char *src)
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{
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    int i;
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    for(i = 0; i < buf_size; i++) {
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        if (*src)
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            buf[i] = *src++;
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        else
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            buf[i] = ' ';
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    }
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}
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static void put_le16(uint16_t *p, unsigned int v)
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{
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    *p = cpu_to_le16(v);
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}
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361 5391d806 bellard
static void ide_identify(IDEState *s)
362 5391d806 bellard
{
363 5391d806 bellard
    uint16_t *p;
364 5391d806 bellard
    unsigned int oldsize;
365 aedf5382 bellard
    char buf[20];
366 5391d806 bellard
367 5391d806 bellard
    memset(s->io_buffer, 0, 512);
368 5391d806 bellard
    p = (uint16_t *)s->io_buffer;
369 67b915a5 bellard
    put_le16(p + 0, 0x0040);
370 67b915a5 bellard
    put_le16(p + 1, s->cylinders); 
371 67b915a5 bellard
    put_le16(p + 3, s->heads);
372 67b915a5 bellard
    put_le16(p + 4, 512 * s->sectors); /* XXX: retired, remove ? */
373 67b915a5 bellard
    put_le16(p + 5, 512); /* XXX: retired, remove ? */
374 67b915a5 bellard
    put_le16(p + 6, s->sectors); 
375 aedf5382 bellard
    snprintf(buf, sizeof(buf), "QM%05d", s->drive_serial);
376 aedf5382 bellard
    padstr((uint8_t *)(p + 10), buf, 20); /* serial number */
377 67b915a5 bellard
    put_le16(p + 20, 3); /* XXX: retired, remove ? */
378 67b915a5 bellard
    put_le16(p + 21, 512); /* cache size in sectors */
379 67b915a5 bellard
    put_le16(p + 22, 4); /* ecc bytes */
380 5391d806 bellard
    padstr((uint8_t *)(p + 23), QEMU_VERSION, 8); /* firmware version */
381 5391d806 bellard
    padstr((uint8_t *)(p + 27), "QEMU HARDDISK", 40); /* model */
382 5391d806 bellard
#if MAX_MULT_SECTORS > 1    
383 67b915a5 bellard
    put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS);
384 5391d806 bellard
#endif
385 67b915a5 bellard
    put_le16(p + 48, 1); /* dword I/O */
386 67b915a5 bellard
    put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */
387 67b915a5 bellard
    put_le16(p + 51, 0x200); /* PIO transfer cycle */
388 67b915a5 bellard
    put_le16(p + 52, 0x200); /* DMA transfer cycle */
389 67b915a5 bellard
    put_le16(p + 53, 1); /* words 54-58 are valid */
390 67b915a5 bellard
    put_le16(p + 54, s->cylinders);
391 67b915a5 bellard
    put_le16(p + 55, s->heads);
392 67b915a5 bellard
    put_le16(p + 56, s->sectors);
393 5391d806 bellard
    oldsize = s->cylinders * s->heads * s->sectors;
394 67b915a5 bellard
    put_le16(p + 57, oldsize);
395 67b915a5 bellard
    put_le16(p + 58, oldsize >> 16);
396 5391d806 bellard
    if (s->mult_sectors)
397 67b915a5 bellard
        put_le16(p + 59, 0x100 | s->mult_sectors);
398 67b915a5 bellard
    put_le16(p + 60, s->nb_sectors);
399 67b915a5 bellard
    put_le16(p + 61, s->nb_sectors >> 16);
400 67b915a5 bellard
    put_le16(p + 80, (1 << 1) | (1 << 2));
401 67b915a5 bellard
    put_le16(p + 82, (1 << 14));
402 67b915a5 bellard
    put_le16(p + 83, (1 << 14));
403 67b915a5 bellard
    put_le16(p + 84, (1 << 14));
404 67b915a5 bellard
    put_le16(p + 85, (1 << 14));
405 67b915a5 bellard
    put_le16(p + 86, 0);
406 67b915a5 bellard
    put_le16(p + 87, (1 << 14));
407 5391d806 bellard
}
408 5391d806 bellard
409 5391d806 bellard
static void ide_atapi_identify(IDEState *s)
410 5391d806 bellard
{
411 5391d806 bellard
    uint16_t *p;
412 aedf5382 bellard
    char buf[20];
413 5391d806 bellard
414 5391d806 bellard
    memset(s->io_buffer, 0, 512);
415 5391d806 bellard
    p = (uint16_t *)s->io_buffer;
416 5391d806 bellard
    /* Removable CDROM, 50us response, 12 byte packets */
417 67b915a5 bellard
    put_le16(p + 0, (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0));
418 aedf5382 bellard
    snprintf(buf, sizeof(buf), "QM%05d", s->drive_serial);
419 aedf5382 bellard
    padstr((uint8_t *)(p + 10), buf, 20); /* serial number */
420 67b915a5 bellard
    put_le16(p + 20, 3); /* buffer type */
421 67b915a5 bellard
    put_le16(p + 21, 512); /* cache size in sectors */
422 67b915a5 bellard
    put_le16(p + 22, 4); /* ecc bytes */
423 5391d806 bellard
    padstr((uint8_t *)(p + 23), QEMU_VERSION, 8); /* firmware version */
424 5391d806 bellard
    padstr((uint8_t *)(p + 27), "QEMU CD-ROM", 40); /* model */
425 67b915a5 bellard
    put_le16(p + 48, 1); /* dword I/O (XXX: should not be set on CDROM) */
426 67b915a5 bellard
    put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */
427 67b915a5 bellard
    put_le16(p + 53, 3); /* words 64-70, 54-58 valid */
428 67b915a5 bellard
    put_le16(p + 63, 0x103); /* DMA modes XXX: may be incorrect */
429 67b915a5 bellard
    put_le16(p + 64, 1); /* PIO modes */
430 67b915a5 bellard
    put_le16(p + 65, 0xb4); /* minimum DMA multiword tx cycle time */
431 67b915a5 bellard
    put_le16(p + 66, 0xb4); /* recommended DMA multiword tx cycle time */
432 67b915a5 bellard
    put_le16(p + 67, 0x12c); /* minimum PIO cycle time without flow control */
433 67b915a5 bellard
    put_le16(p + 68, 0xb4); /* minimum PIO cycle time with IORDY flow control */
434 5391d806 bellard
    
435 67b915a5 bellard
    put_le16(p + 71, 30); /* in ns */
436 67b915a5 bellard
    put_le16(p + 72, 30); /* in ns */
437 5391d806 bellard
438 67b915a5 bellard
    put_le16(p + 80, 0x1e); /* support up to ATA/ATAPI-4 */
439 5391d806 bellard
}
440 5391d806 bellard
441 5391d806 bellard
static void ide_set_signature(IDEState *s)
442 5391d806 bellard
{
443 5391d806 bellard
    s->select &= 0xf0; /* clear head */
444 5391d806 bellard
    /* put signature */
445 5391d806 bellard
    s->nsector = 1;
446 5391d806 bellard
    s->sector = 1;
447 5391d806 bellard
    if (s->is_cdrom) {
448 5391d806 bellard
        s->lcyl = 0x14;
449 5391d806 bellard
        s->hcyl = 0xeb;
450 5391d806 bellard
    } else if (s->bs) {
451 5391d806 bellard
        s->lcyl = 0;
452 5391d806 bellard
        s->hcyl = 0;
453 5391d806 bellard
    } else {
454 5391d806 bellard
        s->lcyl = 0xff;
455 5391d806 bellard
        s->hcyl = 0xff;
456 5391d806 bellard
    }
457 5391d806 bellard
}
458 5391d806 bellard
459 5391d806 bellard
static inline void ide_abort_command(IDEState *s)
460 5391d806 bellard
{
461 5391d806 bellard
    s->status = READY_STAT | ERR_STAT;
462 5391d806 bellard
    s->error = ABRT_ERR;
463 5391d806 bellard
}
464 5391d806 bellard
465 5391d806 bellard
static inline void ide_set_irq(IDEState *s)
466 5391d806 bellard
{
467 5391d806 bellard
    if (!(s->cmd & IDE_CMD_DISABLE_IRQ)) {
468 1ade1de2 bellard
#ifdef TARGET_PPC
469 1ade1de2 bellard
        if (s->openpic) 
470 1ade1de2 bellard
            openpic_set_irq(s->openpic, s->irq, 1);
471 1ade1de2 bellard
        else 
472 1ade1de2 bellard
#endif
473 34e538ae bellard
        if (s->irq == 16)
474 34e538ae bellard
            pci_set_irq(s->pci_dev, 0, 1);
475 34e538ae bellard
        else
476 34e538ae bellard
            pic_set_irq(s->irq, 1);
477 5391d806 bellard
    }
478 5391d806 bellard
}
479 5391d806 bellard
480 5391d806 bellard
/* prepare data transfer and tell what to do after */
481 5391d806 bellard
static void ide_transfer_start(IDEState *s, uint8_t *buf, int size, 
482 5391d806 bellard
                               EndTransferFunc *end_transfer_func)
483 5391d806 bellard
{
484 5391d806 bellard
    s->end_transfer_func = end_transfer_func;
485 5391d806 bellard
    s->data_ptr = buf;
486 5391d806 bellard
    s->data_end = buf + size;
487 5391d806 bellard
    s->status |= DRQ_STAT;
488 5391d806 bellard
}
489 5391d806 bellard
490 5391d806 bellard
static void ide_transfer_stop(IDEState *s)
491 5391d806 bellard
{
492 5391d806 bellard
    s->end_transfer_func = ide_transfer_stop;
493 5391d806 bellard
    s->data_ptr = s->io_buffer;
494 5391d806 bellard
    s->data_end = s->io_buffer;
495 5391d806 bellard
    s->status &= ~DRQ_STAT;
496 5391d806 bellard
}
497 5391d806 bellard
498 5391d806 bellard
static int64_t ide_get_sector(IDEState *s)
499 5391d806 bellard
{
500 5391d806 bellard
    int64_t sector_num;
501 5391d806 bellard
    if (s->select & 0x40) {
502 5391d806 bellard
        /* lba */
503 5391d806 bellard
        sector_num = ((s->select & 0x0f) << 24) | (s->hcyl << 16) | 
504 5391d806 bellard
            (s->lcyl << 8) | s->sector;
505 5391d806 bellard
    } else {
506 5391d806 bellard
        sector_num = ((s->hcyl << 8) | s->lcyl) * s->heads * s->sectors +
507 5391d806 bellard
            (s->select & 0x0f) * s->sectors + 
508 5391d806 bellard
            (s->sector - 1);
509 5391d806 bellard
    }
510 5391d806 bellard
    return sector_num;
511 5391d806 bellard
}
512 5391d806 bellard
513 5391d806 bellard
static void ide_set_sector(IDEState *s, int64_t sector_num)
514 5391d806 bellard
{
515 5391d806 bellard
    unsigned int cyl, r;
516 5391d806 bellard
    if (s->select & 0x40) {
517 5391d806 bellard
        s->select = (s->select & 0xf0) | (sector_num >> 24);
518 5391d806 bellard
        s->hcyl = (sector_num >> 16);
519 5391d806 bellard
        s->lcyl = (sector_num >> 8);
520 5391d806 bellard
        s->sector = (sector_num);
521 5391d806 bellard
    } else {
522 5391d806 bellard
        cyl = sector_num / (s->heads * s->sectors);
523 5391d806 bellard
        r = sector_num % (s->heads * s->sectors);
524 5391d806 bellard
        s->hcyl = cyl >> 8;
525 5391d806 bellard
        s->lcyl = cyl;
526 1b8eb456 bellard
        s->select = (s->select & 0xf0) | ((r / s->sectors) & 0x0f);
527 5391d806 bellard
        s->sector = (r % s->sectors) + 1;
528 5391d806 bellard
    }
529 5391d806 bellard
}
530 5391d806 bellard
531 5391d806 bellard
static void ide_sector_read(IDEState *s)
532 5391d806 bellard
{
533 5391d806 bellard
    int64_t sector_num;
534 5391d806 bellard
    int ret, n;
535 5391d806 bellard
536 5391d806 bellard
    s->status = READY_STAT | SEEK_STAT;
537 a136e5a8 bellard
    s->error = 0; /* not needed by IDE spec, but needed by Windows */
538 5391d806 bellard
    sector_num = ide_get_sector(s);
539 5391d806 bellard
    n = s->nsector;
540 5391d806 bellard
    if (n == 0) {
541 5391d806 bellard
        /* no more sector to read from disk */
542 5391d806 bellard
        ide_transfer_stop(s);
543 5391d806 bellard
    } else {
544 5391d806 bellard
#if defined(DEBUG_IDE)
545 5391d806 bellard
        printf("read sector=%Ld\n", sector_num);
546 5391d806 bellard
#endif
547 5391d806 bellard
        if (n > s->req_nb_sectors)
548 5391d806 bellard
            n = s->req_nb_sectors;
549 5391d806 bellard
        ret = bdrv_read(s->bs, sector_num, s->io_buffer, n);
550 5391d806 bellard
        ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_read);
551 5391d806 bellard
        ide_set_irq(s);
552 5391d806 bellard
        ide_set_sector(s, sector_num + n);
553 5391d806 bellard
        s->nsector -= n;
554 5391d806 bellard
    }
555 5391d806 bellard
}
556 5391d806 bellard
557 5391d806 bellard
static void ide_sector_write(IDEState *s)
558 5391d806 bellard
{
559 5391d806 bellard
    int64_t sector_num;
560 5391d806 bellard
    int ret, n, n1;
561 5391d806 bellard
562 5391d806 bellard
    s->status = READY_STAT | SEEK_STAT;
563 5391d806 bellard
    sector_num = ide_get_sector(s);
564 5391d806 bellard
#if defined(DEBUG_IDE)
565 5391d806 bellard
    printf("write sector=%Ld\n", sector_num);
566 5391d806 bellard
#endif
567 5391d806 bellard
    n = s->nsector;
568 5391d806 bellard
    if (n > s->req_nb_sectors)
569 5391d806 bellard
        n = s->req_nb_sectors;
570 5391d806 bellard
    ret = bdrv_write(s->bs, sector_num, s->io_buffer, n);
571 5391d806 bellard
    s->nsector -= n;
572 5391d806 bellard
    if (s->nsector == 0) {
573 5391d806 bellard
        /* no more sector to write */
574 5391d806 bellard
        ide_transfer_stop(s);
575 5391d806 bellard
    } else {
576 5391d806 bellard
        n1 = s->nsector;
577 5391d806 bellard
        if (n1 > s->req_nb_sectors)
578 5391d806 bellard
            n1 = s->req_nb_sectors;
579 5391d806 bellard
        ide_transfer_start(s, s->io_buffer, 512 * n1, ide_sector_write);
580 5391d806 bellard
    }
581 5391d806 bellard
    ide_set_sector(s, sector_num + n);
582 5391d806 bellard
    ide_set_irq(s);
583 5391d806 bellard
}
584 5391d806 bellard
585 5391d806 bellard
static void ide_atapi_cmd_ok(IDEState *s)
586 5391d806 bellard
{
587 5391d806 bellard
    s->error = 0;
588 5391d806 bellard
    s->status = READY_STAT;
589 5391d806 bellard
    s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
590 5391d806 bellard
    ide_set_irq(s);
591 5391d806 bellard
}
592 5391d806 bellard
593 5391d806 bellard
static void ide_atapi_cmd_error(IDEState *s, int sense_key, int asc)
594 5391d806 bellard
{
595 5391d806 bellard
#ifdef DEBUG_IDE_ATAPI
596 5391d806 bellard
    printf("atapi_cmd_error: sense=0x%x asc=0x%x\n", sense_key, asc);
597 5391d806 bellard
#endif
598 5391d806 bellard
    s->error = sense_key << 4;
599 5391d806 bellard
    s->status = READY_STAT | ERR_STAT;
600 5391d806 bellard
    s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
601 5391d806 bellard
    s->sense_key = sense_key;
602 5391d806 bellard
    s->asc = asc;
603 5391d806 bellard
    ide_set_irq(s);
604 5391d806 bellard
}
605 5391d806 bellard
606 5391d806 bellard
static inline void cpu_to_ube16(uint8_t *buf, int val)
607 5391d806 bellard
{
608 5391d806 bellard
    buf[0] = val >> 8;
609 5391d806 bellard
    buf[1] = val;
610 5391d806 bellard
}
611 5391d806 bellard
612 5391d806 bellard
static inline void cpu_to_ube32(uint8_t *buf, unsigned int val)
613 5391d806 bellard
{
614 5391d806 bellard
    buf[0] = val >> 24;
615 5391d806 bellard
    buf[1] = val >> 16;
616 5391d806 bellard
    buf[2] = val >> 8;
617 5391d806 bellard
    buf[3] = val;
618 5391d806 bellard
}
619 5391d806 bellard
620 5391d806 bellard
static inline int ube16_to_cpu(const uint8_t *buf)
621 5391d806 bellard
{
622 5391d806 bellard
    return (buf[0] << 8) | buf[1];
623 5391d806 bellard
}
624 5391d806 bellard
625 5391d806 bellard
static inline int ube32_to_cpu(const uint8_t *buf)
626 5391d806 bellard
{
627 5391d806 bellard
    return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
628 5391d806 bellard
}
629 5391d806 bellard
630 5391d806 bellard
/* The whole ATAPI transfer logic is handled in this function */
631 5391d806 bellard
static void ide_atapi_cmd_reply_end(IDEState *s)
632 5391d806 bellard
{
633 5391d806 bellard
    int byte_count_limit, size;
634 5391d806 bellard
#ifdef DEBUG_IDE_ATAPI
635 5391d806 bellard
    printf("reply: tx_size=%d elem_tx_size=%d index=%d\n", 
636 5391d806 bellard
           s->packet_transfer_size,
637 5391d806 bellard
           s->elementary_transfer_size,
638 5391d806 bellard
           s->io_buffer_index);
639 5391d806 bellard
#endif
640 5391d806 bellard
    if (s->packet_transfer_size <= 0) {
641 5391d806 bellard
        /* end of transfer */
642 5391d806 bellard
        ide_transfer_stop(s);
643 5391d806 bellard
        s->status = READY_STAT;
644 5391d806 bellard
        s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
645 5391d806 bellard
        ide_set_irq(s);
646 5391d806 bellard
#ifdef DEBUG_IDE_ATAPI
647 5391d806 bellard
        printf("status=0x%x\n", s->status);
648 5391d806 bellard
#endif
649 5391d806 bellard
    } else {
650 5391d806 bellard
        /* see if a new sector must be read */
651 5391d806 bellard
        if (s->lba != -1 && s->io_buffer_index >= 2048) {
652 5391d806 bellard
            bdrv_read(s->bs, (int64_t)s->lba << 2, s->io_buffer, 4);
653 5391d806 bellard
            s->lba++;
654 5391d806 bellard
            s->io_buffer_index = 0;
655 5391d806 bellard
        }
656 5391d806 bellard
        if (s->elementary_transfer_size > 0) {
657 5391d806 bellard
            /* there are some data left to transmit in this elementary
658 5391d806 bellard
               transfer */
659 5391d806 bellard
            size = 2048 - s->io_buffer_index;
660 5391d806 bellard
            if (size > s->elementary_transfer_size)
661 5391d806 bellard
                size = s->elementary_transfer_size;
662 5391d806 bellard
            ide_transfer_start(s, s->io_buffer + s->io_buffer_index, 
663 5391d806 bellard
                               size, ide_atapi_cmd_reply_end);
664 5391d806 bellard
            s->packet_transfer_size -= size;
665 5391d806 bellard
            s->elementary_transfer_size -= size;
666 5391d806 bellard
            s->io_buffer_index += size;
667 5391d806 bellard
        } else {
668 5391d806 bellard
            /* a new transfer is needed */
669 5391d806 bellard
            s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO;
670 5391d806 bellard
            byte_count_limit = s->lcyl | (s->hcyl << 8);
671 5391d806 bellard
#ifdef DEBUG_IDE_ATAPI
672 5391d806 bellard
            printf("byte_count_limit=%d\n", byte_count_limit);
673 5391d806 bellard
#endif
674 5391d806 bellard
            if (byte_count_limit == 0xffff)
675 5391d806 bellard
                byte_count_limit--;
676 5391d806 bellard
            size = s->packet_transfer_size;
677 5391d806 bellard
            if (size > byte_count_limit) {
678 5391d806 bellard
                /* byte count limit must be even if this case */
679 5391d806 bellard
                if (byte_count_limit & 1)
680 5391d806 bellard
                    byte_count_limit--;
681 5391d806 bellard
                size = byte_count_limit;
682 5391d806 bellard
            }
683 a136e5a8 bellard
            s->lcyl = size;
684 a136e5a8 bellard
            s->hcyl = size >> 8;
685 5391d806 bellard
            s->elementary_transfer_size = size;
686 5391d806 bellard
            /* we cannot transmit more than one sector at a time */
687 5391d806 bellard
            if (s->lba != -1) {
688 5391d806 bellard
                if (size > (2048 - s->io_buffer_index))
689 5391d806 bellard
                    size = (2048 - s->io_buffer_index);
690 5391d806 bellard
            }
691 5391d806 bellard
            ide_transfer_start(s, s->io_buffer + s->io_buffer_index, 
692 5391d806 bellard
                               size, ide_atapi_cmd_reply_end);
693 5391d806 bellard
            s->packet_transfer_size -= size;
694 5391d806 bellard
            s->elementary_transfer_size -= size;
695 5391d806 bellard
            s->io_buffer_index += size;
696 5391d806 bellard
            ide_set_irq(s);
697 5391d806 bellard
#ifdef DEBUG_IDE_ATAPI
698 5391d806 bellard
            printf("status=0x%x\n", s->status);
699 5391d806 bellard
#endif
700 5391d806 bellard
        }
701 5391d806 bellard
    }
702 5391d806 bellard
}
703 5391d806 bellard
704 5391d806 bellard
/* send a reply of 'size' bytes in s->io_buffer to an ATAPI command */
705 5391d806 bellard
static void ide_atapi_cmd_reply(IDEState *s, int size, int max_size)
706 5391d806 bellard
{
707 5391d806 bellard
    if (size > max_size)
708 5391d806 bellard
        size = max_size;
709 5391d806 bellard
    s->lba = -1; /* no sector read */
710 5391d806 bellard
    s->packet_transfer_size = size;
711 5391d806 bellard
    s->elementary_transfer_size = 0;
712 5391d806 bellard
    s->io_buffer_index = 0;
713 5391d806 bellard
714 5391d806 bellard
    s->status = READY_STAT;
715 5391d806 bellard
    ide_atapi_cmd_reply_end(s);
716 5391d806 bellard
}
717 5391d806 bellard
718 5391d806 bellard
/* start a CD-CDROM read command */
719 5391d806 bellard
static void ide_atapi_cmd_read(IDEState *s, int lba, int nb_sectors)
720 5391d806 bellard
{
721 5391d806 bellard
#ifdef DEBUG_IDE_ATAPI
722 5391d806 bellard
    printf("read: LBA=%d nb_sectors=%d\n", lba, nb_sectors);
723 5391d806 bellard
#endif
724 5391d806 bellard
    s->lba = lba;
725 5391d806 bellard
    s->packet_transfer_size = nb_sectors * 2048;
726 5391d806 bellard
    s->elementary_transfer_size = 0;
727 5391d806 bellard
    s->io_buffer_index = 2048;
728 5391d806 bellard
729 5391d806 bellard
    s->status = READY_STAT;
730 5391d806 bellard
    ide_atapi_cmd_reply_end(s);
731 5391d806 bellard
}
732 5391d806 bellard
733 5391d806 bellard
/* same toc as bochs. Return -1 if error or the toc length */
734 5391d806 bellard
static int cdrom_read_toc(IDEState *s, uint8_t *buf, int msf, int start_track)
735 5391d806 bellard
{
736 5391d806 bellard
    uint8_t *q;
737 5391d806 bellard
    int nb_sectors, len;
738 5391d806 bellard
    
739 5391d806 bellard
    if (start_track > 1 && start_track != 0xaa)
740 5391d806 bellard
        return -1;
741 5391d806 bellard
    q = buf + 2;
742 5391d806 bellard
    *q++ = 1;
743 5391d806 bellard
    *q++ = 1;
744 5391d806 bellard
    if (start_track <= 1) {
745 5391d806 bellard
        *q++ = 0; /* reserved */
746 5391d806 bellard
        *q++ = 0x14; /* ADR, control */
747 5391d806 bellard
        *q++ = 1;    /* track number */
748 5391d806 bellard
        *q++ = 0; /* reserved */
749 5391d806 bellard
        if (msf) {
750 5391d806 bellard
            *q++ = 0; /* reserved */
751 5391d806 bellard
            *q++ = 0; /* minute */
752 5391d806 bellard
            *q++ = 2; /* second */
753 5391d806 bellard
            *q++ = 0; /* frame */
754 5391d806 bellard
        } else {
755 5391d806 bellard
            /* sector 0 */
756 5391d806 bellard
            cpu_to_ube32(q, 0);
757 5391d806 bellard
            q += 4;
758 5391d806 bellard
        }
759 5391d806 bellard
    }
760 5391d806 bellard
    /* lead out track */
761 5391d806 bellard
    *q++ = 0; /* reserved */
762 5391d806 bellard
    *q++ = 0x16; /* ADR, control */
763 5391d806 bellard
    *q++ = 0xaa; /* track number */
764 5391d806 bellard
    *q++ = 0; /* reserved */
765 5391d806 bellard
    nb_sectors = s->nb_sectors >> 2;
766 5391d806 bellard
    if (msf) {
767 5391d806 bellard
        *q++ = 0; /* reserved */
768 5391d806 bellard
        *q++ = ((nb_sectors + 150) / 75) / 60;
769 5391d806 bellard
        *q++ = ((nb_sectors + 150) / 75) % 60;
770 5391d806 bellard
        *q++ = (nb_sectors + 150) % 75;
771 5391d806 bellard
    } else {
772 5391d806 bellard
        cpu_to_ube32(q, nb_sectors);
773 5391d806 bellard
        q += 4;
774 5391d806 bellard
    }
775 5391d806 bellard
    len = q - buf;
776 5391d806 bellard
    cpu_to_ube16(buf, len - 2);
777 5391d806 bellard
    return len;
778 5391d806 bellard
}
779 5391d806 bellard
780 5391d806 bellard
static void ide_atapi_cmd(IDEState *s)
781 5391d806 bellard
{
782 5391d806 bellard
    const uint8_t *packet;
783 5391d806 bellard
    uint8_t *buf;
784 5391d806 bellard
    int max_len;
785 5391d806 bellard
786 5391d806 bellard
    packet = s->io_buffer;
787 5391d806 bellard
    buf = s->io_buffer;
788 5391d806 bellard
#ifdef DEBUG_IDE_ATAPI
789 5391d806 bellard
    {
790 5391d806 bellard
        int i;
791 5391d806 bellard
        printf("ATAPI limit=0x%x packet:", s->lcyl | (s->hcyl << 8));
792 5391d806 bellard
        for(i = 0; i < ATAPI_PACKET_SIZE; i++) {
793 5391d806 bellard
            printf(" %02x", packet[i]);
794 5391d806 bellard
        }
795 5391d806 bellard
        printf("\n");
796 5391d806 bellard
    }
797 5391d806 bellard
#endif
798 5391d806 bellard
    switch(s->io_buffer[0]) {
799 5391d806 bellard
    case GPCMD_TEST_UNIT_READY:
800 caed8802 bellard
        if (bdrv_is_inserted(s->bs)) {
801 5391d806 bellard
            ide_atapi_cmd_ok(s);
802 5391d806 bellard
        } else {
803 5391d806 bellard
            ide_atapi_cmd_error(s, SENSE_NOT_READY, 
804 5391d806 bellard
                                ASC_MEDIUM_NOT_PRESENT);
805 5391d806 bellard
        }
806 5391d806 bellard
        break;
807 5391d806 bellard
    case GPCMD_MODE_SENSE_10:
808 5391d806 bellard
        {
809 5391d806 bellard
            int action, code;
810 5391d806 bellard
            max_len = ube16_to_cpu(packet + 7);
811 5391d806 bellard
            action = packet[2] >> 6;
812 5391d806 bellard
            code = packet[2] & 0x3f;
813 5391d806 bellard
            switch(action) {
814 5391d806 bellard
            case 0: /* current values */
815 5391d806 bellard
                switch(code) {
816 5391d806 bellard
                case 0x01: /* error recovery */
817 5391d806 bellard
                    cpu_to_ube16(&buf[0], 16 + 6);
818 5391d806 bellard
                    buf[2] = 0x70;
819 5391d806 bellard
                    buf[3] = 0;
820 5391d806 bellard
                    buf[4] = 0;
821 5391d806 bellard
                    buf[5] = 0;
822 5391d806 bellard
                    buf[6] = 0;
823 5391d806 bellard
                    buf[7] = 0;
824 5391d806 bellard
825 5391d806 bellard
                    buf[8] = 0x01;
826 5391d806 bellard
                    buf[9] = 0x06;
827 5391d806 bellard
                    buf[10] = 0x00;
828 5391d806 bellard
                    buf[11] = 0x05;
829 5391d806 bellard
                    buf[12] = 0x00;
830 5391d806 bellard
                    buf[13] = 0x00;
831 5391d806 bellard
                    buf[14] = 0x00;
832 5391d806 bellard
                    buf[15] = 0x00;
833 5391d806 bellard
                    ide_atapi_cmd_reply(s, 16, max_len);
834 5391d806 bellard
                    break;
835 5391d806 bellard
                case 0x2a:
836 5391d806 bellard
                    cpu_to_ube16(&buf[0], 28 + 6);
837 5391d806 bellard
                    buf[2] = 0x70;
838 5391d806 bellard
                    buf[3] = 0;
839 5391d806 bellard
                    buf[4] = 0;
840 5391d806 bellard
                    buf[5] = 0;
841 5391d806 bellard
                    buf[6] = 0;
842 5391d806 bellard
                    buf[7] = 0;
843 5391d806 bellard
844 5391d806 bellard
                    buf[8] = 0x2a;
845 5391d806 bellard
                    buf[9] = 0x12;
846 5391d806 bellard
                    buf[10] = 0x00;
847 5391d806 bellard
                    buf[11] = 0x00;
848 5391d806 bellard
                    
849 5391d806 bellard
                    buf[12] = 0x70;
850 5391d806 bellard
                    buf[13] = 3 << 5;
851 5391d806 bellard
                    buf[14] = (1 << 0) | (1 << 3) | (1 << 5);
852 caed8802 bellard
                    if (bdrv_is_locked(s->bs))
853 5391d806 bellard
                        buf[6] |= 1 << 1;
854 5391d806 bellard
                    buf[15] = 0x00;
855 5391d806 bellard
                    cpu_to_ube16(&buf[16], 706);
856 5391d806 bellard
                    buf[18] = 0;
857 5391d806 bellard
                    buf[19] = 2;
858 5391d806 bellard
                    cpu_to_ube16(&buf[20], 512);
859 5391d806 bellard
                    cpu_to_ube16(&buf[22], 706);
860 5391d806 bellard
                    buf[24] = 0;
861 5391d806 bellard
                    buf[25] = 0;
862 5391d806 bellard
                    buf[26] = 0;
863 5391d806 bellard
                    buf[27] = 0;
864 5391d806 bellard
                    ide_atapi_cmd_reply(s, 28, max_len);
865 5391d806 bellard
                    break;
866 5391d806 bellard
                default:
867 5391d806 bellard
                    goto error_cmd;
868 5391d806 bellard
                }
869 5391d806 bellard
                break;
870 5391d806 bellard
            case 1: /* changeable values */
871 5391d806 bellard
                goto error_cmd;
872 5391d806 bellard
            case 2: /* default values */
873 5391d806 bellard
                goto error_cmd;
874 5391d806 bellard
            default:
875 5391d806 bellard
            case 3: /* saved values */
876 5391d806 bellard
                ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, 
877 5391d806 bellard
                                    ASC_SAVING_PARAMETERS_NOT_SUPPORTED);
878 5391d806 bellard
                break;
879 5391d806 bellard
            }
880 5391d806 bellard
        }
881 5391d806 bellard
        break;
882 5391d806 bellard
    case GPCMD_REQUEST_SENSE:
883 5391d806 bellard
        max_len = packet[4];
884 5391d806 bellard
        memset(buf, 0, 18);
885 5391d806 bellard
        buf[0] = 0x70 | (1 << 7);
886 5391d806 bellard
        buf[2] = s->sense_key;
887 5391d806 bellard
        buf[7] = 10;
888 5391d806 bellard
        buf[12] = s->asc;
889 5391d806 bellard
        ide_atapi_cmd_reply(s, 18, max_len);
890 5391d806 bellard
        break;
891 5391d806 bellard
    case GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL:
892 caed8802 bellard
        if (bdrv_is_inserted(s->bs)) {
893 caed8802 bellard
            bdrv_set_locked(s->bs, packet[4] & 1);
894 5391d806 bellard
            ide_atapi_cmd_ok(s);
895 5391d806 bellard
        } else {
896 5391d806 bellard
            ide_atapi_cmd_error(s, SENSE_NOT_READY, 
897 5391d806 bellard
                                ASC_MEDIUM_NOT_PRESENT);
898 5391d806 bellard
        }
899 5391d806 bellard
        break;
900 5391d806 bellard
    case GPCMD_READ_10:
901 5391d806 bellard
    case GPCMD_READ_12:
902 5391d806 bellard
        {
903 5391d806 bellard
            int nb_sectors, lba;
904 5391d806 bellard
905 caed8802 bellard
            if (!bdrv_is_inserted(s->bs)) {
906 5391d806 bellard
                ide_atapi_cmd_error(s, SENSE_NOT_READY, 
907 5391d806 bellard
                                    ASC_MEDIUM_NOT_PRESENT);
908 5391d806 bellard
                break;
909 5391d806 bellard
            }
910 5391d806 bellard
            if (packet[0] == GPCMD_READ_10)
911 5391d806 bellard
                nb_sectors = ube16_to_cpu(packet + 7);
912 5391d806 bellard
            else
913 5391d806 bellard
                nb_sectors = ube32_to_cpu(packet + 6);
914 5391d806 bellard
            lba = ube32_to_cpu(packet + 2);
915 5391d806 bellard
            if (nb_sectors == 0) {
916 5391d806 bellard
                ide_atapi_cmd_ok(s);
917 5391d806 bellard
                break;
918 5391d806 bellard
            }
919 5391d806 bellard
            if (((int64_t)(lba + nb_sectors) << 2) > s->nb_sectors) {
920 5391d806 bellard
                ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, 
921 5391d806 bellard
                                    ASC_LOGICAL_BLOCK_OOR);
922 5391d806 bellard
                break;
923 5391d806 bellard
            }
924 5391d806 bellard
            ide_atapi_cmd_read(s, lba, nb_sectors);
925 5391d806 bellard
        }
926 5391d806 bellard
        break;
927 5391d806 bellard
    case GPCMD_SEEK:
928 5391d806 bellard
        {
929 5391d806 bellard
            int lba;
930 caed8802 bellard
            if (!bdrv_is_inserted(s->bs)) {
931 5391d806 bellard
                ide_atapi_cmd_error(s, SENSE_NOT_READY, 
932 5391d806 bellard
                                    ASC_MEDIUM_NOT_PRESENT);
933 5391d806 bellard
                break;
934 5391d806 bellard
            }
935 5391d806 bellard
            lba = ube32_to_cpu(packet + 2);
936 5391d806 bellard
            if (((int64_t)lba << 2) > s->nb_sectors) {
937 5391d806 bellard
                ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, 
938 5391d806 bellard
                                    ASC_LOGICAL_BLOCK_OOR);
939 5391d806 bellard
                break;
940 5391d806 bellard
            }
941 5391d806 bellard
            ide_atapi_cmd_ok(s);
942 5391d806 bellard
        }
943 5391d806 bellard
        break;
944 5391d806 bellard
    case GPCMD_START_STOP_UNIT:
945 5391d806 bellard
        {
946 5391d806 bellard
            int start, eject;
947 5391d806 bellard
            start = packet[4] & 1;
948 5391d806 bellard
            eject = (packet[4] >> 1) & 1;
949 5391d806 bellard
            
950 caed8802 bellard
            if (eject && !start) {
951 caed8802 bellard
                /* eject the disk */
952 caed8802 bellard
                bdrv_close(s->bs);
953 caed8802 bellard
            }
954 5391d806 bellard
            ide_atapi_cmd_ok(s);
955 5391d806 bellard
        }
956 5391d806 bellard
        break;
957 5391d806 bellard
    case GPCMD_MECHANISM_STATUS:
958 5391d806 bellard
        {
959 5391d806 bellard
            max_len = ube16_to_cpu(packet + 8);
960 5391d806 bellard
            cpu_to_ube16(buf, 0);
961 5391d806 bellard
            /* no current LBA */
962 5391d806 bellard
            buf[2] = 0;
963 5391d806 bellard
            buf[3] = 0;
964 5391d806 bellard
            buf[4] = 0;
965 5391d806 bellard
            buf[5] = 1;
966 5391d806 bellard
            cpu_to_ube16(buf + 6, 0);
967 5391d806 bellard
            ide_atapi_cmd_reply(s, 8, max_len);
968 5391d806 bellard
        }
969 5391d806 bellard
        break;
970 5391d806 bellard
    case GPCMD_READ_TOC_PMA_ATIP:
971 5391d806 bellard
        {
972 5391d806 bellard
            int format, msf, start_track, len;
973 5391d806 bellard
974 caed8802 bellard
            if (!bdrv_is_inserted(s->bs)) {
975 5391d806 bellard
                ide_atapi_cmd_error(s, SENSE_NOT_READY, 
976 5391d806 bellard
                                    ASC_MEDIUM_NOT_PRESENT);
977 5391d806 bellard
                break;
978 5391d806 bellard
            }
979 5391d806 bellard
            max_len = ube16_to_cpu(packet + 7);
980 5391d806 bellard
            format = packet[9] >> 6;
981 5391d806 bellard
            msf = (packet[1] >> 1) & 1;
982 5391d806 bellard
            start_track = packet[6];
983 5391d806 bellard
            switch(format) {
984 5391d806 bellard
            case 0:
985 5391d806 bellard
                len = cdrom_read_toc(s, buf, msf, start_track);
986 5391d806 bellard
                if (len < 0)
987 5391d806 bellard
                    goto error_cmd;
988 5391d806 bellard
                ide_atapi_cmd_reply(s, len, max_len);
989 5391d806 bellard
                break;
990 5391d806 bellard
            case 1:
991 5391d806 bellard
                /* multi session : only a single session defined */
992 5391d806 bellard
                memset(buf, 0, 12);
993 5391d806 bellard
                buf[1] = 0x0a;
994 5391d806 bellard
                buf[2] = 0x01;
995 5391d806 bellard
                buf[3] = 0x01;
996 5391d806 bellard
                ide_atapi_cmd_reply(s, 12, max_len);
997 5391d806 bellard
                break;
998 5391d806 bellard
            default:
999 7f777bf3 bellard
            error_cmd:
1000 7f777bf3 bellard
                ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, 
1001 7f777bf3 bellard
                                    ASC_INV_FIELD_IN_CMD_PACKET);
1002 7f777bf3 bellard
                break;
1003 5391d806 bellard
            }
1004 5391d806 bellard
        }
1005 5391d806 bellard
        break;
1006 5391d806 bellard
    case GPCMD_READ_CDVD_CAPACITY:
1007 caed8802 bellard
        if (!bdrv_is_inserted(s->bs)) {
1008 5391d806 bellard
            ide_atapi_cmd_error(s, SENSE_NOT_READY, 
1009 5391d806 bellard
                                ASC_MEDIUM_NOT_PRESENT);
1010 5391d806 bellard
            break;
1011 5391d806 bellard
        }
1012 5391d806 bellard
        /* NOTE: it is really the number of sectors minus 1 */
1013 5391d806 bellard
        cpu_to_ube32(buf, (s->nb_sectors >> 2) - 1);
1014 5391d806 bellard
        cpu_to_ube32(buf + 4, 2048);
1015 5391d806 bellard
        ide_atapi_cmd_reply(s, 8, 8);
1016 5391d806 bellard
        break;
1017 bd0d90b2 bellard
    case GPCMD_INQUIRY:
1018 bd0d90b2 bellard
        max_len = packet[4];
1019 bd0d90b2 bellard
        buf[0] = 0x05; /* CD-ROM */
1020 bd0d90b2 bellard
        buf[1] = 0x80; /* removable */
1021 bd0d90b2 bellard
        buf[2] = 0x00; /* ISO */
1022 bd0d90b2 bellard
        buf[3] = 0x21; /* ATAPI-2 (XXX: put ATAPI-4 ?) */
1023 bd0d90b2 bellard
        buf[4] = 31; /* additionnal length */
1024 bd0d90b2 bellard
        buf[5] = 0; /* reserved */
1025 bd0d90b2 bellard
        buf[6] = 0; /* reserved */
1026 bd0d90b2 bellard
        buf[7] = 0; /* reserved */
1027 bd0d90b2 bellard
        padstr8(buf + 8, 8, "QEMU");
1028 bd0d90b2 bellard
        padstr8(buf + 16, 16, "QEMU CD-ROM");
1029 bd0d90b2 bellard
        padstr8(buf + 32, 4, QEMU_VERSION);
1030 bd0d90b2 bellard
        ide_atapi_cmd_reply(s, 36, max_len);
1031 bd0d90b2 bellard
        break;
1032 5391d806 bellard
    default:
1033 5391d806 bellard
        ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, 
1034 7f777bf3 bellard
                            ASC_ILLEGAL_OPCODE);
1035 5391d806 bellard
        break;
1036 5391d806 bellard
    }
1037 5391d806 bellard
}
1038 5391d806 bellard
1039 caed8802 bellard
/* called when the inserted state of the media has changed */
1040 caed8802 bellard
static void cdrom_change_cb(void *opaque)
1041 5391d806 bellard
{
1042 caed8802 bellard
    IDEState *s = opaque;
1043 caed8802 bellard
    int64_t nb_sectors;
1044 caed8802 bellard
1045 caed8802 bellard
    /* XXX: send interrupt too */
1046 caed8802 bellard
    bdrv_get_geometry(s->bs, &nb_sectors);
1047 caed8802 bellard
    s->nb_sectors = nb_sectors;
1048 caed8802 bellard
}
1049 caed8802 bellard
1050 caed8802 bellard
static void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val)
1051 caed8802 bellard
{
1052 caed8802 bellard
    IDEState *ide_if = opaque;
1053 c45c3d00 bellard
    IDEState *s;
1054 5391d806 bellard
    int unit, n;
1055 5391d806 bellard
1056 5391d806 bellard
#ifdef DEBUG_IDE
1057 5391d806 bellard
    printf("IDE: write addr=0x%x val=0x%02x\n", addr, val);
1058 5391d806 bellard
#endif
1059 5391d806 bellard
    addr &= 7;
1060 5391d806 bellard
    switch(addr) {
1061 5391d806 bellard
    case 0:
1062 5391d806 bellard
        break;
1063 5391d806 bellard
    case 1:
1064 c45c3d00 bellard
        /* NOTE: data is written to the two drives */
1065 c45c3d00 bellard
        ide_if[0].feature = val;
1066 c45c3d00 bellard
        ide_if[1].feature = val;
1067 5391d806 bellard
        break;
1068 5391d806 bellard
    case 2:
1069 5391d806 bellard
        if (val == 0)
1070 5391d806 bellard
            val = 256;
1071 c45c3d00 bellard
        ide_if[0].nsector = val;
1072 c45c3d00 bellard
        ide_if[1].nsector = val;
1073 5391d806 bellard
        break;
1074 5391d806 bellard
    case 3:
1075 c45c3d00 bellard
        ide_if[0].sector = val;
1076 c45c3d00 bellard
        ide_if[1].sector = val;
1077 5391d806 bellard
        break;
1078 5391d806 bellard
    case 4:
1079 c45c3d00 bellard
        ide_if[0].lcyl = val;
1080 c45c3d00 bellard
        ide_if[1].lcyl = val;
1081 5391d806 bellard
        break;
1082 5391d806 bellard
    case 5:
1083 c45c3d00 bellard
        ide_if[0].hcyl = val;
1084 c45c3d00 bellard
        ide_if[1].hcyl = val;
1085 5391d806 bellard
        break;
1086 5391d806 bellard
    case 6:
1087 7ae98627 bellard
        ide_if[0].select = (val & ~0x10) | 0xa0;
1088 7ae98627 bellard
        ide_if[1].select = (val | 0x10) | 0xa0;
1089 5391d806 bellard
        /* select drive */
1090 5391d806 bellard
        unit = (val >> 4) & 1;
1091 5391d806 bellard
        s = ide_if + unit;
1092 5391d806 bellard
        ide_if->cur_drive = s;
1093 5391d806 bellard
        break;
1094 5391d806 bellard
    default:
1095 5391d806 bellard
    case 7:
1096 5391d806 bellard
        /* command */
1097 5391d806 bellard
#if defined(DEBUG_IDE)
1098 5391d806 bellard
        printf("ide: CMD=%02x\n", val);
1099 5391d806 bellard
#endif
1100 c45c3d00 bellard
        s = ide_if->cur_drive;
1101 66201e2d bellard
        /* ignore commands to non existant slave */
1102 66201e2d bellard
        if (s != ide_if && !s->bs) 
1103 66201e2d bellard
            break;
1104 5391d806 bellard
        switch(val) {
1105 5391d806 bellard
        case WIN_IDENTIFY:
1106 5391d806 bellard
            if (s->bs && !s->is_cdrom) {
1107 5391d806 bellard
                ide_identify(s);
1108 2a282056 bellard
                s->status = READY_STAT | SEEK_STAT;
1109 5391d806 bellard
                ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
1110 5391d806 bellard
            } else {
1111 5391d806 bellard
                if (s->is_cdrom) {
1112 5391d806 bellard
                    ide_set_signature(s);
1113 5391d806 bellard
                }
1114 5391d806 bellard
                ide_abort_command(s);
1115 5391d806 bellard
            }
1116 5391d806 bellard
            ide_set_irq(s);
1117 5391d806 bellard
            break;
1118 5391d806 bellard
        case WIN_SPECIFY:
1119 5391d806 bellard
        case WIN_RECAL:
1120 a136e5a8 bellard
            s->error = 0;
1121 5391d806 bellard
            s->status = READY_STAT;
1122 5391d806 bellard
            ide_set_irq(s);
1123 5391d806 bellard
            break;
1124 5391d806 bellard
        case WIN_SETMULT:
1125 5391d806 bellard
            if (s->nsector > MAX_MULT_SECTORS || 
1126 5391d806 bellard
                s->nsector == 0 ||
1127 5391d806 bellard
                (s->nsector & (s->nsector - 1)) != 0) {
1128 5391d806 bellard
                ide_abort_command(s);
1129 5391d806 bellard
            } else {
1130 5391d806 bellard
                s->mult_sectors = s->nsector;
1131 5391d806 bellard
                s->status = READY_STAT;
1132 5391d806 bellard
            }
1133 5391d806 bellard
            ide_set_irq(s);
1134 5391d806 bellard
            break;
1135 4ce900b4 bellard
        case WIN_VERIFY:
1136 4ce900b4 bellard
        case WIN_VERIFY_ONCE:
1137 4ce900b4 bellard
            /* do sector number check ? */
1138 4ce900b4 bellard
            s->status = READY_STAT;
1139 4ce900b4 bellard
            ide_set_irq(s);
1140 4ce900b4 bellard
            break;
1141 5391d806 bellard
        case WIN_READ:
1142 5391d806 bellard
        case WIN_READ_ONCE:
1143 6b136f9e bellard
            if (!s->bs) 
1144 6b136f9e bellard
                goto abort_cmd;
1145 5391d806 bellard
            s->req_nb_sectors = 1;
1146 5391d806 bellard
            ide_sector_read(s);
1147 5391d806 bellard
            break;
1148 5391d806 bellard
        case WIN_WRITE:
1149 5391d806 bellard
        case WIN_WRITE_ONCE:
1150 a136e5a8 bellard
            s->error = 0;
1151 f66723fa bellard
            s->status = SEEK_STAT | READY_STAT;
1152 5391d806 bellard
            s->req_nb_sectors = 1;
1153 5391d806 bellard
            ide_transfer_start(s, s->io_buffer, 512, ide_sector_write);
1154 5391d806 bellard
            break;
1155 5391d806 bellard
        case WIN_MULTREAD:
1156 5391d806 bellard
            if (!s->mult_sectors)
1157 5391d806 bellard
                goto abort_cmd;
1158 5391d806 bellard
            s->req_nb_sectors = s->mult_sectors;
1159 5391d806 bellard
            ide_sector_read(s);
1160 5391d806 bellard
            break;
1161 5391d806 bellard
        case WIN_MULTWRITE:
1162 5391d806 bellard
            if (!s->mult_sectors)
1163 5391d806 bellard
                goto abort_cmd;
1164 a136e5a8 bellard
            s->error = 0;
1165 f66723fa bellard
            s->status = SEEK_STAT | READY_STAT;
1166 5391d806 bellard
            s->req_nb_sectors = s->mult_sectors;
1167 5391d806 bellard
            n = s->nsector;
1168 5391d806 bellard
            if (n > s->req_nb_sectors)
1169 5391d806 bellard
                n = s->req_nb_sectors;
1170 5391d806 bellard
            ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_write);
1171 5391d806 bellard
            break;
1172 5391d806 bellard
        case WIN_READ_NATIVE_MAX:
1173 5391d806 bellard
            ide_set_sector(s, s->nb_sectors - 1);
1174 5391d806 bellard
            s->status = READY_STAT;
1175 5391d806 bellard
            ide_set_irq(s);
1176 5391d806 bellard
            break;
1177 a136e5a8 bellard
        case WIN_CHECKPOWERMODE1:
1178 a136e5a8 bellard
            s->nsector = 0xff; /* device active or idle */
1179 a136e5a8 bellard
            s->status = READY_STAT;
1180 a136e5a8 bellard
            ide_set_irq(s);
1181 a136e5a8 bellard
            break;
1182 34e538ae bellard
        case WIN_SETFEATURES:
1183 34e538ae bellard
            if (!s->bs)
1184 34e538ae bellard
                goto abort_cmd;
1185 34e538ae bellard
            /* XXX: valid for CDROM ? */
1186 34e538ae bellard
            switch(s->feature) {
1187 34e538ae bellard
            case 0x02: /* write cache enable */
1188 34e538ae bellard
            case 0x82: /* write cache disable */
1189 34e538ae bellard
            case 0xaa: /* read look-ahead enable */
1190 34e538ae bellard
            case 0x55: /* read look-ahead disable */
1191 34e538ae bellard
                s->status = READY_STAT;
1192 34e538ae bellard
                ide_set_irq(s);
1193 34e538ae bellard
                break;
1194 34e538ae bellard
            default:
1195 34e538ae bellard
                goto abort_cmd;
1196 34e538ae bellard
            }
1197 34e538ae bellard
            break;
1198 5391d806 bellard
            /* ATAPI commands */
1199 5391d806 bellard
        case WIN_PIDENTIFY:
1200 5391d806 bellard
            if (s->is_cdrom) {
1201 5391d806 bellard
                ide_atapi_identify(s);
1202 5391d806 bellard
                s->status = READY_STAT;
1203 5391d806 bellard
                ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
1204 5391d806 bellard
            } else {
1205 5391d806 bellard
                ide_abort_command(s);
1206 5391d806 bellard
            }
1207 5391d806 bellard
            ide_set_irq(s);
1208 5391d806 bellard
            break;
1209 5391d806 bellard
        case WIN_SRST:
1210 5391d806 bellard
            if (!s->is_cdrom)
1211 5391d806 bellard
                goto abort_cmd;
1212 5391d806 bellard
            ide_set_signature(s);
1213 6b136f9e bellard
            s->status = 0x00; /* NOTE: READY is _not_ set */
1214 5391d806 bellard
            s->error = 0x01;
1215 5391d806 bellard
            break;
1216 5391d806 bellard
        case WIN_PACKETCMD:
1217 5391d806 bellard
            if (!s->is_cdrom)
1218 5391d806 bellard
                goto abort_cmd;
1219 5391d806 bellard
            /* DMA or overlapping commands not supported */
1220 5391d806 bellard
            if ((s->feature & 0x03) != 0)
1221 5391d806 bellard
                goto abort_cmd;
1222 5391d806 bellard
            s->nsector = 1;
1223 5391d806 bellard
            ide_transfer_start(s, s->io_buffer, ATAPI_PACKET_SIZE, 
1224 5391d806 bellard
                               ide_atapi_cmd);
1225 5391d806 bellard
            break;
1226 5391d806 bellard
        default:
1227 5391d806 bellard
        abort_cmd:
1228 5391d806 bellard
            ide_abort_command(s);
1229 5391d806 bellard
            ide_set_irq(s);
1230 5391d806 bellard
            break;
1231 5391d806 bellard
        }
1232 5391d806 bellard
    }
1233 5391d806 bellard
}
1234 5391d806 bellard
1235 caed8802 bellard
static uint32_t ide_ioport_read(void *opaque, uint32_t addr1)
1236 5391d806 bellard
{
1237 7ae98627 bellard
    IDEState *ide_if = opaque;
1238 7ae98627 bellard
    IDEState *s = ide_if->cur_drive;
1239 5391d806 bellard
    uint32_t addr;
1240 5391d806 bellard
    int ret;
1241 5391d806 bellard
1242 5391d806 bellard
    addr = addr1 & 7;
1243 5391d806 bellard
    switch(addr) {
1244 5391d806 bellard
    case 0:
1245 5391d806 bellard
        ret = 0xff;
1246 5391d806 bellard
        break;
1247 5391d806 bellard
    case 1:
1248 7ae98627 bellard
        if (!ide_if[0].bs && !ide_if[1].bs)
1249 c45c3d00 bellard
            ret = 0;
1250 c45c3d00 bellard
        else
1251 c45c3d00 bellard
            ret = s->error;
1252 5391d806 bellard
        break;
1253 5391d806 bellard
    case 2:
1254 7ae98627 bellard
        if (!ide_if[0].bs && !ide_if[1].bs)
1255 c45c3d00 bellard
            ret = 0;
1256 c45c3d00 bellard
        else
1257 c45c3d00 bellard
            ret = s->nsector & 0xff;
1258 5391d806 bellard
        break;
1259 5391d806 bellard
    case 3:
1260 7ae98627 bellard
        if (!ide_if[0].bs && !ide_if[1].bs)
1261 c45c3d00 bellard
            ret = 0;
1262 c45c3d00 bellard
        else
1263 c45c3d00 bellard
            ret = s->sector;
1264 5391d806 bellard
        break;
1265 5391d806 bellard
    case 4:
1266 7ae98627 bellard
        if (!ide_if[0].bs && !ide_if[1].bs)
1267 c45c3d00 bellard
            ret = 0;
1268 c45c3d00 bellard
        else
1269 c45c3d00 bellard
            ret = s->lcyl;
1270 5391d806 bellard
        break;
1271 5391d806 bellard
    case 5:
1272 7ae98627 bellard
        if (!ide_if[0].bs && !ide_if[1].bs)
1273 c45c3d00 bellard
            ret = 0;
1274 c45c3d00 bellard
        else
1275 c45c3d00 bellard
            ret = s->hcyl;
1276 5391d806 bellard
        break;
1277 5391d806 bellard
    case 6:
1278 7ae98627 bellard
        if (!ide_if[0].bs && !ide_if[1].bs)
1279 c45c3d00 bellard
            ret = 0;
1280 c45c3d00 bellard
        else
1281 7ae98627 bellard
            ret = s->select;
1282 5391d806 bellard
        break;
1283 5391d806 bellard
    default:
1284 5391d806 bellard
    case 7:
1285 66201e2d bellard
        if ((!ide_if[0].bs && !ide_if[1].bs) ||
1286 66201e2d bellard
            (s != ide_if && !s->bs))
1287 c45c3d00 bellard
            ret = 0;
1288 c45c3d00 bellard
        else
1289 c45c3d00 bellard
            ret = s->status;
1290 1ade1de2 bellard
#ifdef TARGET_PPC
1291 1ade1de2 bellard
        if (s->openpic) 
1292 1ade1de2 bellard
            openpic_set_irq(s->openpic, s->irq, 0);
1293 1ade1de2 bellard
        else 
1294 1ade1de2 bellard
#endif
1295 34e538ae bellard
        if (s->irq == 16)
1296 34e538ae bellard
            pci_set_irq(s->pci_dev, 0, 0);
1297 34e538ae bellard
        else
1298 34e538ae bellard
            pic_set_irq(s->irq, 0);
1299 5391d806 bellard
        break;
1300 5391d806 bellard
    }
1301 5391d806 bellard
#ifdef DEBUG_IDE
1302 5391d806 bellard
    printf("ide: read addr=0x%x val=%02x\n", addr1, ret);
1303 5391d806 bellard
#endif
1304 5391d806 bellard
    return ret;
1305 5391d806 bellard
}
1306 5391d806 bellard
1307 caed8802 bellard
static uint32_t ide_status_read(void *opaque, uint32_t addr)
1308 5391d806 bellard
{
1309 7ae98627 bellard
    IDEState *ide_if = opaque;
1310 7ae98627 bellard
    IDEState *s = ide_if->cur_drive;
1311 5391d806 bellard
    int ret;
1312 7ae98627 bellard
1313 66201e2d bellard
    if ((!ide_if[0].bs && !ide_if[1].bs) ||
1314 66201e2d bellard
        (s != ide_if && !s->bs))
1315 7ae98627 bellard
        ret = 0;
1316 7ae98627 bellard
    else
1317 7ae98627 bellard
        ret = s->status;
1318 5391d806 bellard
#ifdef DEBUG_IDE
1319 5391d806 bellard
    printf("ide: read status addr=0x%x val=%02x\n", addr, ret);
1320 5391d806 bellard
#endif
1321 5391d806 bellard
    return ret;
1322 5391d806 bellard
}
1323 5391d806 bellard
1324 caed8802 bellard
static void ide_cmd_write(void *opaque, uint32_t addr, uint32_t val)
1325 5391d806 bellard
{
1326 caed8802 bellard
    IDEState *ide_if = opaque;
1327 5391d806 bellard
    IDEState *s;
1328 5391d806 bellard
    int i;
1329 5391d806 bellard
1330 5391d806 bellard
#ifdef DEBUG_IDE
1331 5391d806 bellard
    printf("ide: write control addr=0x%x val=%02x\n", addr, val);
1332 5391d806 bellard
#endif
1333 5391d806 bellard
    /* common for both drives */
1334 5391d806 bellard
    if (!(ide_if[0].cmd & IDE_CMD_RESET) &&
1335 5391d806 bellard
        (val & IDE_CMD_RESET)) {
1336 5391d806 bellard
        /* reset low to high */
1337 5391d806 bellard
        for(i = 0;i < 2; i++) {
1338 5391d806 bellard
            s = &ide_if[i];
1339 5391d806 bellard
            s->status = BUSY_STAT | SEEK_STAT;
1340 5391d806 bellard
            s->error = 0x01;
1341 5391d806 bellard
        }
1342 5391d806 bellard
    } else if ((ide_if[0].cmd & IDE_CMD_RESET) &&
1343 5391d806 bellard
               !(val & IDE_CMD_RESET)) {
1344 5391d806 bellard
        /* high to low */
1345 5391d806 bellard
        for(i = 0;i < 2; i++) {
1346 5391d806 bellard
            s = &ide_if[i];
1347 6b136f9e bellard
            if (s->is_cdrom)
1348 6b136f9e bellard
                s->status = 0x00; /* NOTE: READY is _not_ set */
1349 6b136f9e bellard
            else
1350 56bf1d37 bellard
                s->status = READY_STAT | SEEK_STAT;
1351 5391d806 bellard
            ide_set_signature(s);
1352 5391d806 bellard
        }
1353 5391d806 bellard
    }
1354 5391d806 bellard
1355 5391d806 bellard
    ide_if[0].cmd = val;
1356 5391d806 bellard
    ide_if[1].cmd = val;
1357 5391d806 bellard
}
1358 5391d806 bellard
1359 caed8802 bellard
static void ide_data_writew(void *opaque, uint32_t addr, uint32_t val)
1360 5391d806 bellard
{
1361 caed8802 bellard
    IDEState *s = ((IDEState *)opaque)->cur_drive;
1362 5391d806 bellard
    uint8_t *p;
1363 5391d806 bellard
1364 5391d806 bellard
    p = s->data_ptr;
1365 0c4ad8dc bellard
    *(uint16_t *)p = le16_to_cpu(val);
1366 5391d806 bellard
    p += 2;
1367 5391d806 bellard
    s->data_ptr = p;
1368 5391d806 bellard
    if (p >= s->data_end)
1369 5391d806 bellard
        s->end_transfer_func(s);
1370 5391d806 bellard
}
1371 5391d806 bellard
1372 caed8802 bellard
static uint32_t ide_data_readw(void *opaque, uint32_t addr)
1373 5391d806 bellard
{
1374 caed8802 bellard
    IDEState *s = ((IDEState *)opaque)->cur_drive;
1375 5391d806 bellard
    uint8_t *p;
1376 5391d806 bellard
    int ret;
1377 5391d806 bellard
    p = s->data_ptr;
1378 0c4ad8dc bellard
    ret = cpu_to_le16(*(uint16_t *)p);
1379 5391d806 bellard
    p += 2;
1380 5391d806 bellard
    s->data_ptr = p;
1381 5391d806 bellard
    if (p >= s->data_end)
1382 5391d806 bellard
        s->end_transfer_func(s);
1383 5391d806 bellard
    return ret;
1384 5391d806 bellard
}
1385 5391d806 bellard
1386 caed8802 bellard
static void ide_data_writel(void *opaque, uint32_t addr, uint32_t val)
1387 5391d806 bellard
{
1388 caed8802 bellard
    IDEState *s = ((IDEState *)opaque)->cur_drive;
1389 5391d806 bellard
    uint8_t *p;
1390 5391d806 bellard
1391 5391d806 bellard
    p = s->data_ptr;
1392 0c4ad8dc bellard
    *(uint32_t *)p = le32_to_cpu(val);
1393 5391d806 bellard
    p += 4;
1394 5391d806 bellard
    s->data_ptr = p;
1395 5391d806 bellard
    if (p >= s->data_end)
1396 5391d806 bellard
        s->end_transfer_func(s);
1397 5391d806 bellard
}
1398 5391d806 bellard
1399 caed8802 bellard
static uint32_t ide_data_readl(void *opaque, uint32_t addr)
1400 5391d806 bellard
{
1401 caed8802 bellard
    IDEState *s = ((IDEState *)opaque)->cur_drive;
1402 5391d806 bellard
    uint8_t *p;
1403 5391d806 bellard
    int ret;
1404 5391d806 bellard
    
1405 5391d806 bellard
    p = s->data_ptr;
1406 0c4ad8dc bellard
    ret = cpu_to_le32(*(uint32_t *)p);
1407 5391d806 bellard
    p += 4;
1408 5391d806 bellard
    s->data_ptr = p;
1409 5391d806 bellard
    if (p >= s->data_end)
1410 5391d806 bellard
        s->end_transfer_func(s);
1411 5391d806 bellard
    return ret;
1412 5391d806 bellard
}
1413 5391d806 bellard
1414 5391d806 bellard
static void ide_reset(IDEState *s)
1415 5391d806 bellard
{
1416 5391d806 bellard
    s->mult_sectors = MAX_MULT_SECTORS;
1417 5391d806 bellard
    s->cur_drive = s;
1418 5391d806 bellard
    s->select = 0xa0;
1419 5391d806 bellard
    s->status = READY_STAT;
1420 5391d806 bellard
    ide_set_signature(s);
1421 5391d806 bellard
}
1422 5391d806 bellard
1423 5391d806 bellard
struct partition {
1424 5391d806 bellard
        uint8_t boot_ind;                /* 0x80 - active */
1425 5391d806 bellard
        uint8_t head;                /* starting head */
1426 5391d806 bellard
        uint8_t sector;                /* starting sector */
1427 5391d806 bellard
        uint8_t cyl;                /* starting cylinder */
1428 5391d806 bellard
        uint8_t sys_ind;                /* What partition type */
1429 5391d806 bellard
        uint8_t end_head;                /* end head */
1430 5391d806 bellard
        uint8_t end_sector;        /* end sector */
1431 5391d806 bellard
        uint8_t end_cyl;                /* end cylinder */
1432 5391d806 bellard
        uint32_t start_sect;        /* starting sector counting from 0 */
1433 5391d806 bellard
        uint32_t nr_sects;                /* nr of sectors in partition */
1434 5391d806 bellard
} __attribute__((packed));
1435 5391d806 bellard
1436 5391d806 bellard
/* try to guess the IDE geometry from the MSDOS partition table */
1437 5391d806 bellard
static void ide_guess_geometry(IDEState *s)
1438 5391d806 bellard
{
1439 5391d806 bellard
    uint8_t buf[512];
1440 5391d806 bellard
    int ret, i;
1441 5391d806 bellard
    struct partition *p;
1442 5391d806 bellard
    uint32_t nr_sects;
1443 5391d806 bellard
1444 5391d806 bellard
    if (s->cylinders != 0)
1445 5391d806 bellard
        return;
1446 5391d806 bellard
    ret = bdrv_read(s->bs, 0, buf, 1);
1447 5391d806 bellard
    if (ret < 0)
1448 5391d806 bellard
        return;
1449 5391d806 bellard
    /* test msdos magic */
1450 5391d806 bellard
    if (buf[510] != 0x55 || buf[511] != 0xaa)
1451 5391d806 bellard
        return;
1452 5391d806 bellard
    for(i = 0; i < 4; i++) {
1453 5391d806 bellard
        p = ((struct partition *)(buf + 0x1be)) + i;
1454 0c4ad8dc bellard
        nr_sects = le32_to_cpu(p->nr_sects);
1455 5391d806 bellard
        if (nr_sects && p->end_head) {
1456 5391d806 bellard
            /* We make the assumption that the partition terminates on
1457 5391d806 bellard
               a cylinder boundary */
1458 5391d806 bellard
            s->heads = p->end_head + 1;
1459 5391d806 bellard
            s->sectors = p->end_sector & 63;
1460 5391d806 bellard
            s->cylinders = s->nb_sectors / (s->heads * s->sectors);
1461 5391d806 bellard
#if 0
1462 5391d806 bellard
            printf("guessed partition: CHS=%d %d %d\n", 
1463 5391d806 bellard
                   s->cylinders, s->heads, s->sectors);
1464 5391d806 bellard
#endif
1465 5391d806 bellard
        }
1466 5391d806 bellard
    }
1467 5391d806 bellard
}
1468 5391d806 bellard
1469 69b91039 bellard
static void ide_init2(IDEState *ide_state, int irq,
1470 69b91039 bellard
                      BlockDriverState *hd0, BlockDriverState *hd1)
1471 5391d806 bellard
{
1472 69b91039 bellard
    IDEState *s;
1473 aedf5382 bellard
    static int drive_serial = 1;
1474 caed8802 bellard
    int i, cylinders, heads, secs;
1475 5391d806 bellard
    int64_t nb_sectors;
1476 5391d806 bellard
1477 caed8802 bellard
    for(i = 0; i < 2; i++) {
1478 caed8802 bellard
        s = ide_state + i;
1479 caed8802 bellard
        if (i == 0)
1480 caed8802 bellard
            s->bs = hd0;
1481 caed8802 bellard
        else
1482 caed8802 bellard
            s->bs = hd1;
1483 5391d806 bellard
        if (s->bs) {
1484 5391d806 bellard
            bdrv_get_geometry(s->bs, &nb_sectors);
1485 5391d806 bellard
            s->nb_sectors = nb_sectors;
1486 caed8802 bellard
            /* if a geometry hint is available, use it */
1487 caed8802 bellard
            bdrv_get_geometry_hint(s->bs, &cylinders, &heads, &secs);
1488 caed8802 bellard
            if (cylinders != 0) {
1489 5391d806 bellard
                s->cylinders = cylinders;
1490 caed8802 bellard
                s->heads = heads;
1491 caed8802 bellard
                s->sectors = secs;
1492 caed8802 bellard
            } else {
1493 caed8802 bellard
                ide_guess_geometry(s);
1494 caed8802 bellard
                if (s->cylinders == 0) {
1495 caed8802 bellard
                    /* if no geometry, use a LBA compatible one */
1496 caed8802 bellard
                    cylinders = nb_sectors / (16 * 63);
1497 caed8802 bellard
                    if (cylinders > 16383)
1498 caed8802 bellard
                        cylinders = 16383;
1499 caed8802 bellard
                    else if (cylinders < 2)
1500 caed8802 bellard
                        cylinders = 2;
1501 caed8802 bellard
                    s->cylinders = cylinders;
1502 caed8802 bellard
                    s->heads = 16;
1503 caed8802 bellard
                    s->sectors = 63;
1504 caed8802 bellard
                }
1505 caed8802 bellard
            }
1506 caed8802 bellard
            if (bdrv_get_type_hint(s->bs) == BDRV_TYPE_CDROM) {
1507 caed8802 bellard
                s->is_cdrom = 1;
1508 caed8802 bellard
                bdrv_set_change_cb(s->bs, cdrom_change_cb, s);
1509 5391d806 bellard
            }
1510 5391d806 bellard
        }
1511 aedf5382 bellard
        s->drive_serial = drive_serial++;
1512 caed8802 bellard
        s->irq = irq;
1513 5391d806 bellard
        ide_reset(s);
1514 5391d806 bellard
    }
1515 69b91039 bellard
}
1516 69b91039 bellard
1517 34e538ae bellard
static void ide_init_ioport(IDEState *ide_state, int iobase, int iobase2)
1518 69b91039 bellard
{
1519 caed8802 bellard
    register_ioport_write(iobase, 8, 1, ide_ioport_write, ide_state);
1520 caed8802 bellard
    register_ioport_read(iobase, 8, 1, ide_ioport_read, ide_state);
1521 caed8802 bellard
    if (iobase2) {
1522 caed8802 bellard
        register_ioport_read(iobase2, 1, 1, ide_status_read, ide_state);
1523 caed8802 bellard
        register_ioport_write(iobase2, 1, 1, ide_cmd_write, ide_state);
1524 5391d806 bellard
    }
1525 caed8802 bellard
    
1526 caed8802 bellard
    /* data ports */
1527 caed8802 bellard
    register_ioport_write(iobase, 2, 2, ide_data_writew, ide_state);
1528 caed8802 bellard
    register_ioport_read(iobase, 2, 2, ide_data_readw, ide_state);
1529 caed8802 bellard
    register_ioport_write(iobase, 4, 4, ide_data_writel, ide_state);
1530 caed8802 bellard
    register_ioport_read(iobase, 4, 4, ide_data_readl, ide_state);
1531 5391d806 bellard
}
1532 69b91039 bellard
1533 69b91039 bellard
/***********************************************************/
1534 34e538ae bellard
/* ISA IDE definitions */
1535 34e538ae bellard
1536 34e538ae bellard
void isa_ide_init(int iobase, int iobase2, int irq,
1537 34e538ae bellard
                  BlockDriverState *hd0, BlockDriverState *hd1)
1538 34e538ae bellard
{
1539 34e538ae bellard
    IDEState *ide_state;
1540 34e538ae bellard
1541 34e538ae bellard
    ide_state = qemu_mallocz(sizeof(IDEState) * 2);
1542 34e538ae bellard
    if (!ide_state)
1543 34e538ae bellard
        return;
1544 34e538ae bellard
    
1545 34e538ae bellard
    ide_init2(ide_state, irq, hd0, hd1);
1546 34e538ae bellard
    ide_init_ioport(ide_state, iobase, iobase2);
1547 34e538ae bellard
}
1548 34e538ae bellard
1549 34e538ae bellard
/***********************************************************/
1550 69b91039 bellard
/* PCI IDE definitions */
1551 69b91039 bellard
1552 69b91039 bellard
typedef struct PCIIDEState {
1553 69b91039 bellard
    PCIDevice dev;
1554 69b91039 bellard
    IDEState ide_if[4];
1555 69b91039 bellard
} PCIIDEState;
1556 69b91039 bellard
1557 69b91039 bellard
static void ide_map(PCIDevice *pci_dev, int region_num, 
1558 69b91039 bellard
                    uint32_t addr, uint32_t size, int type)
1559 69b91039 bellard
{
1560 69b91039 bellard
    PCIIDEState *d = (PCIIDEState *)pci_dev;
1561 69b91039 bellard
    IDEState *ide_state;
1562 69b91039 bellard
1563 69b91039 bellard
    if (region_num <= 3) {
1564 69b91039 bellard
        ide_state = &d->ide_if[(region_num >> 1) * 2];
1565 69b91039 bellard
        if (region_num & 1) {
1566 69b91039 bellard
            register_ioport_read(addr + 2, 1, 1, ide_status_read, ide_state);
1567 69b91039 bellard
            register_ioport_write(addr + 2, 1, 1, ide_cmd_write, ide_state);
1568 69b91039 bellard
        } else {
1569 69b91039 bellard
            register_ioport_write(addr, 8, 1, ide_ioport_write, ide_state);
1570 69b91039 bellard
            register_ioport_read(addr, 8, 1, ide_ioport_read, ide_state);
1571 69b91039 bellard
1572 69b91039 bellard
            /* data ports */
1573 69b91039 bellard
            register_ioport_write(addr, 2, 2, ide_data_writew, ide_state);
1574 69b91039 bellard
            register_ioport_read(addr, 2, 2, ide_data_readw, ide_state);
1575 69b91039 bellard
            register_ioport_write(addr, 4, 4, ide_data_writel, ide_state);
1576 69b91039 bellard
            register_ioport_read(addr, 4, 4, ide_data_readl, ide_state);
1577 69b91039 bellard
        }
1578 69b91039 bellard
    }
1579 69b91039 bellard
}
1580 69b91039 bellard
1581 69b91039 bellard
/* hd_table must contain 4 block drivers */
1582 46e50e9d bellard
void pci_ide_init(PCIBus *bus, BlockDriverState **hd_table)
1583 69b91039 bellard
{
1584 69b91039 bellard
    PCIIDEState *d;
1585 69b91039 bellard
    uint8_t *pci_conf;
1586 34e538ae bellard
    int i;
1587 34e538ae bellard
1588 46e50e9d bellard
    d = (PCIIDEState *)pci_register_device(bus, "IDE", sizeof(PCIIDEState),
1589 46e50e9d bellard
                                           -1, 
1590 73c11f63 bellard
                                           NULL, NULL);
1591 69b91039 bellard
    pci_conf = d->dev.config;
1592 69b91039 bellard
    pci_conf[0x00] = 0x86; // Intel
1593 69b91039 bellard
    pci_conf[0x01] = 0x80;
1594 69b91039 bellard
    pci_conf[0x02] = 0x00; // fake
1595 69b91039 bellard
    pci_conf[0x03] = 0x01; // fake
1596 69b91039 bellard
    pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
1597 69b91039 bellard
    pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
1598 69b91039 bellard
    pci_conf[0x0e] = 0x80; // header_type = PCI_multifunction, generic
1599 69b91039 bellard
1600 69b91039 bellard
    pci_conf[0x2c] = 0x86; // subsys vendor
1601 69b91039 bellard
    pci_conf[0x2d] = 0x80; // subsys vendor
1602 69b91039 bellard
    pci_conf[0x2e] = 0x00; // fake
1603 69b91039 bellard
    pci_conf[0x2f] = 0x01; // fake
1604 69b91039 bellard
1605 69b91039 bellard
    pci_register_io_region((PCIDevice *)d, 0, 0x8, 
1606 69b91039 bellard
                           PCI_ADDRESS_SPACE_IO, ide_map);
1607 69b91039 bellard
    pci_register_io_region((PCIDevice *)d, 1, 0x4, 
1608 69b91039 bellard
                           PCI_ADDRESS_SPACE_IO, ide_map);
1609 69b91039 bellard
    pci_register_io_region((PCIDevice *)d, 2, 0x8, 
1610 69b91039 bellard
                           PCI_ADDRESS_SPACE_IO, ide_map);
1611 69b91039 bellard
    pci_register_io_region((PCIDevice *)d, 3, 0x4, 
1612 69b91039 bellard
                           PCI_ADDRESS_SPACE_IO, ide_map);
1613 69b91039 bellard
1614 34e538ae bellard
    pci_conf[0x3d] = 0x01; // interrupt on pin 1
1615 34e538ae bellard
1616 34e538ae bellard
    for(i = 0; i < 4; i++)
1617 34e538ae bellard
        d->ide_if[i].pci_dev = (PCIDevice *)d;
1618 34e538ae bellard
    ide_init2(&d->ide_if[0], 16, hd_table[0], hd_table[1]);
1619 34e538ae bellard
    ide_init2(&d->ide_if[2], 16, hd_table[2], hd_table[3]);
1620 34e538ae bellard
}
1621 34e538ae bellard
1622 34e538ae bellard
/* hd_table must contain 4 block drivers */
1623 34e538ae bellard
/* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */
1624 46e50e9d bellard
void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table)
1625 34e538ae bellard
{
1626 34e538ae bellard
    PCIIDEState *d;
1627 34e538ae bellard
    uint8_t *pci_conf;
1628 34e538ae bellard
    
1629 34e538ae bellard
    /* register a function 1 of PIIX3 */
1630 46e50e9d bellard
    d = (PCIIDEState *)pci_register_device(bus, "PIIX3 IDE", 
1631 46e50e9d bellard
                                           sizeof(PCIIDEState),
1632 46e50e9d bellard
                                           ((PCIDevice *)piix3_state)->devfn + 1, 
1633 34e538ae bellard
                                           NULL, NULL);
1634 34e538ae bellard
    pci_conf = d->dev.config;
1635 34e538ae bellard
    pci_conf[0x00] = 0x86; // Intel
1636 34e538ae bellard
    pci_conf[0x01] = 0x80;
1637 34e538ae bellard
    pci_conf[0x02] = 0x10;
1638 34e538ae bellard
    pci_conf[0x03] = 0x70;
1639 34e538ae bellard
    pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
1640 34e538ae bellard
    pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
1641 34e538ae bellard
    pci_conf[0x0e] = 0x00; // header_type
1642 34e538ae bellard
1643 34e538ae bellard
    /* XXX: must add BMDMA support to be fully compliant */
1644 34e538ae bellard
1645 69b91039 bellard
    ide_init2(&d->ide_if[0], 14, hd_table[0], hd_table[1]);
1646 69b91039 bellard
    ide_init2(&d->ide_if[2], 15, hd_table[2], hd_table[3]);
1647 34e538ae bellard
    ide_init_ioport(&d->ide_if[0], 0x1f0, 0x3f6);
1648 34e538ae bellard
    ide_init_ioport(&d->ide_if[2], 0x170, 0x376);
1649 69b91039 bellard
}
1650 1ade1de2 bellard
1651 1ade1de2 bellard
/***********************************************************/
1652 1ade1de2 bellard
/* MacIO based PowerPC IDE */
1653 1ade1de2 bellard
1654 1ade1de2 bellard
/* PowerMac IDE memory IO */
1655 1ade1de2 bellard
static void pmac_ide_writeb (void *opaque,
1656 1ade1de2 bellard
                             target_phys_addr_t addr, uint32_t val)
1657 1ade1de2 bellard
{
1658 1ade1de2 bellard
    addr = (addr & 0xFFF) >> 4; 
1659 1ade1de2 bellard
    switch (addr) {
1660 1ade1de2 bellard
    case 1 ... 7:
1661 1ade1de2 bellard
        ide_ioport_write(opaque, addr, val);
1662 1ade1de2 bellard
        break;
1663 1ade1de2 bellard
    case 8:
1664 1ade1de2 bellard
    case 22:
1665 1ade1de2 bellard
        ide_cmd_write(opaque, 0, val);
1666 1ade1de2 bellard
        break;
1667 1ade1de2 bellard
    default:
1668 1ade1de2 bellard
        break;
1669 1ade1de2 bellard
    }
1670 1ade1de2 bellard
}
1671 1ade1de2 bellard
1672 1ade1de2 bellard
static uint32_t pmac_ide_readb (void *opaque,target_phys_addr_t addr)
1673 1ade1de2 bellard
{
1674 1ade1de2 bellard
    uint8_t retval;
1675 1ade1de2 bellard
1676 1ade1de2 bellard
    addr = (addr & 0xFFF) >> 4;
1677 1ade1de2 bellard
    switch (addr) {
1678 1ade1de2 bellard
    case 1 ... 7:
1679 1ade1de2 bellard
        retval = ide_ioport_read(opaque, addr);
1680 1ade1de2 bellard
        break;
1681 1ade1de2 bellard
    case 8:
1682 1ade1de2 bellard
    case 22:
1683 1ade1de2 bellard
        retval = ide_status_read(opaque, 0);
1684 1ade1de2 bellard
        break;
1685 1ade1de2 bellard
    default:
1686 1ade1de2 bellard
        retval = 0xFF;
1687 1ade1de2 bellard
        break;
1688 1ade1de2 bellard
    }
1689 1ade1de2 bellard
    return retval;
1690 1ade1de2 bellard
}
1691 1ade1de2 bellard
1692 1ade1de2 bellard
static void pmac_ide_writew (void *opaque,
1693 1ade1de2 bellard
                             target_phys_addr_t addr, uint32_t val)
1694 1ade1de2 bellard
{
1695 1ade1de2 bellard
    addr = (addr & 0xFFF) >> 4; 
1696 1ade1de2 bellard
#ifdef TARGET_WORDS_BIGENDIAN
1697 1ade1de2 bellard
    val = bswap16(val);
1698 1ade1de2 bellard
#endif
1699 1ade1de2 bellard
    if (addr == 0) {
1700 1ade1de2 bellard
        ide_data_writew(opaque, 0, val);
1701 1ade1de2 bellard
    }
1702 1ade1de2 bellard
}
1703 1ade1de2 bellard
1704 1ade1de2 bellard
static uint32_t pmac_ide_readw (void *opaque,target_phys_addr_t addr)
1705 1ade1de2 bellard
{
1706 1ade1de2 bellard
    uint16_t retval;
1707 1ade1de2 bellard
1708 1ade1de2 bellard
    addr = (addr & 0xFFF) >> 4; 
1709 1ade1de2 bellard
    if (addr == 0) {
1710 1ade1de2 bellard
        retval = ide_data_readw(opaque, 0);
1711 1ade1de2 bellard
    } else {
1712 1ade1de2 bellard
        retval = 0xFFFF;
1713 1ade1de2 bellard
    }
1714 1ade1de2 bellard
#ifdef TARGET_WORDS_BIGENDIAN
1715 1ade1de2 bellard
    retval = bswap16(retval);
1716 1ade1de2 bellard
#endif
1717 1ade1de2 bellard
    return retval;
1718 1ade1de2 bellard
}
1719 1ade1de2 bellard
1720 1ade1de2 bellard
static void pmac_ide_writel (void *opaque,
1721 1ade1de2 bellard
                             target_phys_addr_t addr, uint32_t val)
1722 1ade1de2 bellard
{
1723 1ade1de2 bellard
    addr = (addr & 0xFFF) >> 4; 
1724 1ade1de2 bellard
#ifdef TARGET_WORDS_BIGENDIAN
1725 1ade1de2 bellard
    val = bswap32(val);
1726 1ade1de2 bellard
#endif
1727 1ade1de2 bellard
    if (addr == 0) {
1728 1ade1de2 bellard
        ide_data_writel(opaque, 0, val);
1729 1ade1de2 bellard
    }
1730 1ade1de2 bellard
}
1731 1ade1de2 bellard
1732 1ade1de2 bellard
static uint32_t pmac_ide_readl (void *opaque,target_phys_addr_t addr)
1733 1ade1de2 bellard
{
1734 1ade1de2 bellard
    uint32_t retval;
1735 1ade1de2 bellard
1736 1ade1de2 bellard
    addr = (addr & 0xFFF) >> 4; 
1737 1ade1de2 bellard
    if (addr == 0) {
1738 1ade1de2 bellard
        retval = ide_data_readl(opaque, 0);
1739 1ade1de2 bellard
    } else {
1740 1ade1de2 bellard
        retval = 0xFFFFFFFF;
1741 1ade1de2 bellard
    }
1742 1ade1de2 bellard
#ifdef TARGET_WORDS_BIGENDIAN
1743 1ade1de2 bellard
    retval = bswap32(retval);
1744 1ade1de2 bellard
#endif
1745 1ade1de2 bellard
    return retval;
1746 1ade1de2 bellard
}
1747 1ade1de2 bellard
1748 1ade1de2 bellard
static CPUWriteMemoryFunc *pmac_ide_write[] = {
1749 1ade1de2 bellard
    pmac_ide_writeb,
1750 1ade1de2 bellard
    pmac_ide_writew,
1751 1ade1de2 bellard
    pmac_ide_writel,
1752 1ade1de2 bellard
};
1753 1ade1de2 bellard
1754 1ade1de2 bellard
static CPUReadMemoryFunc *pmac_ide_read[] = {
1755 1ade1de2 bellard
    pmac_ide_readb,
1756 1ade1de2 bellard
    pmac_ide_readw,
1757 1ade1de2 bellard
    pmac_ide_readl,
1758 1ade1de2 bellard
};
1759 1ade1de2 bellard
1760 1ade1de2 bellard
/* hd_table must contain 4 block drivers */
1761 1ade1de2 bellard
/* PowerMac uses memory mapped registers, not I/O. Return the memory
1762 1ade1de2 bellard
   I/O index to access the ide. */
1763 1ade1de2 bellard
int pmac_ide_init (BlockDriverState **hd_table,
1764 1ade1de2 bellard
                   openpic_t *openpic, int irq)
1765 1ade1de2 bellard
{
1766 1ade1de2 bellard
    IDEState *ide_if;
1767 1ade1de2 bellard
    int pmac_ide_memory;
1768 1ade1de2 bellard
1769 1ade1de2 bellard
    ide_if = qemu_mallocz(sizeof(IDEState) * 2);
1770 1ade1de2 bellard
    ide_init2(&ide_if[0], irq, hd_table[0], hd_table[1]);
1771 1ade1de2 bellard
    ide_if[0].openpic = openpic;
1772 1ade1de2 bellard
    ide_if[1].openpic = openpic;
1773 1ade1de2 bellard
    
1774 1ade1de2 bellard
    pmac_ide_memory = cpu_register_io_memory(0, pmac_ide_read,
1775 1ade1de2 bellard
                                             pmac_ide_write, &ide_if[0]);
1776 1ade1de2 bellard
    return pmac_ide_memory;
1777 1ade1de2 bellard
}