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1 | b9adb4a6 | bellard | /* General "disassemble this chunk" code. Used for debugging. */
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2 | 5bbe9299 | bellard | #include "config.h" |
3 | b9adb4a6 | bellard | #include "dis-asm.h" |
4 | b9adb4a6 | bellard | #include "elf.h" |
5 | aa0aa4fa | bellard | #include <errno.h> |
6 | b9adb4a6 | bellard | |
7 | c6105c0a | bellard | #include "cpu.h" |
8 | c6105c0a | bellard | #include "exec-all.h" |
9 | 9307c4c1 | bellard | #include "disas.h" |
10 | c6105c0a | bellard | |
11 | b9adb4a6 | bellard | /* Filled in by elfload.c. Simplistic, but will do for now. */
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12 | e80cfcfc | bellard | struct syminfo *syminfos = NULL; |
13 | b9adb4a6 | bellard | |
14 | aa0aa4fa | bellard | /* Get LENGTH bytes from info's buffer, at target address memaddr.
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15 | aa0aa4fa | bellard | Transfer them to myaddr. */
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16 | aa0aa4fa | bellard | int
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17 | 3a742b76 | pbrook | buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
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18 | 3a742b76 | pbrook | struct disassemble_info *info)
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19 | aa0aa4fa | bellard | { |
20 | c6105c0a | bellard | if (memaddr < info->buffer_vma
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21 | c6105c0a | bellard | || memaddr + length > info->buffer_vma + info->buffer_length) |
22 | c6105c0a | bellard | /* Out of bounds. Use EIO because GDB uses it. */
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23 | c6105c0a | bellard | return EIO;
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24 | c6105c0a | bellard | memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length); |
25 | c6105c0a | bellard | return 0; |
26 | aa0aa4fa | bellard | } |
27 | aa0aa4fa | bellard | |
28 | c6105c0a | bellard | /* Get LENGTH bytes from info's buffer, at target address memaddr.
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29 | c6105c0a | bellard | Transfer them to myaddr. */
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30 | c6105c0a | bellard | static int |
31 | c27004ec | bellard | target_read_memory (bfd_vma memaddr, |
32 | c27004ec | bellard | bfd_byte *myaddr, |
33 | c27004ec | bellard | int length,
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34 | c27004ec | bellard | struct disassemble_info *info)
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35 | c6105c0a | bellard | { |
36 | e612a1f7 | Blue Swirl | cpu_memory_rw_debug(cpu_single_env, memaddr, myaddr, length, 0);
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37 | c6105c0a | bellard | return 0; |
38 | c6105c0a | bellard | } |
39 | c6105c0a | bellard | |
40 | aa0aa4fa | bellard | /* Print an error message. We can assume that this is in response to
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41 | aa0aa4fa | bellard | an error return from buffer_read_memory. */
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42 | aa0aa4fa | bellard | void
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43 | 3a742b76 | pbrook | perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info) |
44 | aa0aa4fa | bellard | { |
45 | aa0aa4fa | bellard | if (status != EIO)
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46 | aa0aa4fa | bellard | /* Can't happen. */
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47 | aa0aa4fa | bellard | (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
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48 | aa0aa4fa | bellard | else
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49 | aa0aa4fa | bellard | /* Actually, address between memaddr and memaddr + len was
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50 | aa0aa4fa | bellard | out of bounds. */
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51 | aa0aa4fa | bellard | (*info->fprintf_func) (info->stream, |
52 | 26a76461 | bellard | "Address 0x%" PRIx64 " is out of bounds.\n", memaddr); |
53 | aa0aa4fa | bellard | } |
54 | aa0aa4fa | bellard | |
55 | aa0aa4fa | bellard | /* This could be in a separate file, to save miniscule amounts of space
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56 | aa0aa4fa | bellard | in statically linked executables. */
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57 | aa0aa4fa | bellard | |
58 | aa0aa4fa | bellard | /* Just print the address is hex. This is included for completeness even
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59 | aa0aa4fa | bellard | though both GDB and objdump provide their own (to print symbolic
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60 | aa0aa4fa | bellard | addresses). */
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61 | aa0aa4fa | bellard | |
62 | aa0aa4fa | bellard | void
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63 | 3a742b76 | pbrook | generic_print_address (bfd_vma addr, struct disassemble_info *info)
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64 | aa0aa4fa | bellard | { |
65 | 26a76461 | bellard | (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
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66 | aa0aa4fa | bellard | } |
67 | aa0aa4fa | bellard | |
68 | aa0aa4fa | bellard | /* Just return the given address. */
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69 | aa0aa4fa | bellard | |
70 | aa0aa4fa | bellard | int
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71 | 3a742b76 | pbrook | generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
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72 | aa0aa4fa | bellard | { |
73 | aa0aa4fa | bellard | return 1; |
74 | aa0aa4fa | bellard | } |
75 | aa0aa4fa | bellard | |
76 | aa0aa4fa | bellard | bfd_vma bfd_getl32 (const bfd_byte *addr)
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77 | aa0aa4fa | bellard | { |
78 | aa0aa4fa | bellard | unsigned long v; |
79 | aa0aa4fa | bellard | |
80 | aa0aa4fa | bellard | v = (unsigned long) addr[0]; |
81 | aa0aa4fa | bellard | v |= (unsigned long) addr[1] << 8; |
82 | aa0aa4fa | bellard | v |= (unsigned long) addr[2] << 16; |
83 | aa0aa4fa | bellard | v |= (unsigned long) addr[3] << 24; |
84 | aa0aa4fa | bellard | return (bfd_vma) v;
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85 | aa0aa4fa | bellard | } |
86 | aa0aa4fa | bellard | |
87 | aa0aa4fa | bellard | bfd_vma bfd_getb32 (const bfd_byte *addr)
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88 | aa0aa4fa | bellard | { |
89 | aa0aa4fa | bellard | unsigned long v; |
90 | aa0aa4fa | bellard | |
91 | aa0aa4fa | bellard | v = (unsigned long) addr[0] << 24; |
92 | aa0aa4fa | bellard | v |= (unsigned long) addr[1] << 16; |
93 | aa0aa4fa | bellard | v |= (unsigned long) addr[2] << 8; |
94 | aa0aa4fa | bellard | v |= (unsigned long) addr[3]; |
95 | aa0aa4fa | bellard | return (bfd_vma) v;
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96 | aa0aa4fa | bellard | } |
97 | aa0aa4fa | bellard | |
98 | 6af0bf9c | bellard | bfd_vma bfd_getl16 (const bfd_byte *addr)
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99 | 6af0bf9c | bellard | { |
100 | 6af0bf9c | bellard | unsigned long v; |
101 | 6af0bf9c | bellard | |
102 | 6af0bf9c | bellard | v = (unsigned long) addr[0]; |
103 | 6af0bf9c | bellard | v |= (unsigned long) addr[1] << 8; |
104 | 6af0bf9c | bellard | return (bfd_vma) v;
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105 | 6af0bf9c | bellard | } |
106 | 6af0bf9c | bellard | |
107 | 6af0bf9c | bellard | bfd_vma bfd_getb16 (const bfd_byte *addr)
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108 | 6af0bf9c | bellard | { |
109 | 6af0bf9c | bellard | unsigned long v; |
110 | 6af0bf9c | bellard | |
111 | 6af0bf9c | bellard | v = (unsigned long) addr[0] << 24; |
112 | 6af0bf9c | bellard | v |= (unsigned long) addr[1] << 16; |
113 | 6af0bf9c | bellard | return (bfd_vma) v;
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114 | 6af0bf9c | bellard | } |
115 | 6af0bf9c | bellard | |
116 | c2d551ff | bellard | #ifdef TARGET_ARM
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117 | c2d551ff | bellard | static int |
118 | c2d551ff | bellard | print_insn_thumb1(bfd_vma pc, disassemble_info *info) |
119 | c2d551ff | bellard | { |
120 | c2d551ff | bellard | return print_insn_arm(pc | 1, info); |
121 | c2d551ff | bellard | } |
122 | c2d551ff | bellard | #endif
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123 | c2d551ff | bellard | |
124 | e91c8a77 | ths | /* Disassemble this for me please... (debugging). 'flags' has the following
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125 | c2d551ff | bellard | values:
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126 | c2d551ff | bellard | i386 - nonzero means 16 bit code
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127 | 5fafdf24 | ths | arm - nonzero means thumb code
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128 | 6a00d601 | bellard | ppc - nonzero means little endian
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129 | c2d551ff | bellard | other targets - unused
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130 | c2d551ff | bellard | */
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131 | 83b34f8b | bellard | void target_disas(FILE *out, target_ulong code, target_ulong size, int flags) |
132 | b9adb4a6 | bellard | { |
133 | c27004ec | bellard | target_ulong pc; |
134 | b9adb4a6 | bellard | int count;
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135 | b9adb4a6 | bellard | struct disassemble_info disasm_info;
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136 | b9adb4a6 | bellard | int (*print_insn)(bfd_vma pc, disassemble_info *info);
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137 | b9adb4a6 | bellard | |
138 | b9adb4a6 | bellard | INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf); |
139 | b9adb4a6 | bellard | |
140 | c27004ec | bellard | disasm_info.read_memory_func = target_read_memory; |
141 | c27004ec | bellard | disasm_info.buffer_vma = code; |
142 | c27004ec | bellard | disasm_info.buffer_length = size; |
143 | c27004ec | bellard | |
144 | c27004ec | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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145 | c27004ec | bellard | disasm_info.endian = BFD_ENDIAN_BIG; |
146 | c27004ec | bellard | #else
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147 | c27004ec | bellard | disasm_info.endian = BFD_ENDIAN_LITTLE; |
148 | c27004ec | bellard | #endif
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149 | c27004ec | bellard | #if defined(TARGET_I386)
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150 | c27004ec | bellard | if (flags == 2) |
151 | c27004ec | bellard | disasm_info.mach = bfd_mach_x86_64; |
152 | 5fafdf24 | ths | else if (flags == 1) |
153 | c27004ec | bellard | disasm_info.mach = bfd_mach_i386_i8086; |
154 | c27004ec | bellard | else
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155 | c27004ec | bellard | disasm_info.mach = bfd_mach_i386_i386; |
156 | c27004ec | bellard | print_insn = print_insn_i386; |
157 | c27004ec | bellard | #elif defined(TARGET_ARM)
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158 | c2d551ff | bellard | if (flags)
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159 | c2d551ff | bellard | print_insn = print_insn_thumb1; |
160 | c2d551ff | bellard | else
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161 | c2d551ff | bellard | print_insn = print_insn_arm; |
162 | c27004ec | bellard | #elif defined(TARGET_SPARC)
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163 | c27004ec | bellard | print_insn = print_insn_sparc; |
164 | 3475187d | bellard | #ifdef TARGET_SPARC64
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165 | 3475187d | bellard | disasm_info.mach = bfd_mach_sparc_v9b; |
166 | 3b46e624 | ths | #endif
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167 | c27004ec | bellard | #elif defined(TARGET_PPC)
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168 | 237c0af0 | j_mayer | if (flags >> 16) |
169 | 111bfab3 | bellard | disasm_info.endian = BFD_ENDIAN_LITTLE; |
170 | 237c0af0 | j_mayer | if (flags & 0xFFFF) { |
171 | 237c0af0 | j_mayer | /* If we have a precise definitions of the instructions set, use it */
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172 | 237c0af0 | j_mayer | disasm_info.mach = flags & 0xFFFF;
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173 | 237c0af0 | j_mayer | } else {
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174 | a2458627 | bellard | #ifdef TARGET_PPC64
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175 | 237c0af0 | j_mayer | disasm_info.mach = bfd_mach_ppc64; |
176 | a2458627 | bellard | #else
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177 | 237c0af0 | j_mayer | disasm_info.mach = bfd_mach_ppc; |
178 | a2458627 | bellard | #endif
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179 | 237c0af0 | j_mayer | } |
180 | c27004ec | bellard | print_insn = print_insn_ppc; |
181 | e6e5906b | pbrook | #elif defined(TARGET_M68K)
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182 | e6e5906b | pbrook | print_insn = print_insn_m68k; |
183 | 6af0bf9c | bellard | #elif defined(TARGET_MIPS)
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184 | 76b3030c | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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185 | 6af0bf9c | bellard | print_insn = print_insn_big_mips; |
186 | 76b3030c | bellard | #else
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187 | 76b3030c | bellard | print_insn = print_insn_little_mips; |
188 | 76b3030c | bellard | #endif
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189 | fdf9b3e8 | bellard | #elif defined(TARGET_SH4)
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190 | fdf9b3e8 | bellard | disasm_info.mach = bfd_mach_sh4; |
191 | fdf9b3e8 | bellard | print_insn = print_insn_sh; |
192 | eddf68a6 | j_mayer | #elif defined(TARGET_ALPHA)
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193 | eddf68a6 | j_mayer | disasm_info.mach = bfd_mach_alpha; |
194 | eddf68a6 | j_mayer | print_insn = print_insn_alpha; |
195 | a25fd137 | ths | #elif defined(TARGET_CRIS)
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196 | a25fd137 | ths | disasm_info.mach = bfd_mach_cris_v32; |
197 | a25fd137 | ths | print_insn = print_insn_crisv32; |
198 | e90e390c | Edgar E. Iglesias | #elif defined(TARGET_MICROBLAZE)
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199 | e90e390c | Edgar E. Iglesias | disasm_info.mach = bfd_arch_microblaze; |
200 | e90e390c | Edgar E. Iglesias | print_insn = print_insn_microblaze; |
201 | c27004ec | bellard | #else
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202 | b8076a74 | bellard | fprintf(out, "0x" TARGET_FMT_lx
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203 | b8076a74 | bellard | ": Asm output not supported on this arch\n", code);
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204 | c27004ec | bellard | return;
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205 | c6105c0a | bellard | #endif
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206 | c6105c0a | bellard | |
207 | 7e000c2e | blueswir1 | for (pc = code; size > 0; pc += count, size -= count) { |
208 | fa15e030 | bellard | fprintf(out, "0x" TARGET_FMT_lx ": ", pc); |
209 | c27004ec | bellard | count = print_insn(pc, &disasm_info); |
210 | c27004ec | bellard | #if 0
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211 | c27004ec | bellard | {
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212 | c27004ec | bellard | int i;
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213 | c27004ec | bellard | uint8_t b;
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214 | c27004ec | bellard | fprintf(out, " {");
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215 | c27004ec | bellard | for(i = 0; i < count; i++) {
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216 | c27004ec | bellard | target_read_memory(pc + i, &b, 1, &disasm_info);
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217 | c27004ec | bellard | fprintf(out, " %02x", b);
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218 | c27004ec | bellard | }
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219 | c27004ec | bellard | fprintf(out, " }");
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220 | c27004ec | bellard | }
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221 | c27004ec | bellard | #endif
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222 | c27004ec | bellard | fprintf(out, "\n");
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223 | c27004ec | bellard | if (count < 0) |
224 | c27004ec | bellard | break;
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225 | 754d00ae | malc | if (size < count) {
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226 | 754d00ae | malc | fprintf(out, |
227 | 754d00ae | malc | "Disassembler disagrees with translator over instruction "
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228 | 754d00ae | malc | "decoding\n"
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229 | 754d00ae | malc | "Please report this to qemu-devel@nongnu.org\n");
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230 | 754d00ae | malc | break;
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231 | 754d00ae | malc | } |
232 | c27004ec | bellard | } |
233 | c27004ec | bellard | } |
234 | c27004ec | bellard | |
235 | c27004ec | bellard | /* Disassemble this for me please... (debugging). */
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236 | c27004ec | bellard | void disas(FILE *out, void *code, unsigned long size) |
237 | c27004ec | bellard | { |
238 | c27004ec | bellard | unsigned long pc; |
239 | c27004ec | bellard | int count;
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240 | c27004ec | bellard | struct disassemble_info disasm_info;
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241 | c27004ec | bellard | int (*print_insn)(bfd_vma pc, disassemble_info *info);
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242 | c27004ec | bellard | |
243 | c27004ec | bellard | INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf); |
244 | c27004ec | bellard | |
245 | b9adb4a6 | bellard | disasm_info.buffer = code; |
246 | b9adb4a6 | bellard | disasm_info.buffer_vma = (unsigned long)code; |
247 | b9adb4a6 | bellard | disasm_info.buffer_length = size; |
248 | b9adb4a6 | bellard | |
249 | e2542fe2 | Juan Quintela | #ifdef HOST_WORDS_BIGENDIAN
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250 | c27004ec | bellard | disasm_info.endian = BFD_ENDIAN_BIG; |
251 | b9adb4a6 | bellard | #else
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252 | c27004ec | bellard | disasm_info.endian = BFD_ENDIAN_LITTLE; |
253 | b9adb4a6 | bellard | #endif
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254 | bc51c5c9 | bellard | #if defined(__i386__)
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255 | c27004ec | bellard | disasm_info.mach = bfd_mach_i386_i386; |
256 | c27004ec | bellard | print_insn = print_insn_i386; |
257 | bc51c5c9 | bellard | #elif defined(__x86_64__)
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258 | c27004ec | bellard | disasm_info.mach = bfd_mach_x86_64; |
259 | c27004ec | bellard | print_insn = print_insn_i386; |
260 | e58ffeb3 | malc | #elif defined(_ARCH_PPC)
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261 | c27004ec | bellard | print_insn = print_insn_ppc; |
262 | a993ba85 | bellard | #elif defined(__alpha__)
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263 | c27004ec | bellard | print_insn = print_insn_alpha; |
264 | aa0aa4fa | bellard | #elif defined(__sparc__)
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265 | c27004ec | bellard | print_insn = print_insn_sparc; |
266 | 6ecd4534 | blueswir1 | #if defined(__sparc_v8plus__) || defined(__sparc_v8plusa__) || defined(__sparc_v9__)
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267 | 6ecd4534 | blueswir1 | disasm_info.mach = bfd_mach_sparc_v9b; |
268 | 6ecd4534 | blueswir1 | #endif
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269 | 5fafdf24 | ths | #elif defined(__arm__)
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270 | c27004ec | bellard | print_insn = print_insn_arm; |
271 | 6af0bf9c | bellard | #elif defined(__MIPSEB__)
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272 | 6af0bf9c | bellard | print_insn = print_insn_big_mips; |
273 | 6af0bf9c | bellard | #elif defined(__MIPSEL__)
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274 | 6af0bf9c | bellard | print_insn = print_insn_little_mips; |
275 | 48024e4a | bellard | #elif defined(__m68k__)
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276 | 48024e4a | bellard | print_insn = print_insn_m68k; |
277 | 8f860bb8 | ths | #elif defined(__s390__)
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278 | 8f860bb8 | ths | print_insn = print_insn_s390; |
279 | f54b3f92 | aurel32 | #elif defined(__hppa__)
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280 | f54b3f92 | aurel32 | print_insn = print_insn_hppa; |
281 | b9adb4a6 | bellard | #else
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282 | b8076a74 | bellard | fprintf(out, "0x%lx: Asm output not supported on this arch\n",
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283 | b8076a74 | bellard | (long) code);
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284 | c27004ec | bellard | return;
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285 | b9adb4a6 | bellard | #endif
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286 | 7e000c2e | blueswir1 | for (pc = (unsigned long)code; size > 0; pc += count, size -= count) { |
287 | c27004ec | bellard | fprintf(out, "0x%08lx: ", pc);
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288 | aa0aa4fa | bellard | #ifdef __arm__
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289 | 46152182 | pbrook | /* since data is included in the code, it is better to
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290 | aa0aa4fa | bellard | display code data too */
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291 | 46152182 | pbrook | fprintf(out, "%08x ", (int)bfd_getl32((const bfd_byte *)pc)); |
292 | aa0aa4fa | bellard | #endif
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293 | c27004ec | bellard | count = print_insn(pc, &disasm_info); |
294 | b9adb4a6 | bellard | fprintf(out, "\n");
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295 | b9adb4a6 | bellard | if (count < 0) |
296 | b9adb4a6 | bellard | break;
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297 | b9adb4a6 | bellard | } |
298 | b9adb4a6 | bellard | } |
299 | b9adb4a6 | bellard | |
300 | b9adb4a6 | bellard | /* Look up symbol for debugging purpose. Returns "" if unknown. */
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301 | c27004ec | bellard | const char *lookup_symbol(target_ulong orig_addr) |
302 | b9adb4a6 | bellard | { |
303 | 49918a75 | pbrook | const char *symbol = ""; |
304 | e80cfcfc | bellard | struct syminfo *s;
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305 | 3b46e624 | ths | |
306 | e80cfcfc | bellard | for (s = syminfos; s; s = s->next) {
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307 | 49918a75 | pbrook | symbol = s->lookup_symbol(s, orig_addr); |
308 | 49918a75 | pbrook | if (symbol[0] != '\0') { |
309 | 49918a75 | pbrook | break;
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310 | 49918a75 | pbrook | } |
311 | b9adb4a6 | bellard | } |
312 | 49918a75 | pbrook | |
313 | 49918a75 | pbrook | return symbol;
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314 | b9adb4a6 | bellard | } |
315 | 9307c4c1 | bellard | |
316 | 9307c4c1 | bellard | #if !defined(CONFIG_USER_ONLY)
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317 | 9307c4c1 | bellard | |
318 | 376253ec | aliguori | #include "monitor.h" |
319 | 3d2cfdf1 | bellard | |
320 | 9307c4c1 | bellard | static int monitor_disas_is_physical; |
321 | 6a00d601 | bellard | static CPUState *monitor_disas_env;
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322 | 9307c4c1 | bellard | |
323 | 9307c4c1 | bellard | static int |
324 | a5f1b965 | blueswir1 | monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
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325 | a5f1b965 | blueswir1 | struct disassemble_info *info)
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326 | 9307c4c1 | bellard | { |
327 | 9307c4c1 | bellard | if (monitor_disas_is_physical) {
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328 | 9307c4c1 | bellard | cpu_physical_memory_rw(memaddr, myaddr, length, 0);
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329 | 9307c4c1 | bellard | } else {
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330 | 6a00d601 | bellard | cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
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331 | 9307c4c1 | bellard | } |
332 | 9307c4c1 | bellard | return 0; |
333 | 9307c4c1 | bellard | } |
334 | 9307c4c1 | bellard | |
335 | 3d2cfdf1 | bellard | static int monitor_fprintf(FILE *stream, const char *fmt, ...) |
336 | 3d2cfdf1 | bellard | { |
337 | 3d2cfdf1 | bellard | va_list ap; |
338 | 3d2cfdf1 | bellard | va_start(ap, fmt); |
339 | 376253ec | aliguori | monitor_vprintf((Monitor *)stream, fmt, ap); |
340 | 3d2cfdf1 | bellard | va_end(ap); |
341 | 3d2cfdf1 | bellard | return 0; |
342 | 3d2cfdf1 | bellard | } |
343 | 3d2cfdf1 | bellard | |
344 | 376253ec | aliguori | void monitor_disas(Monitor *mon, CPUState *env,
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345 | 6a00d601 | bellard | target_ulong pc, int nb_insn, int is_physical, int flags) |
346 | 9307c4c1 | bellard | { |
347 | 9307c4c1 | bellard | int count, i;
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348 | 9307c4c1 | bellard | struct disassemble_info disasm_info;
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349 | 9307c4c1 | bellard | int (*print_insn)(bfd_vma pc, disassemble_info *info);
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350 | 9307c4c1 | bellard | |
351 | 376253ec | aliguori | INIT_DISASSEMBLE_INFO(disasm_info, (FILE *)mon, monitor_fprintf); |
352 | 9307c4c1 | bellard | |
353 | 6a00d601 | bellard | monitor_disas_env = env; |
354 | 9307c4c1 | bellard | monitor_disas_is_physical = is_physical; |
355 | 9307c4c1 | bellard | disasm_info.read_memory_func = monitor_read_memory; |
356 | 9307c4c1 | bellard | |
357 | 9307c4c1 | bellard | disasm_info.buffer_vma = pc; |
358 | 9307c4c1 | bellard | |
359 | 9307c4c1 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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360 | 9307c4c1 | bellard | disasm_info.endian = BFD_ENDIAN_BIG; |
361 | 9307c4c1 | bellard | #else
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362 | 9307c4c1 | bellard | disasm_info.endian = BFD_ENDIAN_LITTLE; |
363 | 9307c4c1 | bellard | #endif
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364 | 9307c4c1 | bellard | #if defined(TARGET_I386)
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365 | fa15e030 | bellard | if (flags == 2) |
366 | fa15e030 | bellard | disasm_info.mach = bfd_mach_x86_64; |
367 | 5fafdf24 | ths | else if (flags == 1) |
368 | 9307c4c1 | bellard | disasm_info.mach = bfd_mach_i386_i8086; |
369 | fa15e030 | bellard | else
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370 | fa15e030 | bellard | disasm_info.mach = bfd_mach_i386_i386; |
371 | 9307c4c1 | bellard | print_insn = print_insn_i386; |
372 | 9307c4c1 | bellard | #elif defined(TARGET_ARM)
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373 | 9307c4c1 | bellard | print_insn = print_insn_arm; |
374 | cbd669da | ths | #elif defined(TARGET_ALPHA)
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375 | cbd669da | ths | print_insn = print_insn_alpha; |
376 | 9307c4c1 | bellard | #elif defined(TARGET_SPARC)
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377 | 9307c4c1 | bellard | print_insn = print_insn_sparc; |
378 | 682c4f15 | blueswir1 | #ifdef TARGET_SPARC64
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379 | 682c4f15 | blueswir1 | disasm_info.mach = bfd_mach_sparc_v9b; |
380 | 682c4f15 | blueswir1 | #endif
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381 | 9307c4c1 | bellard | #elif defined(TARGET_PPC)
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382 | a2458627 | bellard | #ifdef TARGET_PPC64
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383 | a2458627 | bellard | disasm_info.mach = bfd_mach_ppc64; |
384 | a2458627 | bellard | #else
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385 | a2458627 | bellard | disasm_info.mach = bfd_mach_ppc; |
386 | a2458627 | bellard | #endif
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387 | 9307c4c1 | bellard | print_insn = print_insn_ppc; |
388 | e6e5906b | pbrook | #elif defined(TARGET_M68K)
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389 | e6e5906b | pbrook | print_insn = print_insn_m68k; |
390 | 6af0bf9c | bellard | #elif defined(TARGET_MIPS)
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391 | 76b3030c | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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392 | 6af0bf9c | bellard | print_insn = print_insn_big_mips; |
393 | 76b3030c | bellard | #else
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394 | 76b3030c | bellard | print_insn = print_insn_little_mips; |
395 | 76b3030c | bellard | #endif
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396 | b4e1f077 | Magnus Damm | #elif defined(TARGET_SH4)
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397 | b4e1f077 | Magnus Damm | disasm_info.mach = bfd_mach_sh4; |
398 | b4e1f077 | Magnus Damm | print_insn = print_insn_sh; |
399 | 9307c4c1 | bellard | #else
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400 | 376253ec | aliguori | monitor_printf(mon, "0x" TARGET_FMT_lx
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401 | 376253ec | aliguori | ": Asm output not supported on this arch\n", pc);
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402 | 9307c4c1 | bellard | return;
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403 | 9307c4c1 | bellard | #endif
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404 | 9307c4c1 | bellard | |
405 | 9307c4c1 | bellard | for(i = 0; i < nb_insn; i++) { |
406 | 376253ec | aliguori | monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc); |
407 | 9307c4c1 | bellard | count = print_insn(pc, &disasm_info); |
408 | 376253ec | aliguori | monitor_printf(mon, "\n");
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409 | 9307c4c1 | bellard | if (count < 0) |
410 | 9307c4c1 | bellard | break;
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411 | 9307c4c1 | bellard | pc += count; |
412 | 9307c4c1 | bellard | } |
413 | 9307c4c1 | bellard | } |
414 | 9307c4c1 | bellard | #endif |