root / hw / lance.c @ dd4239d6
History | View | Annotate | Download (4.2 kB)
1 |
/*
|
---|---|
2 |
* QEMU AMD PC-Net II (Am79C970A) emulation
|
3 |
*
|
4 |
* Copyright (c) 2004 Antony T Curtis
|
5 |
*
|
6 |
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
7 |
* of this software and associated documentation files (the "Software"), to deal
|
8 |
* in the Software without restriction, including without limitation the rights
|
9 |
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
10 |
* copies of the Software, and to permit persons to whom the Software is
|
11 |
* furnished to do so, subject to the following conditions:
|
12 |
*
|
13 |
* The above copyright notice and this permission notice shall be included in
|
14 |
* all copies or substantial portions of the Software.
|
15 |
*
|
16 |
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
17 |
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
18 |
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
19 |
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
20 |
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
21 |
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
22 |
* THE SOFTWARE.
|
23 |
*/
|
24 |
|
25 |
/* This software was written to be compatible with the specification:
|
26 |
* AMD Am79C970A PCnet-PCI II Ethernet Controller Data-Sheet
|
27 |
* AMD Publication# 19436 Rev:E Amendment/0 Issue Date: June 2000
|
28 |
*/
|
29 |
|
30 |
/*
|
31 |
* On Sparc32, this is the Lance (Am7990) part of chip STP2000 (Master I/O), also
|
32 |
* produced as NCR89C100. See
|
33 |
* http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C100.txt
|
34 |
* and
|
35 |
* http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR92C990.txt
|
36 |
*/
|
37 |
|
38 |
#include "sysbus.h" |
39 |
#include "net.h" |
40 |
#include "qemu-timer.h" |
41 |
#include "qemu_socket.h" |
42 |
#include "sun4m.h" |
43 |
|
44 |
#include "pcnet.h" |
45 |
|
46 |
typedef struct { |
47 |
SysBusDevice busdev; |
48 |
PCNetState state; |
49 |
} SysBusPCNetState; |
50 |
|
51 |
static void parent_lance_reset(void *opaque, int irq, int level) |
52 |
{ |
53 |
SysBusPCNetState *d = opaque; |
54 |
if (level)
|
55 |
pcnet_h_reset(&d->state); |
56 |
} |
57 |
|
58 |
static void lance_mem_writew(void *opaque, target_phys_addr_t addr, |
59 |
uint32_t val) |
60 |
{ |
61 |
SysBusPCNetState *d = opaque; |
62 |
#ifdef PCNET_DEBUG_IO
|
63 |
printf("lance_mem_writew addr=" TARGET_FMT_plx " val=0x%04x\n", addr, |
64 |
val & 0xffff);
|
65 |
#endif
|
66 |
pcnet_ioport_writew(&d->state, addr, val & 0xffff);
|
67 |
} |
68 |
|
69 |
static uint32_t lance_mem_readw(void *opaque, target_phys_addr_t addr) |
70 |
{ |
71 |
SysBusPCNetState *d = opaque; |
72 |
uint32_t val; |
73 |
|
74 |
val = pcnet_ioport_readw(&d->state, addr); |
75 |
#ifdef PCNET_DEBUG_IO
|
76 |
printf("lance_mem_readw addr=" TARGET_FMT_plx " val = 0x%04x\n", addr, |
77 |
val & 0xffff);
|
78 |
#endif
|
79 |
|
80 |
return val & 0xffff; |
81 |
} |
82 |
|
83 |
static CPUReadMemoryFunc * const lance_mem_read[3] = { |
84 |
NULL,
|
85 |
lance_mem_readw, |
86 |
NULL,
|
87 |
}; |
88 |
|
89 |
static CPUWriteMemoryFunc * const lance_mem_write[3] = { |
90 |
NULL,
|
91 |
lance_mem_writew, |
92 |
NULL,
|
93 |
}; |
94 |
|
95 |
static void lance_cleanup(VLANClientState *vc) |
96 |
{ |
97 |
PCNetState *d = vc->opaque; |
98 |
|
99 |
vmstate_unregister(&vmstate_pcnet, d); |
100 |
pcnet_common_cleanup(d); |
101 |
} |
102 |
|
103 |
static int lance_init(SysBusDevice *dev) |
104 |
{ |
105 |
SysBusPCNetState *d = FROM_SYSBUS(SysBusPCNetState, dev); |
106 |
PCNetState *s = &d->state; |
107 |
|
108 |
s->mmio_index = |
109 |
cpu_register_io_memory(lance_mem_read, lance_mem_write, d); |
110 |
|
111 |
qdev_init_gpio_in(&dev->qdev, parent_lance_reset, 1);
|
112 |
|
113 |
sysbus_init_mmio(dev, 4, s->mmio_index);
|
114 |
|
115 |
sysbus_init_irq(dev, &s->irq); |
116 |
|
117 |
s->phys_mem_read = ledma_memory_read; |
118 |
s->phys_mem_write = ledma_memory_write; |
119 |
|
120 |
vmstate_register(-1, &vmstate_pcnet, d);
|
121 |
return pcnet_common_init(&dev->qdev, s, lance_cleanup);
|
122 |
} |
123 |
|
124 |
static void lance_reset(DeviceState *dev) |
125 |
{ |
126 |
SysBusPCNetState *d = DO_UPCAST(SysBusPCNetState, busdev.qdev, dev); |
127 |
|
128 |
pcnet_h_reset(&d->state); |
129 |
} |
130 |
|
131 |
static SysBusDeviceInfo lance_info = {
|
132 |
.init = lance_init, |
133 |
.qdev.name = "lance",
|
134 |
.qdev.size = sizeof(SysBusPCNetState),
|
135 |
.qdev.reset = lance_reset, |
136 |
.qdev.props = (Property[]) { |
137 |
DEFINE_PROP_PTR("dma", SysBusPCNetState, state.dma_opaque),
|
138 |
DEFINE_NIC_PROPERTIES(SysBusPCNetState, state.conf), |
139 |
DEFINE_PROP_END_OF_LIST(), |
140 |
} |
141 |
}; |
142 |
|
143 |
static void lance_register_devices(void) |
144 |
{ |
145 |
sysbus_register_withprop(&lance_info); |
146 |
} |
147 |
device_init(lance_register_devices) |