Revision dd8e9379

b/hw/e1000.c
1151 1151

  
1152 1152
    pci_conf = d->dev.config;
1153 1153

  
1154
    /* TODO: we have no capabilities, so why is this bit set? */
1155
    pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_CAP_LIST);
1156 1154
    /* TODO: RST# value should be 0, PCI spec 6.2.4 */
1157 1155
    pci_conf[PCI_CACHE_LINE_SIZE] = 0x10;
1158 1156

  

Also available in: Unified diff