Revision dd94ad96 target-ppc/op_helper.c
| b/target-ppc/op_helper.c | ||
|---|---|---|
| 974 | 974 |
|
| 975 | 975 |
farg1.ll = arg1; |
| 976 | 976 |
farg2.ll = arg2; |
| 977 |
#if USE_PRECISE_EMULATION |
|
| 977 |
|
|
| 978 | 978 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 979 | 979 |
float64_is_signaling_nan(farg2.d))) {
|
| 980 | 980 |
/* sNaN addition */ |
| ... | ... | |
| 986 | 986 |
} else {
|
| 987 | 987 |
farg1.d = float64_add(farg1.d, farg2.d, &env->fp_status); |
| 988 | 988 |
} |
| 989 |
#else |
|
| 990 |
farg1.d = float64_add(farg1.d, farg2.d, &env->fp_status); |
|
| 991 |
#endif |
|
| 989 |
|
|
| 992 | 990 |
return farg1.ll; |
| 993 | 991 |
} |
| 994 | 992 |
|
| ... | ... | |
| 999 | 997 |
|
| 1000 | 998 |
farg1.ll = arg1; |
| 1001 | 999 |
farg2.ll = arg2; |
| 1002 |
#if USE_PRECISE_EMULATION |
|
| 1003 |
{
|
|
| 1000 |
|
|
| 1004 | 1001 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1005 | 1002 |
float64_is_signaling_nan(farg2.d))) {
|
| 1006 | 1003 |
/* sNaN subtraction */ |
| ... | ... | |
| 1012 | 1009 |
} else {
|
| 1013 | 1010 |
farg1.d = float64_sub(farg1.d, farg2.d, &env->fp_status); |
| 1014 | 1011 |
} |
| 1015 |
} |
|
| 1016 |
#else |
|
| 1017 |
farg1.d = float64_sub(farg1.d, farg2.d, &env->fp_status); |
|
| 1018 |
#endif |
|
| 1012 |
|
|
| 1019 | 1013 |
return farg1.ll; |
| 1020 | 1014 |
} |
| 1021 | 1015 |
|
| ... | ... | |
| 1026 | 1020 |
|
| 1027 | 1021 |
farg1.ll = arg1; |
| 1028 | 1022 |
farg2.ll = arg2; |
| 1029 |
#if USE_PRECISE_EMULATION |
|
| 1023 |
|
|
| 1030 | 1024 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1031 | 1025 |
float64_is_signaling_nan(farg2.d))) {
|
| 1032 | 1026 |
/* sNaN multiplication */ |
| ... | ... | |
| 1038 | 1032 |
} else {
|
| 1039 | 1033 |
farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); |
| 1040 | 1034 |
} |
| 1041 |
#else |
|
| 1042 |
farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); |
|
| 1043 |
#endif |
|
| 1035 |
|
|
| 1044 | 1036 |
return farg1.ll; |
| 1045 | 1037 |
} |
| 1046 | 1038 |
|
| ... | ... | |
| 1051 | 1043 |
|
| 1052 | 1044 |
farg1.ll = arg1; |
| 1053 | 1045 |
farg2.ll = arg2; |
| 1054 |
#if USE_PRECISE_EMULATION |
|
| 1046 |
|
|
| 1055 | 1047 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1056 | 1048 |
float64_is_signaling_nan(farg2.d))) {
|
| 1057 | 1049 |
/* sNaN division */ |
| ... | ... | |
| 1065 | 1057 |
} else {
|
| 1066 | 1058 |
farg1.d = float64_div(farg1.d, farg2.d, &env->fp_status); |
| 1067 | 1059 |
} |
| 1068 |
#else |
|
| 1069 |
farg1.d = float64_div(farg1.d, farg2.d, &env->fp_status); |
|
| 1070 |
#endif |
|
| 1060 |
|
|
| 1071 | 1061 |
return farg1.ll; |
| 1072 | 1062 |
} |
| 1073 | 1063 |
|
| ... | ... | |
| 1116 | 1106 |
farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); |
| 1117 | 1107 |
} else {
|
| 1118 | 1108 |
farg.ll = float64_to_int32(farg.d, &env->fp_status); |
| 1119 |
#if USE_PRECISE_EMULATION |
|
| 1120 | 1109 |
/* XXX: higher bits are not supposed to be significant. |
| 1121 | 1110 |
* to make tests easier, return the same as a real PowerPC 750 |
| 1122 | 1111 |
*/ |
| 1123 | 1112 |
farg.ll |= 0xFFF80000ULL << 32; |
| 1124 |
#endif |
|
| 1125 | 1113 |
} |
| 1126 | 1114 |
return farg.ll; |
| 1127 | 1115 |
} |
| ... | ... | |
| 1140 | 1128 |
farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); |
| 1141 | 1129 |
} else {
|
| 1142 | 1130 |
farg.ll = float64_to_int32_round_to_zero(farg.d, &env->fp_status); |
| 1143 |
#if USE_PRECISE_EMULATION |
|
| 1144 | 1131 |
/* XXX: higher bits are not supposed to be significant. |
| 1145 | 1132 |
* to make tests easier, return the same as a real PowerPC 750 |
| 1146 | 1133 |
*/ |
| 1147 | 1134 |
farg.ll |= 0xFFF80000ULL << 32; |
| 1148 |
#endif |
|
| 1149 | 1135 |
} |
| 1150 | 1136 |
return farg.ll; |
| 1151 | 1137 |
} |
| ... | ... | |
| 1245 | 1231 |
farg1.ll = arg1; |
| 1246 | 1232 |
farg2.ll = arg2; |
| 1247 | 1233 |
farg3.ll = arg3; |
| 1248 |
#if USE_PRECISE_EMULATION |
|
| 1234 |
|
|
| 1249 | 1235 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1250 | 1236 |
float64_is_signaling_nan(farg2.d) || |
| 1251 | 1237 |
float64_is_signaling_nan(farg3.d))) {
|
| ... | ... | |
| 1277 | 1263 |
farg1.d = (farg1.d * farg2.d) + farg3.d; |
| 1278 | 1264 |
#endif |
| 1279 | 1265 |
} |
| 1280 |
#else |
|
| 1281 |
farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); |
|
| 1282 |
farg1.d = float64_add(farg1.d, farg3.d, &env->fp_status); |
|
| 1283 |
#endif |
|
| 1266 |
|
|
| 1284 | 1267 |
return farg1.ll; |
| 1285 | 1268 |
} |
| 1286 | 1269 |
|
| ... | ... | |
| 1292 | 1275 |
farg1.ll = arg1; |
| 1293 | 1276 |
farg2.ll = arg2; |
| 1294 | 1277 |
farg3.ll = arg3; |
| 1295 |
#if USE_PRECISE_EMULATION |
|
| 1278 |
|
|
| 1296 | 1279 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1297 | 1280 |
float64_is_signaling_nan(farg2.d) || |
| 1298 | 1281 |
float64_is_signaling_nan(farg3.d))) {
|
| ... | ... | |
| 1324 | 1307 |
farg1.d = (farg1.d * farg2.d) - farg3.d; |
| 1325 | 1308 |
#endif |
| 1326 | 1309 |
} |
| 1327 |
#else |
|
| 1328 |
farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); |
|
| 1329 |
farg1.d = float64_sub(farg1.d, farg3.d, &env->fp_status); |
|
| 1330 |
#endif |
|
| 1331 | 1310 |
return farg1.ll; |
| 1332 | 1311 |
} |
| 1333 | 1312 |
|
| ... | ... | |
| 1350 | 1329 |
/* Multiplication of zero by infinity */ |
| 1351 | 1330 |
farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ); |
| 1352 | 1331 |
} else {
|
| 1353 |
#if USE_PRECISE_EMULATION |
|
| 1354 | 1332 |
#ifdef FLOAT128 |
| 1355 | 1333 |
/* This is the way the PowerPC specification defines it */ |
| 1356 | 1334 |
float128 ft0_128, ft1_128; |
| ... | ... | |
| 1371 | 1349 |
/* This is OK on x86 hosts */ |
| 1372 | 1350 |
farg1.d = (farg1.d * farg2.d) + farg3.d; |
| 1373 | 1351 |
#endif |
| 1374 |
#else |
|
| 1375 |
farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); |
|
| 1376 |
farg1.d = float64_add(farg1.d, farg3.d, &env->fp_status); |
|
| 1377 |
#endif |
|
| 1378 | 1352 |
if (likely(!float64_is_quiet_nan(farg1.d))) |
| 1379 | 1353 |
farg1.d = float64_chs(farg1.d); |
| 1380 | 1354 |
} |
| ... | ... | |
| 1400 | 1374 |
/* Multiplication of zero by infinity */ |
| 1401 | 1375 |
farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ); |
| 1402 | 1376 |
} else {
|
| 1403 |
#if USE_PRECISE_EMULATION |
|
| 1404 | 1377 |
#ifdef FLOAT128 |
| 1405 | 1378 |
/* This is the way the PowerPC specification defines it */ |
| 1406 | 1379 |
float128 ft0_128, ft1_128; |
| ... | ... | |
| 1421 | 1394 |
/* This is OK on x86 hosts */ |
| 1422 | 1395 |
farg1.d = (farg1.d * farg2.d) - farg3.d; |
| 1423 | 1396 |
#endif |
| 1424 |
#else |
|
| 1425 |
farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); |
|
| 1426 |
farg1.d = float64_sub(farg1.d, farg3.d, &env->fp_status); |
|
| 1427 |
#endif |
|
| 1428 | 1397 |
if (likely(!float64_is_quiet_nan(farg1.d))) |
| 1429 | 1398 |
farg1.d = float64_chs(farg1.d); |
| 1430 | 1399 |
} |
| ... | ... | |
| 1438 | 1407 |
float32 f32; |
| 1439 | 1408 |
farg.ll = arg; |
| 1440 | 1409 |
|
| 1441 |
#if USE_PRECISE_EMULATION |
|
| 1442 | 1410 |
if (unlikely(float64_is_signaling_nan(farg.d))) {
|
| 1443 | 1411 |
/* sNaN square root */ |
| 1444 | 1412 |
farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
| ... | ... | |
| 1446 | 1414 |
f32 = float64_to_float32(farg.d, &env->fp_status); |
| 1447 | 1415 |
farg.d = float32_to_float64(f32, &env->fp_status); |
| 1448 | 1416 |
} |
| 1449 |
#else |
|
| 1450 |
f32 = float64_to_float32(farg.d, &env->fp_status); |
|
| 1451 |
farg.d = float32_to_float64(f32, &env->fp_status); |
|
| 1452 |
#endif |
|
| 1453 | 1417 |
return farg.ll; |
| 1454 | 1418 |
} |
| 1455 | 1419 |
|
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