Revision de00982e
| b/hw/xen_platform.c | ||
|---|---|---|
| 32 | 32 |
#include "xen_common.h" |
| 33 | 33 |
#include "net.h" |
| 34 | 34 |
#include "xen_backend.h" |
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#include "rwhandler.h" |
|
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#include "trace.h" |
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#include "exec-memory.h" |
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| 37 | 37 |
|
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#include <xenguest.h> |
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|
| ... | ... | |
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|
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typedef struct PCIXenPlatformState {
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PCIDevice pci_dev; |
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MemoryRegion fixed_io; |
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MemoryRegion bar; |
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MemoryRegion mmio_bar; |
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uint8_t flags; /* used only for version_id == 2 */ |
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int drivers_blacklisted; |
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uint16_t driver_product_version; |
| ... | ... | |
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platform_fixed_ioport_writeb(s, XEN_PLATFORM_IOPORT, 0); |
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} |
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const MemoryRegionPortio xen_platform_ioport[] = {
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{ 0, 16, 4, .write = platform_fixed_ioport_writel, },
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{ 0, 16, 2, .write = platform_fixed_ioport_writew, },
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{ 0, 16, 1, .write = platform_fixed_ioport_writeb, },
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{ 0, 16, 2, .read = platform_fixed_ioport_readw, },
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{ 0, 16, 1, .read = platform_fixed_ioport_readb, },
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PORTIO_END_OF_LIST() |
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}; |
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|
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static const MemoryRegionOps platform_fixed_io_ops = {
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.old_portio = xen_platform_ioport, |
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.endianness = DEVICE_NATIVE_ENDIAN, |
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}; |
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|
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static void platform_fixed_ioport_init(PCIXenPlatformState* s) |
| 225 | 242 |
{
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register_ioport_write(XEN_PLATFORM_IOPORT, 16, 4, platform_fixed_ioport_writel, s); |
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register_ioport_write(XEN_PLATFORM_IOPORT, 16, 2, platform_fixed_ioport_writew, s); |
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register_ioport_write(XEN_PLATFORM_IOPORT, 16, 1, platform_fixed_ioport_writeb, s); |
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register_ioport_read(XEN_PLATFORM_IOPORT, 16, 2, platform_fixed_ioport_readw, s); |
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register_ioport_read(XEN_PLATFORM_IOPORT, 16, 1, platform_fixed_ioport_readb, s); |
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memory_region_init_io(&s->fixed_io, &platform_fixed_io_ops, s, |
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"xen-fixed", 16); |
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memory_region_add_subregion(get_system_io(), XEN_PLATFORM_IOPORT, |
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&s->fixed_io); |
|
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} |
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|
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/* Xen Platform PCI Device */ |
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|
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static uint32_t xen_platform_ioport_readb(void *opaque, uint32_t addr) |
| 236 | 252 |
{
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addr &= 0xff; |
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|
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if (addr == 0) {
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return platform_fixed_ioport_readb(opaque, XEN_PLATFORM_IOPORT); |
| 241 | 255 |
} else {
|
| ... | ... | |
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{
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PCIXenPlatformState *s = opaque; |
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addr &= 0xff; |
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val &= 0xff; |
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|
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switch (addr) {
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case 0: /* Platform flags */ |
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platform_fixed_ioport_writeb(opaque, XEN_PLATFORM_IOPORT, val); |
| ... | ... | |
| 262 | 273 |
} |
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} |
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|
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static void platform_ioport_map(PCIDevice *pci_dev, int region_num, pcibus_t addr, pcibus_t size, int type) |
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{
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PCIXenPlatformState *d = DO_UPCAST(PCIXenPlatformState, pci_dev, pci_dev); |
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static MemoryRegionPortio xen_pci_portio[] = {
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{ 0, 0x100, 1, .read = xen_platform_ioport_readb, },
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{ 0, 0x100, 1, .write = xen_platform_ioport_writeb, },
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PORTIO_END_OF_LIST() |
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}; |
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static const MemoryRegionOps xen_pci_io_ops = {
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.old_portio = xen_pci_portio, |
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}; |
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register_ioport_write(addr, size, 1, xen_platform_ioport_writeb, d); |
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register_ioport_read(addr, size, 1, xen_platform_ioport_readb, d); |
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static void platform_ioport_bar_setup(PCIXenPlatformState *d) |
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{
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memory_region_init_io(&d->bar, &xen_pci_io_ops, d, "xen-pci", 0x100); |
|
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} |
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static uint32_t platform_mmio_read(ReadWriteHandler *handler, pcibus_t addr, int len) |
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static uint64_t platform_mmio_read(void *opaque, target_phys_addr_t addr, |
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unsigned size) |
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{
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DPRINTF("Warning: attempted read from physical address "
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"0x" TARGET_FMT_plx " in xen platform mmio space\n", addr); |
| ... | ... | |
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return 0; |
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} |
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static void platform_mmio_write(ReadWriteHandler *handler, pcibus_t addr,
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uint32_t val, int len)
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static void platform_mmio_write(void *opaque, target_phys_addr_t addr,
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uint64_t val, unsigned size)
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{
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DPRINTF("Warning: attempted write of 0x%x to physical "
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DPRINTF("Warning: attempted write of 0x%"PRIx64" to physical "
|
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"address 0x" TARGET_FMT_plx " in xen platform mmio space\n", |
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val, addr); |
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} |
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static ReadWriteHandler platform_mmio_handler = {
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static const MemoryRegionOps platform_mmio_handler = {
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.read = &platform_mmio_read, |
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.write = &platform_mmio_write, |
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.endianness = DEVICE_NATIVE_ENDIAN, |
|
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}; |
| 293 | 313 |
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static void platform_mmio_map(PCIDevice *d, int region_num, |
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pcibus_t addr, pcibus_t size, int type) |
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static void platform_mmio_setup(PCIXenPlatformState *d) |
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{
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int mmio_io_addr; |
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mmio_io_addr = cpu_register_io_memory_simple(&platform_mmio_handler, |
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DEVICE_NATIVE_ENDIAN); |
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|
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cpu_register_physical_memory(addr, size, mmio_io_addr); |
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memory_region_init_io(&d->mmio_bar, &platform_mmio_handler, d, |
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"xen-mmio", 0x1000000); |
|
| 303 | 318 |
} |
| 304 | 319 |
|
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static int xen_platform_post_load(void *opaque, int version_id) |
| ... | ... | |
| 337 | 352 |
|
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pci_conf[PCI_INTERRUPT_PIN] = 1; |
| 339 | 354 |
|
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pci_register_bar(&d->pci_dev, 0, 0x100, |
|
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PCI_BASE_ADDRESS_SPACE_IO, platform_ioport_map); |
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platform_ioport_bar_setup(d); |
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pci_register_bar_region(&d->pci_dev, 0, |
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PCI_BASE_ADDRESS_SPACE_IO, &d->bar); |
|
| 342 | 358 |
|
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/* reserve 16MB mmio address for share memory*/ |
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pci_register_bar(&d->pci_dev, 1, 0x1000000, |
|
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PCI_BASE_ADDRESS_MEM_PREFETCH, platform_mmio_map); |
|
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platform_mmio_setup(d); |
|
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pci_register_bar_region(&d->pci_dev, 1, |
|
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PCI_BASE_ADDRESS_MEM_PREFETCH, &d->mmio_bar); |
|
| 346 | 363 |
|
| 347 | 364 |
platform_fixed_ioport_init(d); |
| 348 | 365 |
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