root / fpu / softfloat-specialize.h @ de4af5f7
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/*============================================================================
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This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
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Arithmetic Package, Release 2b.
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Written by John R. Hauser. This work was made possible in part by the
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International Computer Science Institute, located at Suite 600, 1947 Center
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Street, Berkeley, California 94704. Funding was partially provided by the
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National Science Foundation under grant MIP-9311980. The original version
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of this code was written as part of a project to build a fixed-point vector
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processor in collaboration with the University of California at Berkeley,
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overseen by Profs. Nelson Morgan and John Wawrzynek. More information
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is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
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arithmetic/SoftFloat.html'.
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THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
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been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
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RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
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AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
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COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
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EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
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INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
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OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
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Derivative works are acceptable, even for commercial purposes, so long as
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(1) the source code for the derivative work includes prominent notice that
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the work is derivative, and (2) the source code includes prominent notice with
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these four paragraphs for those parts of this code that are retained.
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=============================================================================*/
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#if defined(TARGET_MIPS) || defined(TARGET_SH4)
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#define SNAN_BIT_IS_ONE 1 |
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#else
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#define SNAN_BIT_IS_ONE 0 |
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#endif
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/*----------------------------------------------------------------------------
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| Raises the exceptions specified by `flags'. Floating-point traps can be
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| defined here if desired. It is currently not possible for such a trap
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| to substitute a result value. If traps are not implemented, this routine
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| should be simply `float_exception_flags |= flags;'.
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*----------------------------------------------------------------------------*/
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void float_raise( int8 flags STATUS_PARAM )
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{ |
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STATUS(float_exception_flags) |= flags; |
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} |
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/*----------------------------------------------------------------------------
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| Internal canonical NaN format.
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*----------------------------------------------------------------------------*/
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typedef struct { |
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flag sign; |
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bits64 high, low; |
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} commonNaNT; |
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/*----------------------------------------------------------------------------
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| The pattern for a default generated single-precision NaN.
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*----------------------------------------------------------------------------*/
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#if defined(TARGET_SPARC)
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#define float32_default_nan make_float32(0x7FFFFFFF) |
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#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
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#define float32_default_nan make_float32(0x7FC00000) |
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#elif SNAN_BIT_IS_ONE
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#define float32_default_nan make_float32(0x7FBFFFFF) |
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#else
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#define float32_default_nan make_float32(0xFFC00000) |
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#endif
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/*----------------------------------------------------------------------------
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| Returns 1 if the single-precision floating-point value `a' is a quiet
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| NaN; otherwise returns 0.
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*----------------------------------------------------------------------------*/
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int float32_is_quiet_nan( float32 a_ )
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{ |
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uint32_t a = float32_val(a_); |
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#if SNAN_BIT_IS_ONE
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return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); |
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#else
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return ( 0xFF800000 <= (bits32) ( a<<1 ) ); |
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#endif
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} |
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/*----------------------------------------------------------------------------
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| Returns 1 if the single-precision floating-point value `a' is a signaling
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| NaN; otherwise returns 0.
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*----------------------------------------------------------------------------*/
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int float32_is_signaling_nan( float32 a_ )
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{ |
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uint32_t a = float32_val(a_); |
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#if SNAN_BIT_IS_ONE
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return ( 0xFF800000 <= (bits32) ( a<<1 ) ); |
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#else
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return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); |
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#endif
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} |
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/*----------------------------------------------------------------------------
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| Returns a quiet NaN if the single-precision floating point value `a' is a
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| signaling NaN; otherwise returns `a'.
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*----------------------------------------------------------------------------*/
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float32 float32_maybe_silence_nan( float32 a_ ) |
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{ |
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if (float32_is_signaling_nan(a_)) {
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#if SNAN_BIT_IS_ONE
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# if defined(TARGET_MIPS) || defined(TARGET_SH4)
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return float32_default_nan;
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# else
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# error Rules for silencing a signaling NaN are target-specific |
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# endif
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#else
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bits32 a = float32_val(a_); |
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a |= (1 << 22); |
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return make_float32(a);
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#endif
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} |
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return a_;
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} |
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/*----------------------------------------------------------------------------
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| Returns the result of converting the single-precision floating-point NaN
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| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
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| exception is raised.
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*----------------------------------------------------------------------------*/
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static commonNaNT float32ToCommonNaN( float32 a STATUS_PARAM )
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{ |
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commonNaNT z; |
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if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR );
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z.sign = float32_val(a)>>31;
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z.low = 0;
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z.high = ( (bits64) float32_val(a) )<<41;
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return z;
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} |
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/*----------------------------------------------------------------------------
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| Returns the result of converting the canonical NaN `a' to the single-
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| precision floating-point format.
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*----------------------------------------------------------------------------*/
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static float32 commonNaNToFloat32( commonNaNT a )
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{ |
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bits32 mantissa = a.high>>41;
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if ( mantissa )
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return make_float32(
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( ( (bits32) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) ); |
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else
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return float32_default_nan;
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} |
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/*----------------------------------------------------------------------------
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| Select which NaN to propagate for a two-input operation.
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| IEEE754 doesn't specify all the details of this, so the
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| algorithm is target-specific.
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| The routine is passed various bits of information about the
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| two NaNs and should return 0 to select NaN a and 1 for NaN b.
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| Note that signalling NaNs are always squashed to quiet NaNs
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| by the caller, by calling floatXX_maybe_silence_nan() before
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| returning them.
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|
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| aIsLargerSignificand is only valid if both a and b are NaNs
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| of some kind, and is true if a has the larger significand,
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| or if both a and b have the same significand but a is
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| positive but b is negative. It is only needed for the x87
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| tie-break rule.
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*----------------------------------------------------------------------------*/
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#if defined(TARGET_ARM)
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static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, |
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flag aIsLargerSignificand) |
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{ |
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/* ARM mandated NaN propagation rules: take the first of:
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* 1. A if it is signaling
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* 2. B if it is signaling
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* 3. A (quiet)
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* 4. B (quiet)
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* A signaling NaN is always quietened before returning it.
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*/
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if (aIsSNaN) {
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return 0; |
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} else if (bIsSNaN) { |
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return 1; |
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} else if (aIsQNaN) { |
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return 0; |
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} else {
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return 1; |
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} |
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} |
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#elif defined(TARGET_MIPS)
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static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, |
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flag aIsLargerSignificand) |
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{ |
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/* According to MIPS specifications, if one of the two operands is
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* a sNaN, a new qNaN has to be generated. This is done in
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* floatXX_maybe_silence_nan(). For qNaN inputs the specifications
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* says: "When possible, this QNaN result is one of the operand QNaN
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* values." In practice it seems that most implementations choose
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* the first operand if both operands are qNaN. In short this gives
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* the following rules:
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* 1. A if it is signaling
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* 2. B if it is signaling
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* 3. A (quiet)
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* 4. B (quiet)
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* A signaling NaN is always silenced before returning it.
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*/
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if (aIsSNaN) {
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return 0; |
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} else if (bIsSNaN) { |
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return 1; |
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} else if (aIsQNaN) { |
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return 0; |
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} else {
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return 1; |
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} |
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} |
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#elif defined(TARGET_PPC)
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static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, |
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flag aIsLargerSignificand) |
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{ |
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/* PowerPC propagation rules:
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* 1. A if it sNaN or qNaN
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* 2. B if it sNaN or qNaN
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* A signaling NaN is always silenced before returning it.
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*/
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if (aIsSNaN || aIsQNaN) {
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return 0; |
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} else {
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return 1; |
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} |
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} |
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#else
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static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, |
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flag aIsLargerSignificand) |
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{ |
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/* This implements x87 NaN propagation rules:
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* SNaN + QNaN => return the QNaN
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* two SNaNs => return the one with the larger significand, silenced
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* two QNaNs => return the one with the larger significand
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* SNaN and a non-NaN => return the SNaN, silenced
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* QNaN and a non-NaN => return the QNaN
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*
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* If we get down to comparing significands and they are the same,
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* return the NaN with the positive sign bit (if any).
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*/
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if (aIsSNaN) {
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if (bIsSNaN) {
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return aIsLargerSignificand ? 0 : 1; |
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} |
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return bIsQNaN ? 1 : 0; |
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} |
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else if (aIsQNaN) { |
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if (bIsSNaN || !bIsQNaN)
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return 0; |
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else {
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return aIsLargerSignificand ? 0 : 1; |
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} |
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} else {
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return 1; |
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} |
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} |
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#endif
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/*----------------------------------------------------------------------------
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| Takes two single-precision floating-point values `a' and `b', one of which
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| is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
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| signaling NaN, the invalid exception is raised.
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*----------------------------------------------------------------------------*/
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static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM)
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{ |
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flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; |
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flag aIsLargerSignificand; |
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bits32 av, bv; |
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aIsQuietNaN = float32_is_quiet_nan( a ); |
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aIsSignalingNaN = float32_is_signaling_nan( a ); |
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bIsQuietNaN = float32_is_quiet_nan( b ); |
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bIsSignalingNaN = float32_is_signaling_nan( b ); |
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av = float32_val(a); |
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bv = float32_val(b); |
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if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
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if ( STATUS(default_nan_mode) )
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return float32_default_nan;
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if ((bits32)(av<<1) < (bits32)(bv<<1)) { |
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aIsLargerSignificand = 0;
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} else if ((bits32)(bv<<1) < (bits32)(av<<1)) { |
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aIsLargerSignificand = 1;
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} else {
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aIsLargerSignificand = (av < bv) ? 1 : 0; |
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} |
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if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
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aIsLargerSignificand)) { |
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return float32_maybe_silence_nan(b);
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} else {
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return float32_maybe_silence_nan(a);
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} |
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} |
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|
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/*----------------------------------------------------------------------------
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| The pattern for a default generated double-precision NaN.
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*----------------------------------------------------------------------------*/
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#if defined(TARGET_SPARC)
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#define float64_default_nan make_float64(LIT64( 0x7FFFFFFFFFFFFFFF )) |
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#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
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#define float64_default_nan make_float64(LIT64( 0x7FF8000000000000 )) |
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#elif SNAN_BIT_IS_ONE
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#define float64_default_nan make_float64(LIT64( 0x7FF7FFFFFFFFFFFF )) |
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#else
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#define float64_default_nan make_float64(LIT64( 0xFFF8000000000000 )) |
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#endif
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/*----------------------------------------------------------------------------
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| Returns 1 if the double-precision floating-point value `a' is a quiet
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| NaN; otherwise returns 0.
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*----------------------------------------------------------------------------*/
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int float64_is_quiet_nan( float64 a_ )
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{ |
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bits64 a = float64_val(a_); |
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#if SNAN_BIT_IS_ONE
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return
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( ( ( a>>51 ) & 0xFFF ) == 0xFFE ) |
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&& ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
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#else
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return ( LIT64( 0xFFF0000000000000 ) <= (bits64) ( a<<1 ) ); |
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#endif
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} |
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|
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/*----------------------------------------------------------------------------
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| Returns 1 if the double-precision floating-point value `a' is a signaling
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| NaN; otherwise returns 0.
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*----------------------------------------------------------------------------*/
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int float64_is_signaling_nan( float64 a_ )
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{ |
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bits64 a = float64_val(a_); |
347 |
#if SNAN_BIT_IS_ONE
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return ( LIT64( 0xFFF0000000000000 ) <= (bits64) ( a<<1 ) ); |
349 |
#else
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return
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( ( ( a>>51 ) & 0xFFF ) == 0xFFE ) |
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&& ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
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#endif
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} |
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|
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/*----------------------------------------------------------------------------
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| Returns a quiet NaN if the double-precision floating point value `a' is a
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| signaling NaN; otherwise returns `a'.
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*----------------------------------------------------------------------------*/
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|
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float64 float64_maybe_silence_nan( float64 a_ ) |
362 |
{ |
363 |
if (float64_is_signaling_nan(a_)) {
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#if SNAN_BIT_IS_ONE
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365 |
# if defined(TARGET_MIPS) || defined(TARGET_SH4)
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return float64_default_nan;
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367 |
# else
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368 |
# error Rules for silencing a signaling NaN are target-specific |
369 |
# endif
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370 |
#else
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bits64 a = float64_val(a_); |
372 |
a |= LIT64( 0x0008000000000000 );
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return make_float64(a);
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#endif
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375 |
} |
376 |
return a_;
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377 |
} |
378 |
|
379 |
/*----------------------------------------------------------------------------
|
380 |
| Returns the result of converting the double-precision floating-point NaN
|
381 |
| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
|
382 |
| exception is raised.
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383 |
*----------------------------------------------------------------------------*/
|
384 |
|
385 |
static commonNaNT float64ToCommonNaN( float64 a STATUS_PARAM)
|
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{ |
387 |
commonNaNT z; |
388 |
|
389 |
if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
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z.sign = float64_val(a)>>63;
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z.low = 0;
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392 |
z.high = float64_val(a)<<12;
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return z;
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394 |
} |
395 |
|
396 |
/*----------------------------------------------------------------------------
|
397 |
| Returns the result of converting the canonical NaN `a' to the double-
|
398 |
| precision floating-point format.
|
399 |
*----------------------------------------------------------------------------*/
|
400 |
|
401 |
static float64 commonNaNToFloat64( commonNaNT a )
|
402 |
{ |
403 |
bits64 mantissa = a.high>>12;
|
404 |
|
405 |
if ( mantissa )
|
406 |
return make_float64(
|
407 |
( ( (bits64) a.sign )<<63 )
|
408 |
| LIT64( 0x7FF0000000000000 )
|
409 |
| ( a.high>>12 ));
|
410 |
else
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411 |
return float64_default_nan;
|
412 |
} |
413 |
|
414 |
/*----------------------------------------------------------------------------
|
415 |
| Takes two double-precision floating-point values `a' and `b', one of which
|
416 |
| is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
|
417 |
| signaling NaN, the invalid exception is raised.
|
418 |
*----------------------------------------------------------------------------*/
|
419 |
|
420 |
static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM)
|
421 |
{ |
422 |
flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; |
423 |
flag aIsLargerSignificand; |
424 |
bits64 av, bv; |
425 |
|
426 |
aIsQuietNaN = float64_is_quiet_nan( a ); |
427 |
aIsSignalingNaN = float64_is_signaling_nan( a ); |
428 |
bIsQuietNaN = float64_is_quiet_nan( b ); |
429 |
bIsSignalingNaN = float64_is_signaling_nan( b ); |
430 |
av = float64_val(a); |
431 |
bv = float64_val(b); |
432 |
|
433 |
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
|
434 |
|
435 |
if ( STATUS(default_nan_mode) )
|
436 |
return float64_default_nan;
|
437 |
|
438 |
if ((bits64)(av<<1) < (bits64)(bv<<1)) { |
439 |
aIsLargerSignificand = 0;
|
440 |
} else if ((bits64)(bv<<1) < (bits64)(av<<1)) { |
441 |
aIsLargerSignificand = 1;
|
442 |
} else {
|
443 |
aIsLargerSignificand = (av < bv) ? 1 : 0; |
444 |
} |
445 |
|
446 |
if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
|
447 |
aIsLargerSignificand)) { |
448 |
return float64_maybe_silence_nan(b);
|
449 |
} else {
|
450 |
return float64_maybe_silence_nan(a);
|
451 |
} |
452 |
} |
453 |
|
454 |
#ifdef FLOATX80
|
455 |
|
456 |
/*----------------------------------------------------------------------------
|
457 |
| The pattern for a default generated extended double-precision NaN. The
|
458 |
| `high' and `low' values hold the most- and least-significant bits,
|
459 |
| respectively.
|
460 |
*----------------------------------------------------------------------------*/
|
461 |
#if SNAN_BIT_IS_ONE
|
462 |
#define floatx80_default_nan_high 0x7FFF |
463 |
#define floatx80_default_nan_low LIT64( 0xBFFFFFFFFFFFFFFF ) |
464 |
#else
|
465 |
#define floatx80_default_nan_high 0xFFFF |
466 |
#define floatx80_default_nan_low LIT64( 0xC000000000000000 ) |
467 |
#endif
|
468 |
|
469 |
/*----------------------------------------------------------------------------
|
470 |
| Returns 1 if the extended double-precision floating-point value `a' is a
|
471 |
| quiet NaN; otherwise returns 0. This slightly differs from the same
|
472 |
| function for other types as floatx80 has an explicit bit.
|
473 |
*----------------------------------------------------------------------------*/
|
474 |
|
475 |
int floatx80_is_quiet_nan( floatx80 a )
|
476 |
{ |
477 |
#if SNAN_BIT_IS_ONE
|
478 |
bits64 aLow; |
479 |
|
480 |
aLow = a.low & ~ LIT64( 0x4000000000000000 );
|
481 |
return
|
482 |
( ( a.high & 0x7FFF ) == 0x7FFF ) |
483 |
&& (bits64) ( aLow<<1 )
|
484 |
&& ( a.low == aLow ); |
485 |
#else
|
486 |
return ( ( a.high & 0x7FFF ) == 0x7FFF ) |
487 |
&& (LIT64( 0x8000000000000000 ) <= ((bits64) ( a.low<<1 ))); |
488 |
#endif
|
489 |
} |
490 |
|
491 |
/*----------------------------------------------------------------------------
|
492 |
| Returns 1 if the extended double-precision floating-point value `a' is a
|
493 |
| signaling NaN; otherwise returns 0. This slightly differs from the same
|
494 |
| function for other types as floatx80 has an explicit bit.
|
495 |
*----------------------------------------------------------------------------*/
|
496 |
|
497 |
int floatx80_is_signaling_nan( floatx80 a )
|
498 |
{ |
499 |
#if SNAN_BIT_IS_ONE
|
500 |
return ( ( a.high & 0x7FFF ) == 0x7FFF ) |
501 |
&& (LIT64( 0x8000000000000000 ) <= ((bits64) ( a.low<<1 ))); |
502 |
#else
|
503 |
bits64 aLow; |
504 |
|
505 |
aLow = a.low & ~ LIT64( 0x4000000000000000 );
|
506 |
return
|
507 |
( ( a.high & 0x7FFF ) == 0x7FFF ) |
508 |
&& (bits64) ( aLow<<1 )
|
509 |
&& ( a.low == aLow ); |
510 |
#endif
|
511 |
} |
512 |
|
513 |
/*----------------------------------------------------------------------------
|
514 |
| Returns a quiet NaN if the extended double-precision floating point value
|
515 |
| `a' is a signaling NaN; otherwise returns `a'.
|
516 |
*----------------------------------------------------------------------------*/
|
517 |
|
518 |
floatx80 floatx80_maybe_silence_nan( floatx80 a ) |
519 |
{ |
520 |
if (floatx80_is_signaling_nan(a)) {
|
521 |
#if SNAN_BIT_IS_ONE
|
522 |
# if defined(TARGET_MIPS) || defined(TARGET_SH4)
|
523 |
a.low = floatx80_default_nan_low; |
524 |
a.high = floatx80_default_nan_high; |
525 |
# else
|
526 |
# error Rules for silencing a signaling NaN are target-specific |
527 |
# endif
|
528 |
#else
|
529 |
a.low |= LIT64( 0xC000000000000000 );
|
530 |
return a;
|
531 |
#endif
|
532 |
} |
533 |
return a;
|
534 |
} |
535 |
|
536 |
/*----------------------------------------------------------------------------
|
537 |
| Returns the result of converting the extended double-precision floating-
|
538 |
| point NaN `a' to the canonical NaN format. If `a' is a signaling NaN, the
|
539 |
| invalid exception is raised.
|
540 |
*----------------------------------------------------------------------------*/
|
541 |
|
542 |
static commonNaNT floatx80ToCommonNaN( floatx80 a STATUS_PARAM)
|
543 |
{ |
544 |
commonNaNT z; |
545 |
|
546 |
if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
|
547 |
z.sign = a.high>>15;
|
548 |
z.low = 0;
|
549 |
z.high = a.low; |
550 |
return z;
|
551 |
} |
552 |
|
553 |
/*----------------------------------------------------------------------------
|
554 |
| Returns the result of converting the canonical NaN `a' to the extended
|
555 |
| double-precision floating-point format.
|
556 |
*----------------------------------------------------------------------------*/
|
557 |
|
558 |
static floatx80 commonNaNToFloatx80( commonNaNT a )
|
559 |
{ |
560 |
floatx80 z; |
561 |
|
562 |
if (a.high)
|
563 |
z.low = a.high; |
564 |
else
|
565 |
z.low = floatx80_default_nan_low; |
566 |
z.high = ( ( (bits16) a.sign )<<15 ) | 0x7FFF; |
567 |
return z;
|
568 |
} |
569 |
|
570 |
/*----------------------------------------------------------------------------
|
571 |
| Takes two extended double-precision floating-point values `a' and `b', one
|
572 |
| of which is a NaN, and returns the appropriate NaN result. If either `a' or
|
573 |
| `b' is a signaling NaN, the invalid exception is raised.
|
574 |
*----------------------------------------------------------------------------*/
|
575 |
|
576 |
static floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b STATUS_PARAM)
|
577 |
{ |
578 |
flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; |
579 |
flag aIsLargerSignificand; |
580 |
|
581 |
aIsQuietNaN = floatx80_is_quiet_nan( a ); |
582 |
aIsSignalingNaN = floatx80_is_signaling_nan( a ); |
583 |
bIsQuietNaN = floatx80_is_quiet_nan( b ); |
584 |
bIsSignalingNaN = floatx80_is_signaling_nan( b ); |
585 |
|
586 |
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
|
587 |
|
588 |
if ( STATUS(default_nan_mode) ) {
|
589 |
a.low = floatx80_default_nan_low; |
590 |
a.high = floatx80_default_nan_high; |
591 |
return a;
|
592 |
} |
593 |
|
594 |
if (a.low < b.low) {
|
595 |
aIsLargerSignificand = 0;
|
596 |
} else if (b.low < a.low) { |
597 |
aIsLargerSignificand = 1;
|
598 |
} else {
|
599 |
aIsLargerSignificand = (a.high < b.high) ? 1 : 0; |
600 |
} |
601 |
|
602 |
if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
|
603 |
aIsLargerSignificand)) { |
604 |
return floatx80_maybe_silence_nan(b);
|
605 |
} else {
|
606 |
return floatx80_maybe_silence_nan(a);
|
607 |
} |
608 |
} |
609 |
|
610 |
#endif
|
611 |
|
612 |
#ifdef FLOAT128
|
613 |
|
614 |
/*----------------------------------------------------------------------------
|
615 |
| The pattern for a default generated quadruple-precision NaN. The `high' and
|
616 |
| `low' values hold the most- and least-significant bits, respectively.
|
617 |
*----------------------------------------------------------------------------*/
|
618 |
#if SNAN_BIT_IS_ONE
|
619 |
#define float128_default_nan_high LIT64( 0x7FFF7FFFFFFFFFFF ) |
620 |
#define float128_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF ) |
621 |
#else
|
622 |
#define float128_default_nan_high LIT64( 0xFFFF800000000000 ) |
623 |
#define float128_default_nan_low LIT64( 0x0000000000000000 ) |
624 |
#endif
|
625 |
|
626 |
/*----------------------------------------------------------------------------
|
627 |
| Returns 1 if the quadruple-precision floating-point value `a' is a quiet
|
628 |
| NaN; otherwise returns 0.
|
629 |
*----------------------------------------------------------------------------*/
|
630 |
|
631 |
int float128_is_quiet_nan( float128 a )
|
632 |
{ |
633 |
#if SNAN_BIT_IS_ONE
|
634 |
return
|
635 |
( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE ) |
636 |
&& ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
|
637 |
#else
|
638 |
return
|
639 |
( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) ) |
640 |
&& ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
|
641 |
#endif
|
642 |
} |
643 |
|
644 |
/*----------------------------------------------------------------------------
|
645 |
| Returns 1 if the quadruple-precision floating-point value `a' is a
|
646 |
| signaling NaN; otherwise returns 0.
|
647 |
*----------------------------------------------------------------------------*/
|
648 |
|
649 |
int float128_is_signaling_nan( float128 a )
|
650 |
{ |
651 |
#if SNAN_BIT_IS_ONE
|
652 |
return
|
653 |
( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) ) |
654 |
&& ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
|
655 |
#else
|
656 |
return
|
657 |
( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE ) |
658 |
&& ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
|
659 |
#endif
|
660 |
} |
661 |
|
662 |
/*----------------------------------------------------------------------------
|
663 |
| Returns a quiet NaN if the quadruple-precision floating point value `a' is
|
664 |
| a signaling NaN; otherwise returns `a'.
|
665 |
*----------------------------------------------------------------------------*/
|
666 |
|
667 |
float128 float128_maybe_silence_nan( float128 a ) |
668 |
{ |
669 |
if (float128_is_signaling_nan(a)) {
|
670 |
#if SNAN_BIT_IS_ONE
|
671 |
# if defined(TARGET_MIPS) || defined(TARGET_SH4)
|
672 |
a.low = float128_default_nan_low; |
673 |
a.high = float128_default_nan_high; |
674 |
# else
|
675 |
# error Rules for silencing a signaling NaN are target-specific |
676 |
# endif
|
677 |
#else
|
678 |
a.high |= LIT64( 0x0000800000000000 );
|
679 |
return a;
|
680 |
#endif
|
681 |
} |
682 |
return a;
|
683 |
} |
684 |
|
685 |
/*----------------------------------------------------------------------------
|
686 |
| Returns the result of converting the quadruple-precision floating-point NaN
|
687 |
| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
|
688 |
| exception is raised.
|
689 |
*----------------------------------------------------------------------------*/
|
690 |
|
691 |
static commonNaNT float128ToCommonNaN( float128 a STATUS_PARAM)
|
692 |
{ |
693 |
commonNaNT z; |
694 |
|
695 |
if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
|
696 |
z.sign = a.high>>63;
|
697 |
shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
|
698 |
return z;
|
699 |
} |
700 |
|
701 |
/*----------------------------------------------------------------------------
|
702 |
| Returns the result of converting the canonical NaN `a' to the quadruple-
|
703 |
| precision floating-point format.
|
704 |
*----------------------------------------------------------------------------*/
|
705 |
|
706 |
static float128 commonNaNToFloat128( commonNaNT a )
|
707 |
{ |
708 |
float128 z; |
709 |
|
710 |
shift128Right( a.high, a.low, 16, &z.high, &z.low );
|
711 |
z.high |= ( ( (bits64) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 ); |
712 |
return z;
|
713 |
} |
714 |
|
715 |
/*----------------------------------------------------------------------------
|
716 |
| Takes two quadruple-precision floating-point values `a' and `b', one of
|
717 |
| which is a NaN, and returns the appropriate NaN result. If either `a' or
|
718 |
| `b' is a signaling NaN, the invalid exception is raised.
|
719 |
*----------------------------------------------------------------------------*/
|
720 |
|
721 |
static float128 propagateFloat128NaN( float128 a, float128 b STATUS_PARAM)
|
722 |
{ |
723 |
flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; |
724 |
flag aIsLargerSignificand; |
725 |
|
726 |
aIsQuietNaN = float128_is_quiet_nan( a ); |
727 |
aIsSignalingNaN = float128_is_signaling_nan( a ); |
728 |
bIsQuietNaN = float128_is_quiet_nan( b ); |
729 |
bIsSignalingNaN = float128_is_signaling_nan( b ); |
730 |
|
731 |
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
|
732 |
|
733 |
if ( STATUS(default_nan_mode) ) {
|
734 |
a.low = float128_default_nan_low; |
735 |
a.high = float128_default_nan_high; |
736 |
return a;
|
737 |
} |
738 |
|
739 |
if (lt128(a.high<<1, a.low, b.high<<1, b.low)) { |
740 |
aIsLargerSignificand = 0;
|
741 |
} else if (lt128(b.high<<1, b.low, a.high<<1, a.low)) { |
742 |
aIsLargerSignificand = 1;
|
743 |
} else {
|
744 |
aIsLargerSignificand = (a.high < b.high) ? 1 : 0; |
745 |
} |
746 |
|
747 |
if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
|
748 |
aIsLargerSignificand)) { |
749 |
return float128_maybe_silence_nan(b);
|
750 |
} else {
|
751 |
return float128_maybe_silence_nan(a);
|
752 |
} |
753 |
} |
754 |
|
755 |
#endif
|