Revision dea21e97
| b/hw/ide.h | ||
|---|---|---|
| 4 | 4 |
#include "qdev.h" |
| 5 | 5 |
|
| 6 | 6 |
/* ide-isa.c */ |
| 7 |
void isa_ide_init(int iobase, int iobase2, qemu_irq irq,
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DriveInfo *hd0, DriveInfo *hd1);
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int isa_ide_init(int iobase, int iobase2, int isairq,
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DriveInfo *hd0, DriveInfo *hd1); |
|
| 9 | 9 |
|
| 10 | 10 |
/* ide-pci.c */ |
| 11 | 11 |
void pci_cmd646_ide_init(PCIBus *bus, DriveInfo **hd_table, |
| b/hw/ide/isa.c | ||
|---|---|---|
| 24 | 24 |
*/ |
| 25 | 25 |
#include <hw/hw.h> |
| 26 | 26 |
#include <hw/pc.h> |
| 27 |
#include <hw/isa.h> |
|
| 27 | 28 |
#include "block.h" |
| 28 | 29 |
#include "block_int.h" |
| 29 | 30 |
#include "sysemu.h" |
| ... | ... | |
| 35 | 36 |
/* ISA IDE definitions */ |
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|
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typedef struct ISAIDEState {
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IDEBus *bus; |
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ISADevice dev; |
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IDEBus *bus; |
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uint32_t iobase; |
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uint32_t iobase2; |
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uint32_t isairq; |
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qemu_irq irq; |
|
| 39 | 45 |
} ISAIDEState; |
| 40 | 46 |
|
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static void isa_ide_save(QEMUFile* f, void *opaque) |
| ... | ... | |
| 57 | 63 |
return 0; |
| 58 | 64 |
} |
| 59 | 65 |
|
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void isa_ide_init(int iobase, int iobase2, qemu_irq irq, |
|
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DriveInfo *hd0, DriveInfo *hd1) |
|
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static int isa_ide_initfn(ISADevice *dev) |
|
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{
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ISAIDEState *s = DO_UPCAST(ISAIDEState, dev, dev); |
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s->bus = ide_bus_new(&s->dev.qdev); |
|
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ide_init_ioport(s->bus, s->iobase, s->iobase2); |
|
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isa_init_irq(dev, &s->irq, s->isairq); |
|
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ide_init2(s->bus, NULL, NULL, s->irq); |
|
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register_savevm("isa-ide", 0, 3, isa_ide_save, isa_ide_load, s);
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return 0; |
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}; |
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|
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int isa_ide_init(int iobase, int iobase2, int isairq, |
|
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DriveInfo *hd0, DriveInfo *hd1) |
|
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{
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ISADevice *dev; |
|
| 63 | 82 |
ISAIDEState *s; |
| 64 | 83 |
|
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s = qemu_mallocz(sizeof(*s)); |
|
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s->bus = qemu_mallocz(sizeof(IDEBus)); |
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dev = isa_create("isa-ide");
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qdev_prop_set_uint32(&dev->qdev, "iobase", iobase); |
|
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qdev_prop_set_uint32(&dev->qdev, "iobase2", iobase2); |
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qdev_prop_set_uint32(&dev->qdev, "irq", isairq); |
|
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if (qdev_init(&dev->qdev) != 0) |
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return -1; |
|
| 67 | 90 |
|
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ide_init2(s->bus, hd0, hd1, irq); |
|
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ide_init_ioport(s->bus, iobase, iobase2); |
|
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register_savevm("isa-ide", 0, 3, isa_ide_save, isa_ide_load, s);
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s = DO_UPCAST(ISAIDEState, dev, dev); |
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if (hd0) |
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ide_create_drive(s->bus, 0, hd0); |
|
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if (hd1) |
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ide_create_drive(s->bus, 1, hd1); |
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return 0; |
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} |
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|
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static ISADeviceInfo isa_ide_info = {
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.qdev.name = "isa-ide", |
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.qdev.size = sizeof(ISAIDEState), |
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.init = isa_ide_initfn, |
|
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.qdev.props = (Property[]) {
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DEFINE_PROP_HEX32("iobase", ISAIDEState, iobase, 0x1f0),
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DEFINE_PROP_HEX32("iobase2", ISAIDEState, iobase2, 0x3f6),
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DEFINE_PROP_UINT32("irq", ISAIDEState, isairq, 14),
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DEFINE_PROP_END_OF_LIST(), |
|
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}, |
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}; |
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|
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static void isa_ide_register_devices(void) |
|
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{
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isa_qdev_register(&isa_ide_info); |
|
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} |
| 115 |
|
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device_init(isa_ide_register_devices) |
|
| b/hw/mips_r4k.c | ||
|---|---|---|
| 274 | 274 |
} |
| 275 | 275 |
|
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for(i = 0; i < MAX_IDE_BUS; i++) |
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isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
|
|
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isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
|
|
| 278 | 278 |
hd[MAX_IDE_DEVS * i], |
| 279 | 279 |
hd[MAX_IDE_DEVS * i + 1]); |
| 280 | 280 |
|
| b/hw/pc.c | ||
|---|---|---|
| 1366 | 1366 |
pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1); |
| 1367 | 1367 |
} else {
|
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for(i = 0; i < MAX_IDE_BUS; i++) {
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isa_ide_init(ide_iobase[i], ide_iobase2[i], |
|
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isa_reserve_irq(ide_irq[i]), |
|
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isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i], |
|
| 1371 | 1370 |
hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); |
| 1372 | 1371 |
} |
| 1373 | 1372 |
} |
| b/hw/ppc_prep.c | ||
|---|---|---|
| 710 | 710 |
} |
| 711 | 711 |
|
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for(i = 0; i < MAX_IDE_BUS; i++) {
|
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isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
|
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isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
|
|
| 714 | 714 |
hd[2 * i], |
| 715 | 715 |
hd[2 * i + 1]); |
| 716 | 716 |
} |
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