root / hw / usb-uhci.c @ df182043
History | View | Annotate | Download (33.3 kB)
1 | bb36d470 | bellard | /*
|
---|---|---|---|
2 | bb36d470 | bellard | * USB UHCI controller emulation
|
3 | 5fafdf24 | ths | *
|
4 | bb36d470 | bellard | * Copyright (c) 2005 Fabrice Bellard
|
5 | 5fafdf24 | ths | *
|
6 | 54f254f9 | aliguori | * Copyright (c) 2008 Max Krasnyansky
|
7 | 54f254f9 | aliguori | * Magor rewrite of the UHCI data structures parser and frame processor
|
8 | 54f254f9 | aliguori | * Support for fully async operation and multiple outstanding transactions
|
9 | 54f254f9 | aliguori | *
|
10 | bb36d470 | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
|
11 | bb36d470 | bellard | * of this software and associated documentation files (the "Software"), to deal
|
12 | bb36d470 | bellard | * in the Software without restriction, including without limitation the rights
|
13 | bb36d470 | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
14 | bb36d470 | bellard | * copies of the Software, and to permit persons to whom the Software is
|
15 | bb36d470 | bellard | * furnished to do so, subject to the following conditions:
|
16 | bb36d470 | bellard | *
|
17 | bb36d470 | bellard | * The above copyright notice and this permission notice shall be included in
|
18 | bb36d470 | bellard | * all copies or substantial portions of the Software.
|
19 | bb36d470 | bellard | *
|
20 | bb36d470 | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
21 | bb36d470 | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
22 | bb36d470 | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
23 | bb36d470 | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
24 | bb36d470 | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
25 | bb36d470 | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
26 | bb36d470 | bellard | * THE SOFTWARE.
|
27 | bb36d470 | bellard | */
|
28 | 87ecb68b | pbrook | #include "hw.h" |
29 | 87ecb68b | pbrook | #include "usb.h" |
30 | 87ecb68b | pbrook | #include "pci.h" |
31 | 87ecb68b | pbrook | #include "qemu-timer.h" |
32 | 18e08a55 | Michael S. Tsirkin | #include "usb-uhci.h" |
33 | 4f4321c1 | Gerd Hoffmann | #include "iov.h" |
34 | df5e66ee | Gerd Hoffmann | #include "dma.h" |
35 | bb36d470 | bellard | |
36 | bb36d470 | bellard | //#define DEBUG
|
37 | 54f254f9 | aliguori | //#define DEBUG_DUMP_DATA
|
38 | bb36d470 | bellard | |
39 | 96217e31 | ths | #define UHCI_CMD_FGR (1 << 4) |
40 | 96217e31 | ths | #define UHCI_CMD_EGSM (1 << 3) |
41 | bb36d470 | bellard | #define UHCI_CMD_GRESET (1 << 2) |
42 | bb36d470 | bellard | #define UHCI_CMD_HCRESET (1 << 1) |
43 | bb36d470 | bellard | #define UHCI_CMD_RS (1 << 0) |
44 | bb36d470 | bellard | |
45 | bb36d470 | bellard | #define UHCI_STS_HCHALTED (1 << 5) |
46 | bb36d470 | bellard | #define UHCI_STS_HCPERR (1 << 4) |
47 | bb36d470 | bellard | #define UHCI_STS_HSERR (1 << 3) |
48 | bb36d470 | bellard | #define UHCI_STS_RD (1 << 2) |
49 | bb36d470 | bellard | #define UHCI_STS_USBERR (1 << 1) |
50 | bb36d470 | bellard | #define UHCI_STS_USBINT (1 << 0) |
51 | bb36d470 | bellard | |
52 | bb36d470 | bellard | #define TD_CTRL_SPD (1 << 29) |
53 | bb36d470 | bellard | #define TD_CTRL_ERROR_SHIFT 27 |
54 | bb36d470 | bellard | #define TD_CTRL_IOS (1 << 25) |
55 | bb36d470 | bellard | #define TD_CTRL_IOC (1 << 24) |
56 | bb36d470 | bellard | #define TD_CTRL_ACTIVE (1 << 23) |
57 | bb36d470 | bellard | #define TD_CTRL_STALL (1 << 22) |
58 | bb36d470 | bellard | #define TD_CTRL_BABBLE (1 << 20) |
59 | bb36d470 | bellard | #define TD_CTRL_NAK (1 << 19) |
60 | bb36d470 | bellard | #define TD_CTRL_TIMEOUT (1 << 18) |
61 | bb36d470 | bellard | |
62 | 9159f679 | Gerd Hoffmann | #define UHCI_PORT_SUSPEND (1 << 12) |
63 | bb36d470 | bellard | #define UHCI_PORT_RESET (1 << 9) |
64 | bb36d470 | bellard | #define UHCI_PORT_LSDA (1 << 8) |
65 | 9159f679 | Gerd Hoffmann | #define UHCI_PORT_RD (1 << 6) |
66 | bb36d470 | bellard | #define UHCI_PORT_ENC (1 << 3) |
67 | bb36d470 | bellard | #define UHCI_PORT_EN (1 << 2) |
68 | bb36d470 | bellard | #define UHCI_PORT_CSC (1 << 1) |
69 | bb36d470 | bellard | #define UHCI_PORT_CCS (1 << 0) |
70 | bb36d470 | bellard | |
71 | 9159f679 | Gerd Hoffmann | #define UHCI_PORT_READ_ONLY (0x1bb) |
72 | 9159f679 | Gerd Hoffmann | #define UHCI_PORT_WRITE_CLEAR (UHCI_PORT_CSC | UHCI_PORT_ENC)
|
73 | 9159f679 | Gerd Hoffmann | |
74 | bb36d470 | bellard | #define FRAME_TIMER_FREQ 1000 |
75 | bb36d470 | bellard | |
76 | bb36d470 | bellard | #define FRAME_MAX_LOOPS 100 |
77 | bb36d470 | bellard | |
78 | bb36d470 | bellard | #define NB_PORTS 2 |
79 | bb36d470 | bellard | |
80 | 54f254f9 | aliguori | #ifdef DEBUG
|
81 | d0f2c4c6 | malc | #define DPRINTF printf
|
82 | 54f254f9 | aliguori | |
83 | 0bf9e31a | Blue Swirl | static const char *pid2str(int pid) |
84 | 54f254f9 | aliguori | { |
85 | 54f254f9 | aliguori | switch (pid) {
|
86 | 54f254f9 | aliguori | case USB_TOKEN_SETUP: return "SETUP"; |
87 | 54f254f9 | aliguori | case USB_TOKEN_IN: return "IN"; |
88 | 54f254f9 | aliguori | case USB_TOKEN_OUT: return "OUT"; |
89 | 54f254f9 | aliguori | } |
90 | 54f254f9 | aliguori | return "?"; |
91 | 54f254f9 | aliguori | } |
92 | 54f254f9 | aliguori | |
93 | 54f254f9 | aliguori | #else
|
94 | d0f2c4c6 | malc | #define DPRINTF(...)
|
95 | 54f254f9 | aliguori | #endif
|
96 | 54f254f9 | aliguori | |
97 | 54f254f9 | aliguori | #ifdef DEBUG_DUMP_DATA
|
98 | 4f4321c1 | Gerd Hoffmann | static void dump_data(USBPacket *p, int ret) |
99 | 54f254f9 | aliguori | { |
100 | 4f4321c1 | Gerd Hoffmann | iov_hexdump(p->iov.iov, p->iov.niov, stderr, "uhci", ret);
|
101 | 54f254f9 | aliguori | } |
102 | 54f254f9 | aliguori | #else
|
103 | 4f4321c1 | Gerd Hoffmann | static void dump_data(USBPacket *p, int ret) {} |
104 | 54f254f9 | aliguori | #endif
|
105 | 54f254f9 | aliguori | |
106 | 7b5a44c5 | Gerd Hoffmann | typedef struct UHCIState UHCIState; |
107 | 7b5a44c5 | Gerd Hoffmann | |
108 | 54f254f9 | aliguori | /*
|
109 | 54f254f9 | aliguori | * Pending async transaction.
|
110 | 54f254f9 | aliguori | * 'packet' must be the first field because completion
|
111 | 54f254f9 | aliguori | * handler does "(UHCIAsync *) pkt" cast.
|
112 | 54f254f9 | aliguori | */
|
113 | 54f254f9 | aliguori | typedef struct UHCIAsync { |
114 | 54f254f9 | aliguori | USBPacket packet; |
115 | df5e66ee | Gerd Hoffmann | QEMUSGList sgl; |
116 | 7b5a44c5 | Gerd Hoffmann | UHCIState *uhci; |
117 | ddf6583f | Gerd Hoffmann | QTAILQ_ENTRY(UHCIAsync) next; |
118 | 54f254f9 | aliguori | uint32_t td; |
119 | 54f254f9 | aliguori | uint32_t token; |
120 | 54f254f9 | aliguori | int8_t valid; |
121 | 8e65b7c0 | David S. Ahern | uint8_t isoc; |
122 | 54f254f9 | aliguori | uint8_t done; |
123 | 54f254f9 | aliguori | } UHCIAsync; |
124 | 54f254f9 | aliguori | |
125 | bb36d470 | bellard | typedef struct UHCIPort { |
126 | bb36d470 | bellard | USBPort port; |
127 | bb36d470 | bellard | uint16_t ctrl; |
128 | bb36d470 | bellard | } UHCIPort; |
129 | bb36d470 | bellard | |
130 | 7b5a44c5 | Gerd Hoffmann | struct UHCIState {
|
131 | bb36d470 | bellard | PCIDevice dev; |
132 | a03f66e4 | Avi Kivity | MemoryRegion io_bar; |
133 | 35e4977f | Hans de Goede | USBBus bus; /* Note unused when we're a companion controller */
|
134 | bb36d470 | bellard | uint16_t cmd; /* cmd register */
|
135 | bb36d470 | bellard | uint16_t status; |
136 | bb36d470 | bellard | uint16_t intr; /* interrupt enable register */
|
137 | bb36d470 | bellard | uint16_t frnum; /* frame number */
|
138 | bb36d470 | bellard | uint32_t fl_base_addr; /* frame list base address */
|
139 | bb36d470 | bellard | uint8_t sof_timing; |
140 | bb36d470 | bellard | uint8_t status2; /* bit 0 and 1 are used to generate UHCI_STS_USBINT */
|
141 | 8e65b7c0 | David S. Ahern | int64_t expire_time; |
142 | bb36d470 | bellard | QEMUTimer *frame_timer; |
143 | bb36d470 | bellard | UHCIPort ports[NB_PORTS]; |
144 | 4d611c9a | pbrook | |
145 | 4d611c9a | pbrook | /* Interrupts that should be raised at the end of the current frame. */
|
146 | 4d611c9a | pbrook | uint32_t pending_int_mask; |
147 | 54f254f9 | aliguori | |
148 | 54f254f9 | aliguori | /* Active packets */
|
149 | ddf6583f | Gerd Hoffmann | QTAILQ_HEAD(,UHCIAsync) async_pending; |
150 | 64e58fe5 | Juan Quintela | uint8_t num_ports_vmstate; |
151 | 35e4977f | Hans de Goede | |
152 | 35e4977f | Hans de Goede | /* Properties */
|
153 | 35e4977f | Hans de Goede | char *masterbus;
|
154 | 35e4977f | Hans de Goede | uint32_t firstport; |
155 | 7b5a44c5 | Gerd Hoffmann | }; |
156 | bb36d470 | bellard | |
157 | bb36d470 | bellard | typedef struct UHCI_TD { |
158 | bb36d470 | bellard | uint32_t link; |
159 | bb36d470 | bellard | uint32_t ctrl; /* see TD_CTRL_xxx */
|
160 | bb36d470 | bellard | uint32_t token; |
161 | bb36d470 | bellard | uint32_t buffer; |
162 | bb36d470 | bellard | } UHCI_TD; |
163 | bb36d470 | bellard | |
164 | bb36d470 | bellard | typedef struct UHCI_QH { |
165 | bb36d470 | bellard | uint32_t link; |
166 | bb36d470 | bellard | uint32_t el_link; |
167 | bb36d470 | bellard | } UHCI_QH; |
168 | bb36d470 | bellard | |
169 | 54f254f9 | aliguori | static UHCIAsync *uhci_async_alloc(UHCIState *s)
|
170 | 54f254f9 | aliguori | { |
171 | 7267c094 | Anthony Liguori | UHCIAsync *async = g_malloc(sizeof(UHCIAsync));
|
172 | 487414f1 | aliguori | |
173 | 487414f1 | aliguori | memset(&async->packet, 0, sizeof(async->packet)); |
174 | 7b5a44c5 | Gerd Hoffmann | async->uhci = s; |
175 | 487414f1 | aliguori | async->valid = 0;
|
176 | 487414f1 | aliguori | async->td = 0;
|
177 | 487414f1 | aliguori | async->token = 0;
|
178 | 487414f1 | aliguori | async->done = 0;
|
179 | 8e65b7c0 | David S. Ahern | async->isoc = 0;
|
180 | 4f4321c1 | Gerd Hoffmann | usb_packet_init(&async->packet); |
181 | fff23ee9 | David Gibson | pci_dma_sglist_init(&async->sgl, &s->dev, 1);
|
182 | 54f254f9 | aliguori | |
183 | 54f254f9 | aliguori | return async;
|
184 | 54f254f9 | aliguori | } |
185 | 54f254f9 | aliguori | |
186 | 54f254f9 | aliguori | static void uhci_async_free(UHCIState *s, UHCIAsync *async) |
187 | 54f254f9 | aliguori | { |
188 | 4f4321c1 | Gerd Hoffmann | usb_packet_cleanup(&async->packet); |
189 | df5e66ee | Gerd Hoffmann | qemu_sglist_destroy(&async->sgl); |
190 | 7267c094 | Anthony Liguori | g_free(async); |
191 | 54f254f9 | aliguori | } |
192 | 54f254f9 | aliguori | |
193 | 54f254f9 | aliguori | static void uhci_async_link(UHCIState *s, UHCIAsync *async) |
194 | 54f254f9 | aliguori | { |
195 | ddf6583f | Gerd Hoffmann | QTAILQ_INSERT_HEAD(&s->async_pending, async, next); |
196 | 54f254f9 | aliguori | } |
197 | 54f254f9 | aliguori | |
198 | 54f254f9 | aliguori | static void uhci_async_unlink(UHCIState *s, UHCIAsync *async) |
199 | 54f254f9 | aliguori | { |
200 | ddf6583f | Gerd Hoffmann | QTAILQ_REMOVE(&s->async_pending, async, next); |
201 | 54f254f9 | aliguori | } |
202 | 54f254f9 | aliguori | |
203 | 54f254f9 | aliguori | static void uhci_async_cancel(UHCIState *s, UHCIAsync *async) |
204 | 54f254f9 | aliguori | { |
205 | d0f2c4c6 | malc | DPRINTF("uhci: cancel td 0x%x token 0x%x done %u\n",
|
206 | 54f254f9 | aliguori | async->td, async->token, async->done); |
207 | 54f254f9 | aliguori | |
208 | 54f254f9 | aliguori | if (!async->done)
|
209 | 54f254f9 | aliguori | usb_cancel_packet(&async->packet); |
210 | 54f254f9 | aliguori | uhci_async_free(s, async); |
211 | 54f254f9 | aliguori | } |
212 | 54f254f9 | aliguori | |
213 | 54f254f9 | aliguori | /*
|
214 | 54f254f9 | aliguori | * Mark all outstanding async packets as invalid.
|
215 | 54f254f9 | aliguori | * This is used for canceling them when TDs are removed by the HCD.
|
216 | 54f254f9 | aliguori | */
|
217 | 54f254f9 | aliguori | static UHCIAsync *uhci_async_validate_begin(UHCIState *s)
|
218 | 54f254f9 | aliguori | { |
219 | ddf6583f | Gerd Hoffmann | UHCIAsync *async; |
220 | 54f254f9 | aliguori | |
221 | ddf6583f | Gerd Hoffmann | QTAILQ_FOREACH(async, &s->async_pending, next) { |
222 | 54f254f9 | aliguori | async->valid--; |
223 | 54f254f9 | aliguori | } |
224 | 54f254f9 | aliguori | return NULL; |
225 | 54f254f9 | aliguori | } |
226 | 54f254f9 | aliguori | |
227 | 54f254f9 | aliguori | /*
|
228 | 54f254f9 | aliguori | * Cancel async packets that are no longer valid
|
229 | 54f254f9 | aliguori | */
|
230 | 54f254f9 | aliguori | static void uhci_async_validate_end(UHCIState *s) |
231 | 54f254f9 | aliguori | { |
232 | ddf6583f | Gerd Hoffmann | UHCIAsync *curr, *n; |
233 | 54f254f9 | aliguori | |
234 | ddf6583f | Gerd Hoffmann | QTAILQ_FOREACH_SAFE(curr, &s->async_pending, next, n) { |
235 | 54f254f9 | aliguori | if (curr->valid > 0) { |
236 | 54f254f9 | aliguori | continue;
|
237 | 54f254f9 | aliguori | } |
238 | ddf6583f | Gerd Hoffmann | uhci_async_unlink(s, curr); |
239 | 54f254f9 | aliguori | uhci_async_cancel(s, curr); |
240 | 54f254f9 | aliguori | } |
241 | 54f254f9 | aliguori | } |
242 | 54f254f9 | aliguori | |
243 | 07771f6f | Gerd Hoffmann | static void uhci_async_cancel_device(UHCIState *s, USBDevice *dev) |
244 | 07771f6f | Gerd Hoffmann | { |
245 | 07771f6f | Gerd Hoffmann | UHCIAsync *curr, *n; |
246 | 07771f6f | Gerd Hoffmann | |
247 | 07771f6f | Gerd Hoffmann | QTAILQ_FOREACH_SAFE(curr, &s->async_pending, next, n) { |
248 | 07771f6f | Gerd Hoffmann | if (curr->packet.owner != dev) {
|
249 | 07771f6f | Gerd Hoffmann | continue;
|
250 | 07771f6f | Gerd Hoffmann | } |
251 | 07771f6f | Gerd Hoffmann | uhci_async_unlink(s, curr); |
252 | 07771f6f | Gerd Hoffmann | uhci_async_cancel(s, curr); |
253 | 07771f6f | Gerd Hoffmann | } |
254 | 07771f6f | Gerd Hoffmann | } |
255 | 07771f6f | Gerd Hoffmann | |
256 | 54f254f9 | aliguori | static void uhci_async_cancel_all(UHCIState *s) |
257 | 54f254f9 | aliguori | { |
258 | ddf6583f | Gerd Hoffmann | UHCIAsync *curr, *n; |
259 | 54f254f9 | aliguori | |
260 | ddf6583f | Gerd Hoffmann | QTAILQ_FOREACH_SAFE(curr, &s->async_pending, next, n) { |
261 | ddf6583f | Gerd Hoffmann | uhci_async_unlink(s, curr); |
262 | 54f254f9 | aliguori | uhci_async_cancel(s, curr); |
263 | 54f254f9 | aliguori | } |
264 | 54f254f9 | aliguori | } |
265 | 54f254f9 | aliguori | |
266 | 54f254f9 | aliguori | static UHCIAsync *uhci_async_find_td(UHCIState *s, uint32_t addr, uint32_t token)
|
267 | 54f254f9 | aliguori | { |
268 | ddf6583f | Gerd Hoffmann | UHCIAsync *async; |
269 | e8ee3c72 | aurel32 | UHCIAsync *match = NULL;
|
270 | e8ee3c72 | aurel32 | int count = 0; |
271 | e8ee3c72 | aurel32 | |
272 | e8ee3c72 | aurel32 | /*
|
273 | e8ee3c72 | aurel32 | * We're looking for the best match here. ie both td addr and token.
|
274 | e8ee3c72 | aurel32 | * Otherwise we return last good match. ie just token.
|
275 | e8ee3c72 | aurel32 | * It's ok to match just token because it identifies the transaction
|
276 | e8ee3c72 | aurel32 | * rather well, token includes: device addr, endpoint, size, etc.
|
277 | e8ee3c72 | aurel32 | *
|
278 | e8ee3c72 | aurel32 | * Also since we queue async transactions in reverse order by returning
|
279 | e8ee3c72 | aurel32 | * last good match we restores the order.
|
280 | e8ee3c72 | aurel32 | *
|
281 | e8ee3c72 | aurel32 | * It's expected that we wont have a ton of outstanding transactions.
|
282 | e8ee3c72 | aurel32 | * If we ever do we'd want to optimize this algorithm.
|
283 | e8ee3c72 | aurel32 | */
|
284 | 54f254f9 | aliguori | |
285 | ddf6583f | Gerd Hoffmann | QTAILQ_FOREACH(async, &s->async_pending, next) { |
286 | e8ee3c72 | aurel32 | if (async->token == token) {
|
287 | e8ee3c72 | aurel32 | /* Good match */
|
288 | e8ee3c72 | aurel32 | match = async; |
289 | e8ee3c72 | aurel32 | |
290 | e8ee3c72 | aurel32 | if (async->td == addr) {
|
291 | e8ee3c72 | aurel32 | /* Best match */
|
292 | e8ee3c72 | aurel32 | break;
|
293 | 54f254f9 | aliguori | } |
294 | 54f254f9 | aliguori | } |
295 | e8ee3c72 | aurel32 | count++; |
296 | 54f254f9 | aliguori | } |
297 | e8ee3c72 | aurel32 | |
298 | e8ee3c72 | aurel32 | if (count > 64) |
299 | e8ee3c72 | aurel32 | fprintf(stderr, "uhci: warning lots of async transactions\n");
|
300 | e8ee3c72 | aurel32 | |
301 | e8ee3c72 | aurel32 | return match;
|
302 | 54f254f9 | aliguori | } |
303 | 54f254f9 | aliguori | |
304 | bb36d470 | bellard | static void uhci_update_irq(UHCIState *s) |
305 | bb36d470 | bellard | { |
306 | bb36d470 | bellard | int level;
|
307 | bb36d470 | bellard | if (((s->status2 & 1) && (s->intr & (1 << 2))) || |
308 | bb36d470 | bellard | ((s->status2 & 2) && (s->intr & (1 << 3))) || |
309 | bb36d470 | bellard | ((s->status & UHCI_STS_USBERR) && (s->intr & (1 << 0))) || |
310 | bb36d470 | bellard | ((s->status & UHCI_STS_RD) && (s->intr & (1 << 1))) || |
311 | bb36d470 | bellard | (s->status & UHCI_STS_HSERR) || |
312 | bb36d470 | bellard | (s->status & UHCI_STS_HCPERR)) { |
313 | bb36d470 | bellard | level = 1;
|
314 | bb36d470 | bellard | } else {
|
315 | bb36d470 | bellard | level = 0;
|
316 | bb36d470 | bellard | } |
317 | d537cf6c | pbrook | qemu_set_irq(s->dev.irq[3], level);
|
318 | bb36d470 | bellard | } |
319 | bb36d470 | bellard | |
320 | c8075ac3 | Gleb Natapov | static void uhci_reset(void *opaque) |
321 | bb36d470 | bellard | { |
322 | c8075ac3 | Gleb Natapov | UHCIState *s = opaque; |
323 | bb36d470 | bellard | uint8_t *pci_conf; |
324 | bb36d470 | bellard | int i;
|
325 | bb36d470 | bellard | UHCIPort *port; |
326 | bb36d470 | bellard | |
327 | d0f2c4c6 | malc | DPRINTF("uhci: full reset\n");
|
328 | 6f382b5e | aliguori | |
329 | bb36d470 | bellard | pci_conf = s->dev.config; |
330 | bb36d470 | bellard | |
331 | bb36d470 | bellard | pci_conf[0x6a] = 0x01; /* usb clock */ |
332 | bb36d470 | bellard | pci_conf[0x6b] = 0x00; |
333 | bb36d470 | bellard | s->cmd = 0;
|
334 | bb36d470 | bellard | s->status = 0;
|
335 | bb36d470 | bellard | s->status2 = 0;
|
336 | bb36d470 | bellard | s->intr = 0;
|
337 | bb36d470 | bellard | s->fl_base_addr = 0;
|
338 | bb36d470 | bellard | s->sof_timing = 64;
|
339 | 54f254f9 | aliguori | |
340 | bb36d470 | bellard | for(i = 0; i < NB_PORTS; i++) { |
341 | bb36d470 | bellard | port = &s->ports[i]; |
342 | bb36d470 | bellard | port->ctrl = 0x0080;
|
343 | 891fb2cd | Gerd Hoffmann | if (port->port.dev && port->port.dev->attached) {
|
344 | e0b8e72d | Gerd Hoffmann | usb_reset(&port->port); |
345 | 618c169b | Gerd Hoffmann | } |
346 | bb36d470 | bellard | } |
347 | 54f254f9 | aliguori | |
348 | 54f254f9 | aliguori | uhci_async_cancel_all(s); |
349 | bb36d470 | bellard | } |
350 | bb36d470 | bellard | |
351 | 817afc61 | Juan Quintela | static void uhci_pre_save(void *opaque) |
352 | b9dc033c | balrog | { |
353 | b9dc033c | balrog | UHCIState *s = opaque; |
354 | b9dc033c | balrog | |
355 | 6f382b5e | aliguori | uhci_async_cancel_all(s); |
356 | b9dc033c | balrog | } |
357 | b9dc033c | balrog | |
358 | 817afc61 | Juan Quintela | static const VMStateDescription vmstate_uhci_port = { |
359 | 817afc61 | Juan Quintela | .name = "uhci port",
|
360 | 817afc61 | Juan Quintela | .version_id = 1,
|
361 | 817afc61 | Juan Quintela | .minimum_version_id = 1,
|
362 | 817afc61 | Juan Quintela | .minimum_version_id_old = 1,
|
363 | 817afc61 | Juan Quintela | .fields = (VMStateField []) { |
364 | 817afc61 | Juan Quintela | VMSTATE_UINT16(ctrl, UHCIPort), |
365 | 817afc61 | Juan Quintela | VMSTATE_END_OF_LIST() |
366 | 817afc61 | Juan Quintela | } |
367 | 817afc61 | Juan Quintela | }; |
368 | 817afc61 | Juan Quintela | |
369 | 817afc61 | Juan Quintela | static const VMStateDescription vmstate_uhci = { |
370 | 817afc61 | Juan Quintela | .name = "uhci",
|
371 | 6881dd5f | TeLeMan | .version_id = 2,
|
372 | 817afc61 | Juan Quintela | .minimum_version_id = 1,
|
373 | 817afc61 | Juan Quintela | .minimum_version_id_old = 1,
|
374 | 817afc61 | Juan Quintela | .pre_save = uhci_pre_save, |
375 | 817afc61 | Juan Quintela | .fields = (VMStateField []) { |
376 | 817afc61 | Juan Quintela | VMSTATE_PCI_DEVICE(dev, UHCIState), |
377 | 817afc61 | Juan Quintela | VMSTATE_UINT8_EQUAL(num_ports_vmstate, UHCIState), |
378 | 817afc61 | Juan Quintela | VMSTATE_STRUCT_ARRAY(ports, UHCIState, NB_PORTS, 1,
|
379 | 817afc61 | Juan Quintela | vmstate_uhci_port, UHCIPort), |
380 | 817afc61 | Juan Quintela | VMSTATE_UINT16(cmd, UHCIState), |
381 | 817afc61 | Juan Quintela | VMSTATE_UINT16(status, UHCIState), |
382 | 817afc61 | Juan Quintela | VMSTATE_UINT16(intr, UHCIState), |
383 | 817afc61 | Juan Quintela | VMSTATE_UINT16(frnum, UHCIState), |
384 | 817afc61 | Juan Quintela | VMSTATE_UINT32(fl_base_addr, UHCIState), |
385 | 817afc61 | Juan Quintela | VMSTATE_UINT8(sof_timing, UHCIState), |
386 | 817afc61 | Juan Quintela | VMSTATE_UINT8(status2, UHCIState), |
387 | 817afc61 | Juan Quintela | VMSTATE_TIMER(frame_timer, UHCIState), |
388 | 6881dd5f | TeLeMan | VMSTATE_INT64_V(expire_time, UHCIState, 2),
|
389 | 817afc61 | Juan Quintela | VMSTATE_END_OF_LIST() |
390 | 817afc61 | Juan Quintela | } |
391 | 817afc61 | Juan Quintela | }; |
392 | b9dc033c | balrog | |
393 | bb36d470 | bellard | static void uhci_ioport_writeb(void *opaque, uint32_t addr, uint32_t val) |
394 | bb36d470 | bellard | { |
395 | bb36d470 | bellard | UHCIState *s = opaque; |
396 | 3b46e624 | ths | |
397 | bb36d470 | bellard | addr &= 0x1f;
|
398 | bb36d470 | bellard | switch(addr) {
|
399 | bb36d470 | bellard | case 0x0c: |
400 | bb36d470 | bellard | s->sof_timing = val; |
401 | bb36d470 | bellard | break;
|
402 | bb36d470 | bellard | } |
403 | bb36d470 | bellard | } |
404 | bb36d470 | bellard | |
405 | bb36d470 | bellard | static uint32_t uhci_ioport_readb(void *opaque, uint32_t addr) |
406 | bb36d470 | bellard | { |
407 | bb36d470 | bellard | UHCIState *s = opaque; |
408 | bb36d470 | bellard | uint32_t val; |
409 | bb36d470 | bellard | |
410 | bb36d470 | bellard | addr &= 0x1f;
|
411 | bb36d470 | bellard | switch(addr) {
|
412 | bb36d470 | bellard | case 0x0c: |
413 | bb36d470 | bellard | val = s->sof_timing; |
414 | d80cfb3f | pbrook | break;
|
415 | bb36d470 | bellard | default:
|
416 | bb36d470 | bellard | val = 0xff;
|
417 | bb36d470 | bellard | break;
|
418 | bb36d470 | bellard | } |
419 | bb36d470 | bellard | return val;
|
420 | bb36d470 | bellard | } |
421 | bb36d470 | bellard | |
422 | bb36d470 | bellard | static void uhci_ioport_writew(void *opaque, uint32_t addr, uint32_t val) |
423 | bb36d470 | bellard | { |
424 | bb36d470 | bellard | UHCIState *s = opaque; |
425 | 3b46e624 | ths | |
426 | bb36d470 | bellard | addr &= 0x1f;
|
427 | d0f2c4c6 | malc | DPRINTF("uhci: writew port=0x%04x val=0x%04x\n", addr, val);
|
428 | 54f254f9 | aliguori | |
429 | bb36d470 | bellard | switch(addr) {
|
430 | bb36d470 | bellard | case 0x00: |
431 | bb36d470 | bellard | if ((val & UHCI_CMD_RS) && !(s->cmd & UHCI_CMD_RS)) {
|
432 | bb36d470 | bellard | /* start frame processing */
|
433 | 94cc916a | Gerd Hoffmann | s->expire_time = qemu_get_clock_ns(vm_clock) + |
434 | 94cc916a | Gerd Hoffmann | (get_ticks_per_sec() / FRAME_TIMER_FREQ); |
435 | 74475455 | Paolo Bonzini | qemu_mod_timer(s->frame_timer, qemu_get_clock_ns(vm_clock)); |
436 | 52328140 | bellard | s->status &= ~UHCI_STS_HCHALTED; |
437 | 467d409f | bellard | } else if (!(val & UHCI_CMD_RS)) { |
438 | 52328140 | bellard | s->status |= UHCI_STS_HCHALTED; |
439 | bb36d470 | bellard | } |
440 | bb36d470 | bellard | if (val & UHCI_CMD_GRESET) {
|
441 | bb36d470 | bellard | UHCIPort *port; |
442 | bb36d470 | bellard | USBDevice *dev; |
443 | bb36d470 | bellard | int i;
|
444 | bb36d470 | bellard | |
445 | bb36d470 | bellard | /* send reset on the USB bus */
|
446 | bb36d470 | bellard | for(i = 0; i < NB_PORTS; i++) { |
447 | bb36d470 | bellard | port = &s->ports[i]; |
448 | a594cfbf | bellard | dev = port->port.dev; |
449 | 891fb2cd | Gerd Hoffmann | if (dev && dev->attached) {
|
450 | 4d611c9a | pbrook | usb_send_msg(dev, USB_MSG_RESET); |
451 | bb36d470 | bellard | } |
452 | bb36d470 | bellard | } |
453 | bb36d470 | bellard | uhci_reset(s); |
454 | bb36d470 | bellard | return;
|
455 | bb36d470 | bellard | } |
456 | 5e9ab4c4 | bellard | if (val & UHCI_CMD_HCRESET) {
|
457 | bb36d470 | bellard | uhci_reset(s); |
458 | bb36d470 | bellard | return;
|
459 | bb36d470 | bellard | } |
460 | bb36d470 | bellard | s->cmd = val; |
461 | bb36d470 | bellard | break;
|
462 | bb36d470 | bellard | case 0x02: |
463 | bb36d470 | bellard | s->status &= ~val; |
464 | bb36d470 | bellard | /* XXX: the chip spec is not coherent, so we add a hidden
|
465 | bb36d470 | bellard | register to distinguish between IOC and SPD */
|
466 | bb36d470 | bellard | if (val & UHCI_STS_USBINT)
|
467 | bb36d470 | bellard | s->status2 = 0;
|
468 | bb36d470 | bellard | uhci_update_irq(s); |
469 | bb36d470 | bellard | break;
|
470 | bb36d470 | bellard | case 0x04: |
471 | bb36d470 | bellard | s->intr = val; |
472 | bb36d470 | bellard | uhci_update_irq(s); |
473 | bb36d470 | bellard | break;
|
474 | bb36d470 | bellard | case 0x06: |
475 | bb36d470 | bellard | if (s->status & UHCI_STS_HCHALTED)
|
476 | bb36d470 | bellard | s->frnum = val & 0x7ff;
|
477 | bb36d470 | bellard | break;
|
478 | bb36d470 | bellard | case 0x10 ... 0x1f: |
479 | bb36d470 | bellard | { |
480 | bb36d470 | bellard | UHCIPort *port; |
481 | bb36d470 | bellard | USBDevice *dev; |
482 | bb36d470 | bellard | int n;
|
483 | bb36d470 | bellard | |
484 | bb36d470 | bellard | n = (addr >> 1) & 7; |
485 | bb36d470 | bellard | if (n >= NB_PORTS)
|
486 | bb36d470 | bellard | return;
|
487 | bb36d470 | bellard | port = &s->ports[n]; |
488 | a594cfbf | bellard | dev = port->port.dev; |
489 | 891fb2cd | Gerd Hoffmann | if (dev && dev->attached) {
|
490 | bb36d470 | bellard | /* port reset */
|
491 | 5fafdf24 | ths | if ( (val & UHCI_PORT_RESET) &&
|
492 | bb36d470 | bellard | !(port->ctrl & UHCI_PORT_RESET) ) { |
493 | 4d611c9a | pbrook | usb_send_msg(dev, USB_MSG_RESET); |
494 | bb36d470 | bellard | } |
495 | bb36d470 | bellard | } |
496 | 9159f679 | Gerd Hoffmann | port->ctrl &= UHCI_PORT_READ_ONLY; |
497 | 9159f679 | Gerd Hoffmann | port->ctrl |= (val & ~UHCI_PORT_READ_ONLY); |
498 | bb36d470 | bellard | /* some bits are reset when a '1' is written to them */
|
499 | 9159f679 | Gerd Hoffmann | port->ctrl &= ~(val & UHCI_PORT_WRITE_CLEAR); |
500 | bb36d470 | bellard | } |
501 | bb36d470 | bellard | break;
|
502 | bb36d470 | bellard | } |
503 | bb36d470 | bellard | } |
504 | bb36d470 | bellard | |
505 | bb36d470 | bellard | static uint32_t uhci_ioport_readw(void *opaque, uint32_t addr) |
506 | bb36d470 | bellard | { |
507 | bb36d470 | bellard | UHCIState *s = opaque; |
508 | bb36d470 | bellard | uint32_t val; |
509 | bb36d470 | bellard | |
510 | bb36d470 | bellard | addr &= 0x1f;
|
511 | bb36d470 | bellard | switch(addr) {
|
512 | bb36d470 | bellard | case 0x00: |
513 | bb36d470 | bellard | val = s->cmd; |
514 | bb36d470 | bellard | break;
|
515 | bb36d470 | bellard | case 0x02: |
516 | bb36d470 | bellard | val = s->status; |
517 | bb36d470 | bellard | break;
|
518 | bb36d470 | bellard | case 0x04: |
519 | bb36d470 | bellard | val = s->intr; |
520 | bb36d470 | bellard | break;
|
521 | bb36d470 | bellard | case 0x06: |
522 | bb36d470 | bellard | val = s->frnum; |
523 | bb36d470 | bellard | break;
|
524 | bb36d470 | bellard | case 0x10 ... 0x1f: |
525 | bb36d470 | bellard | { |
526 | bb36d470 | bellard | UHCIPort *port; |
527 | bb36d470 | bellard | int n;
|
528 | bb36d470 | bellard | n = (addr >> 1) & 7; |
529 | 5fafdf24 | ths | if (n >= NB_PORTS)
|
530 | bb36d470 | bellard | goto read_default;
|
531 | bb36d470 | bellard | port = &s->ports[n]; |
532 | bb36d470 | bellard | val = port->ctrl; |
533 | bb36d470 | bellard | } |
534 | bb36d470 | bellard | break;
|
535 | bb36d470 | bellard | default:
|
536 | bb36d470 | bellard | read_default:
|
537 | bb36d470 | bellard | val = 0xff7f; /* disabled port */ |
538 | bb36d470 | bellard | break;
|
539 | bb36d470 | bellard | } |
540 | 54f254f9 | aliguori | |
541 | d0f2c4c6 | malc | DPRINTF("uhci: readw port=0x%04x val=0x%04x\n", addr, val);
|
542 | 54f254f9 | aliguori | |
543 | bb36d470 | bellard | return val;
|
544 | bb36d470 | bellard | } |
545 | bb36d470 | bellard | |
546 | bb36d470 | bellard | static void uhci_ioport_writel(void *opaque, uint32_t addr, uint32_t val) |
547 | bb36d470 | bellard | { |
548 | bb36d470 | bellard | UHCIState *s = opaque; |
549 | bb36d470 | bellard | |
550 | bb36d470 | bellard | addr &= 0x1f;
|
551 | d0f2c4c6 | malc | DPRINTF("uhci: writel port=0x%04x val=0x%08x\n", addr, val);
|
552 | 54f254f9 | aliguori | |
553 | bb36d470 | bellard | switch(addr) {
|
554 | bb36d470 | bellard | case 0x08: |
555 | bb36d470 | bellard | s->fl_base_addr = val & ~0xfff;
|
556 | bb36d470 | bellard | break;
|
557 | bb36d470 | bellard | } |
558 | bb36d470 | bellard | } |
559 | bb36d470 | bellard | |
560 | bb36d470 | bellard | static uint32_t uhci_ioport_readl(void *opaque, uint32_t addr) |
561 | bb36d470 | bellard | { |
562 | bb36d470 | bellard | UHCIState *s = opaque; |
563 | bb36d470 | bellard | uint32_t val; |
564 | bb36d470 | bellard | |
565 | bb36d470 | bellard | addr &= 0x1f;
|
566 | bb36d470 | bellard | switch(addr) {
|
567 | bb36d470 | bellard | case 0x08: |
568 | bb36d470 | bellard | val = s->fl_base_addr; |
569 | bb36d470 | bellard | break;
|
570 | bb36d470 | bellard | default:
|
571 | bb36d470 | bellard | val = 0xffffffff;
|
572 | bb36d470 | bellard | break;
|
573 | bb36d470 | bellard | } |
574 | bb36d470 | bellard | return val;
|
575 | bb36d470 | bellard | } |
576 | bb36d470 | bellard | |
577 | 96217e31 | ths | /* signal resume if controller suspended */
|
578 | 96217e31 | ths | static void uhci_resume (void *opaque) |
579 | 96217e31 | ths | { |
580 | 96217e31 | ths | UHCIState *s = (UHCIState *)opaque; |
581 | 96217e31 | ths | |
582 | 96217e31 | ths | if (!s)
|
583 | 96217e31 | ths | return;
|
584 | 96217e31 | ths | |
585 | 96217e31 | ths | if (s->cmd & UHCI_CMD_EGSM) {
|
586 | 96217e31 | ths | s->cmd |= UHCI_CMD_FGR; |
587 | 96217e31 | ths | s->status |= UHCI_STS_RD; |
588 | 96217e31 | ths | uhci_update_irq(s); |
589 | 96217e31 | ths | } |
590 | 96217e31 | ths | } |
591 | 96217e31 | ths | |
592 | 618c169b | Gerd Hoffmann | static void uhci_attach(USBPort *port1) |
593 | bb36d470 | bellard | { |
594 | bb36d470 | bellard | UHCIState *s = port1->opaque; |
595 | bb36d470 | bellard | UHCIPort *port = &s->ports[port1->index]; |
596 | bb36d470 | bellard | |
597 | 618c169b | Gerd Hoffmann | /* set connect status */
|
598 | 618c169b | Gerd Hoffmann | port->ctrl |= UHCI_PORT_CCS | UHCI_PORT_CSC; |
599 | 61064870 | pbrook | |
600 | 618c169b | Gerd Hoffmann | /* update speed */
|
601 | 618c169b | Gerd Hoffmann | if (port->port.dev->speed == USB_SPEED_LOW) {
|
602 | 618c169b | Gerd Hoffmann | port->ctrl |= UHCI_PORT_LSDA; |
603 | bb36d470 | bellard | } else {
|
604 | 618c169b | Gerd Hoffmann | port->ctrl &= ~UHCI_PORT_LSDA; |
605 | 618c169b | Gerd Hoffmann | } |
606 | 96217e31 | ths | |
607 | 618c169b | Gerd Hoffmann | uhci_resume(s); |
608 | 618c169b | Gerd Hoffmann | } |
609 | 96217e31 | ths | |
610 | 618c169b | Gerd Hoffmann | static void uhci_detach(USBPort *port1) |
611 | 618c169b | Gerd Hoffmann | { |
612 | 618c169b | Gerd Hoffmann | UHCIState *s = port1->opaque; |
613 | 618c169b | Gerd Hoffmann | UHCIPort *port = &s->ports[port1->index]; |
614 | 618c169b | Gerd Hoffmann | |
615 | 4706ab6c | Hans de Goede | uhci_async_cancel_device(s, port1->dev); |
616 | 4706ab6c | Hans de Goede | |
617 | 618c169b | Gerd Hoffmann | /* set connect status */
|
618 | 618c169b | Gerd Hoffmann | if (port->ctrl & UHCI_PORT_CCS) {
|
619 | 618c169b | Gerd Hoffmann | port->ctrl &= ~UHCI_PORT_CCS; |
620 | 618c169b | Gerd Hoffmann | port->ctrl |= UHCI_PORT_CSC; |
621 | bb36d470 | bellard | } |
622 | 618c169b | Gerd Hoffmann | /* disable port */
|
623 | 618c169b | Gerd Hoffmann | if (port->ctrl & UHCI_PORT_EN) {
|
624 | 618c169b | Gerd Hoffmann | port->ctrl &= ~UHCI_PORT_EN; |
625 | 618c169b | Gerd Hoffmann | port->ctrl |= UHCI_PORT_ENC; |
626 | 618c169b | Gerd Hoffmann | } |
627 | 618c169b | Gerd Hoffmann | |
628 | 618c169b | Gerd Hoffmann | uhci_resume(s); |
629 | bb36d470 | bellard | } |
630 | bb36d470 | bellard | |
631 | 4706ab6c | Hans de Goede | static void uhci_child_detach(USBPort *port1, USBDevice *child) |
632 | 4706ab6c | Hans de Goede | { |
633 | 4706ab6c | Hans de Goede | UHCIState *s = port1->opaque; |
634 | 4706ab6c | Hans de Goede | |
635 | 4706ab6c | Hans de Goede | uhci_async_cancel_device(s, child); |
636 | 4706ab6c | Hans de Goede | } |
637 | 4706ab6c | Hans de Goede | |
638 | d47e59b8 | Hans de Goede | static void uhci_wakeup(USBPort *port1) |
639 | 9159f679 | Gerd Hoffmann | { |
640 | d47e59b8 | Hans de Goede | UHCIState *s = port1->opaque; |
641 | d47e59b8 | Hans de Goede | UHCIPort *port = &s->ports[port1->index]; |
642 | 9159f679 | Gerd Hoffmann | |
643 | 9159f679 | Gerd Hoffmann | if (port->ctrl & UHCI_PORT_SUSPEND && !(port->ctrl & UHCI_PORT_RD)) {
|
644 | 9159f679 | Gerd Hoffmann | port->ctrl |= UHCI_PORT_RD; |
645 | 9159f679 | Gerd Hoffmann | uhci_resume(s); |
646 | 9159f679 | Gerd Hoffmann | } |
647 | 9159f679 | Gerd Hoffmann | } |
648 | 9159f679 | Gerd Hoffmann | |
649 | 4d611c9a | pbrook | static int uhci_broadcast_packet(UHCIState *s, USBPacket *p) |
650 | bb36d470 | bellard | { |
651 | bb36d470 | bellard | int i, ret;
|
652 | bb36d470 | bellard | |
653 | 4f4321c1 | Gerd Hoffmann | DPRINTF("uhci: packet enter. pid %s addr 0x%02x ep %d len %zd\n",
|
654 | 4f4321c1 | Gerd Hoffmann | pid2str(p->pid), p->devaddr, p->devep, p->iov.size); |
655 | 5d808245 | aurel32 | if (p->pid == USB_TOKEN_OUT || p->pid == USB_TOKEN_SETUP)
|
656 | 4f4321c1 | Gerd Hoffmann | dump_data(p, 0);
|
657 | 54f254f9 | aliguori | |
658 | 54f254f9 | aliguori | ret = USB_RET_NODEV; |
659 | 54f254f9 | aliguori | for (i = 0; i < NB_PORTS && ret == USB_RET_NODEV; i++) { |
660 | 54f254f9 | aliguori | UHCIPort *port = &s->ports[i]; |
661 | 54f254f9 | aliguori | USBDevice *dev = port->port.dev; |
662 | 54f254f9 | aliguori | |
663 | 891fb2cd | Gerd Hoffmann | if (dev && dev->attached && (port->ctrl & UHCI_PORT_EN)) {
|
664 | 53aa8c0e | Gerd Hoffmann | ret = usb_handle_packet(dev, p); |
665 | 891fb2cd | Gerd Hoffmann | } |
666 | bb36d470 | bellard | } |
667 | 54f254f9 | aliguori | |
668 | 4f4321c1 | Gerd Hoffmann | DPRINTF("uhci: packet exit. ret %d len %zd\n", ret, p->iov.size);
|
669 | 54f254f9 | aliguori | if (p->pid == USB_TOKEN_IN && ret > 0) |
670 | 4f4321c1 | Gerd Hoffmann | dump_data(p, ret); |
671 | 54f254f9 | aliguori | |
672 | 54f254f9 | aliguori | return ret;
|
673 | bb36d470 | bellard | } |
674 | bb36d470 | bellard | |
675 | d47e59b8 | Hans de Goede | static void uhci_async_complete(USBPort *port, USBPacket *packet); |
676 | 54f254f9 | aliguori | static void uhci_process_frame(UHCIState *s); |
677 | 4d611c9a | pbrook | |
678 | bb36d470 | bellard | /* return -1 if fatal error (frame must be stopped)
|
679 | bb36d470 | bellard | 0 if TD successful
|
680 | bb36d470 | bellard | 1 if TD unsuccessful or inactive
|
681 | bb36d470 | bellard | */
|
682 | 54f254f9 | aliguori | static int uhci_complete_td(UHCIState *s, UHCI_TD *td, UHCIAsync *async, uint32_t *int_mask) |
683 | bb36d470 | bellard | { |
684 | 54f254f9 | aliguori | int len = 0, max_len, err, ret; |
685 | bb36d470 | bellard | uint8_t pid; |
686 | bb36d470 | bellard | |
687 | 54f254f9 | aliguori | max_len = ((td->token >> 21) + 1) & 0x7ff; |
688 | 54f254f9 | aliguori | pid = td->token & 0xff;
|
689 | 54f254f9 | aliguori | |
690 | 4f4321c1 | Gerd Hoffmann | ret = async->packet.result; |
691 | 54f254f9 | aliguori | |
692 | 54f254f9 | aliguori | if (td->ctrl & TD_CTRL_IOS)
|
693 | 54f254f9 | aliguori | td->ctrl &= ~TD_CTRL_ACTIVE; |
694 | bb36d470 | bellard | |
695 | 54f254f9 | aliguori | if (ret < 0) |
696 | 54f254f9 | aliguori | goto out;
|
697 | b9dc033c | balrog | |
698 | 4f4321c1 | Gerd Hoffmann | len = async->packet.result; |
699 | 54f254f9 | aliguori | td->ctrl = (td->ctrl & ~0x7ff) | ((len - 1) & 0x7ff); |
700 | 54f254f9 | aliguori | |
701 | 54f254f9 | aliguori | /* The NAK bit may have been set by a previous frame, so clear it
|
702 | 54f254f9 | aliguori | here. The docs are somewhat unclear, but win2k relies on this
|
703 | 54f254f9 | aliguori | behavior. */
|
704 | 54f254f9 | aliguori | td->ctrl &= ~(TD_CTRL_ACTIVE | TD_CTRL_NAK); |
705 | 5bd2c0d7 | Paul Brook | if (td->ctrl & TD_CTRL_IOC)
|
706 | 5bd2c0d7 | Paul Brook | *int_mask |= 0x01;
|
707 | 54f254f9 | aliguori | |
708 | 54f254f9 | aliguori | if (pid == USB_TOKEN_IN) {
|
709 | 54f254f9 | aliguori | if (len > max_len) {
|
710 | 54f254f9 | aliguori | ret = USB_RET_BABBLE; |
711 | 54f254f9 | aliguori | goto out;
|
712 | 4d611c9a | pbrook | } |
713 | b9dc033c | balrog | |
714 | 54f254f9 | aliguori | if ((td->ctrl & TD_CTRL_SPD) && len < max_len) {
|
715 | bb36d470 | bellard | *int_mask |= 0x02;
|
716 | bb36d470 | bellard | /* short packet: do not update QH */
|
717 | d0f2c4c6 | malc | DPRINTF("uhci: short packet. td 0x%x token 0x%x\n", async->td, async->token);
|
718 | bb36d470 | bellard | return 1; |
719 | bb36d470 | bellard | } |
720 | 54f254f9 | aliguori | } |
721 | 54f254f9 | aliguori | |
722 | 54f254f9 | aliguori | /* success */
|
723 | 54f254f9 | aliguori | return 0; |
724 | 54f254f9 | aliguori | |
725 | 54f254f9 | aliguori | out:
|
726 | 54f254f9 | aliguori | switch(ret) {
|
727 | 54f254f9 | aliguori | case USB_RET_STALL:
|
728 | 54f254f9 | aliguori | td->ctrl |= TD_CTRL_STALL; |
729 | 54f254f9 | aliguori | td->ctrl &= ~TD_CTRL_ACTIVE; |
730 | 8656954a | Jan Vesely | s->status |= UHCI_STS_USBERR; |
731 | 0070f095 | Gerd Hoffmann | if (td->ctrl & TD_CTRL_IOC) {
|
732 | 0070f095 | Gerd Hoffmann | *int_mask |= 0x01;
|
733 | 0070f095 | Gerd Hoffmann | } |
734 | 8656954a | Jan Vesely | uhci_update_irq(s); |
735 | 54f254f9 | aliguori | return 1; |
736 | 54f254f9 | aliguori | |
737 | 54f254f9 | aliguori | case USB_RET_BABBLE:
|
738 | 54f254f9 | aliguori | td->ctrl |= TD_CTRL_BABBLE | TD_CTRL_STALL; |
739 | 54f254f9 | aliguori | td->ctrl &= ~TD_CTRL_ACTIVE; |
740 | 8656954a | Jan Vesely | s->status |= UHCI_STS_USBERR; |
741 | 0070f095 | Gerd Hoffmann | if (td->ctrl & TD_CTRL_IOC) {
|
742 | 0070f095 | Gerd Hoffmann | *int_mask |= 0x01;
|
743 | 0070f095 | Gerd Hoffmann | } |
744 | 8656954a | Jan Vesely | uhci_update_irq(s); |
745 | 54f254f9 | aliguori | /* frame interrupted */
|
746 | 54f254f9 | aliguori | return -1; |
747 | 54f254f9 | aliguori | |
748 | 54f254f9 | aliguori | case USB_RET_NAK:
|
749 | 54f254f9 | aliguori | td->ctrl |= TD_CTRL_NAK; |
750 | 54f254f9 | aliguori | if (pid == USB_TOKEN_SETUP)
|
751 | 54f254f9 | aliguori | break;
|
752 | 54f254f9 | aliguori | return 1; |
753 | 54f254f9 | aliguori | |
754 | 54f254f9 | aliguori | case USB_RET_NODEV:
|
755 | 54f254f9 | aliguori | default:
|
756 | 54f254f9 | aliguori | break;
|
757 | 54f254f9 | aliguori | } |
758 | 54f254f9 | aliguori | |
759 | 54f254f9 | aliguori | /* Retry the TD if error count is not zero */
|
760 | 54f254f9 | aliguori | |
761 | 54f254f9 | aliguori | td->ctrl |= TD_CTRL_TIMEOUT; |
762 | 54f254f9 | aliguori | err = (td->ctrl >> TD_CTRL_ERROR_SHIFT) & 3;
|
763 | 54f254f9 | aliguori | if (err != 0) { |
764 | 54f254f9 | aliguori | err--; |
765 | 54f254f9 | aliguori | if (err == 0) { |
766 | bb36d470 | bellard | td->ctrl &= ~TD_CTRL_ACTIVE; |
767 | 54f254f9 | aliguori | s->status |= UHCI_STS_USBERR; |
768 | 5bd2c0d7 | Paul Brook | if (td->ctrl & TD_CTRL_IOC)
|
769 | 5bd2c0d7 | Paul Brook | *int_mask |= 0x01;
|
770 | 54f254f9 | aliguori | uhci_update_irq(s); |
771 | bb36d470 | bellard | } |
772 | bb36d470 | bellard | } |
773 | 54f254f9 | aliguori | td->ctrl = (td->ctrl & ~(3 << TD_CTRL_ERROR_SHIFT)) |
|
774 | 54f254f9 | aliguori | (err << TD_CTRL_ERROR_SHIFT); |
775 | 54f254f9 | aliguori | return 1; |
776 | bb36d470 | bellard | } |
777 | bb36d470 | bellard | |
778 | 54f254f9 | aliguori | static int uhci_handle_td(UHCIState *s, uint32_t addr, UHCI_TD *td, uint32_t *int_mask) |
779 | 54f254f9 | aliguori | { |
780 | 54f254f9 | aliguori | UHCIAsync *async; |
781 | 5d808245 | aurel32 | int len = 0, max_len; |
782 | 8e65b7c0 | David S. Ahern | uint8_t pid, isoc; |
783 | 8e65b7c0 | David S. Ahern | uint32_t token; |
784 | 54f254f9 | aliguori | |
785 | 54f254f9 | aliguori | /* Is active ? */
|
786 | 54f254f9 | aliguori | if (!(td->ctrl & TD_CTRL_ACTIVE))
|
787 | 54f254f9 | aliguori | return 1; |
788 | 54f254f9 | aliguori | |
789 | 8e65b7c0 | David S. Ahern | /* token field is not unique for isochronous requests,
|
790 | 8e65b7c0 | David S. Ahern | * so use the destination buffer
|
791 | 8e65b7c0 | David S. Ahern | */
|
792 | 8e65b7c0 | David S. Ahern | if (td->ctrl & TD_CTRL_IOS) {
|
793 | 8e65b7c0 | David S. Ahern | token = td->buffer; |
794 | 8e65b7c0 | David S. Ahern | isoc = 1;
|
795 | 8e65b7c0 | David S. Ahern | } else {
|
796 | 8e65b7c0 | David S. Ahern | token = td->token; |
797 | 8e65b7c0 | David S. Ahern | isoc = 0;
|
798 | 8e65b7c0 | David S. Ahern | } |
799 | 8e65b7c0 | David S. Ahern | |
800 | 8e65b7c0 | David S. Ahern | async = uhci_async_find_td(s, addr, token); |
801 | 54f254f9 | aliguori | if (async) {
|
802 | 54f254f9 | aliguori | /* Already submitted */
|
803 | a145ea51 | aliguori | async->valid = 32;
|
804 | 54f254f9 | aliguori | |
805 | 54f254f9 | aliguori | if (!async->done)
|
806 | 54f254f9 | aliguori | return 1; |
807 | 54f254f9 | aliguori | |
808 | 54f254f9 | aliguori | uhci_async_unlink(s, async); |
809 | 54f254f9 | aliguori | goto done;
|
810 | 54f254f9 | aliguori | } |
811 | 54f254f9 | aliguori | |
812 | 54f254f9 | aliguori | /* Allocate new packet */
|
813 | 54f254f9 | aliguori | async = uhci_async_alloc(s); |
814 | 54f254f9 | aliguori | if (!async)
|
815 | 54f254f9 | aliguori | return 1; |
816 | 54f254f9 | aliguori | |
817 | 8e65b7c0 | David S. Ahern | /* valid needs to be large enough to handle 10 frame delay
|
818 | 8e65b7c0 | David S. Ahern | * for initial isochronous requests
|
819 | 8e65b7c0 | David S. Ahern | */
|
820 | 8e65b7c0 | David S. Ahern | async->valid = 32;
|
821 | 54f254f9 | aliguori | async->td = addr; |
822 | 8e65b7c0 | David S. Ahern | async->token = token; |
823 | 8e65b7c0 | David S. Ahern | async->isoc = isoc; |
824 | 54f254f9 | aliguori | |
825 | 54f254f9 | aliguori | max_len = ((td->token >> 21) + 1) & 0x7ff; |
826 | 54f254f9 | aliguori | pid = td->token & 0xff;
|
827 | 54f254f9 | aliguori | |
828 | 4f4321c1 | Gerd Hoffmann | usb_packet_setup(&async->packet, pid, (td->token >> 8) & 0x7f, |
829 | 4f4321c1 | Gerd Hoffmann | (td->token >> 15) & 0xf); |
830 | df5e66ee | Gerd Hoffmann | qemu_sglist_add(&async->sgl, td->buffer, max_len); |
831 | df5e66ee | Gerd Hoffmann | usb_packet_map(&async->packet, &async->sgl); |
832 | 54f254f9 | aliguori | |
833 | 54f254f9 | aliguori | switch(pid) {
|
834 | 54f254f9 | aliguori | case USB_TOKEN_OUT:
|
835 | 54f254f9 | aliguori | case USB_TOKEN_SETUP:
|
836 | 5d808245 | aurel32 | len = uhci_broadcast_packet(s, &async->packet); |
837 | 5d808245 | aurel32 | if (len >= 0) |
838 | 5d808245 | aurel32 | len = max_len; |
839 | 54f254f9 | aliguori | break;
|
840 | 54f254f9 | aliguori | |
841 | 54f254f9 | aliguori | case USB_TOKEN_IN:
|
842 | 5d808245 | aurel32 | len = uhci_broadcast_packet(s, &async->packet); |
843 | 54f254f9 | aliguori | break;
|
844 | 54f254f9 | aliguori | |
845 | 54f254f9 | aliguori | default:
|
846 | 54f254f9 | aliguori | /* invalid pid : frame interrupted */
|
847 | 54f254f9 | aliguori | uhci_async_free(s, async); |
848 | 54f254f9 | aliguori | s->status |= UHCI_STS_HCPERR; |
849 | 54f254f9 | aliguori | uhci_update_irq(s); |
850 | 54f254f9 | aliguori | return -1; |
851 | 54f254f9 | aliguori | } |
852 | 54f254f9 | aliguori | |
853 | 5d808245 | aurel32 | if (len == USB_RET_ASYNC) {
|
854 | 54f254f9 | aliguori | uhci_async_link(s, async); |
855 | 54f254f9 | aliguori | return 2; |
856 | 54f254f9 | aliguori | } |
857 | 54f254f9 | aliguori | |
858 | 4f4321c1 | Gerd Hoffmann | async->packet.result = len; |
859 | 54f254f9 | aliguori | |
860 | 54f254f9 | aliguori | done:
|
861 | 5d808245 | aurel32 | len = uhci_complete_td(s, td, async, int_mask); |
862 | df5e66ee | Gerd Hoffmann | usb_packet_unmap(&async->packet); |
863 | 54f254f9 | aliguori | uhci_async_free(s, async); |
864 | 5d808245 | aurel32 | return len;
|
865 | 54f254f9 | aliguori | } |
866 | 54f254f9 | aliguori | |
867 | d47e59b8 | Hans de Goede | static void uhci_async_complete(USBPort *port, USBPacket *packet) |
868 | 4d611c9a | pbrook | { |
869 | 7b5a44c5 | Gerd Hoffmann | UHCIAsync *async = container_of(packet, UHCIAsync, packet); |
870 | 7b5a44c5 | Gerd Hoffmann | UHCIState *s = async->uhci; |
871 | 54f254f9 | aliguori | |
872 | d0f2c4c6 | malc | DPRINTF("uhci: async complete. td 0x%x token 0x%x\n", async->td, async->token);
|
873 | 54f254f9 | aliguori | |
874 | 8e65b7c0 | David S. Ahern | if (async->isoc) {
|
875 | 8e65b7c0 | David S. Ahern | UHCI_TD td; |
876 | 8e65b7c0 | David S. Ahern | uint32_t link = async->td; |
877 | 8e65b7c0 | David S. Ahern | uint32_t int_mask = 0, val;
|
878 | d4c4e6fd | Blue Swirl | |
879 | fff23ee9 | David Gibson | pci_dma_read(&s->dev, link & ~0xf, (uint8_t *) &td, sizeof(td)); |
880 | 8e65b7c0 | David S. Ahern | le32_to_cpus(&td.link); |
881 | 8e65b7c0 | David S. Ahern | le32_to_cpus(&td.ctrl); |
882 | 8e65b7c0 | David S. Ahern | le32_to_cpus(&td.token); |
883 | 8e65b7c0 | David S. Ahern | le32_to_cpus(&td.buffer); |
884 | 8e65b7c0 | David S. Ahern | |
885 | 8e65b7c0 | David S. Ahern | uhci_async_unlink(s, async); |
886 | d4c4e6fd | Blue Swirl | uhci_complete_td(s, &td, async, &int_mask); |
887 | 8e65b7c0 | David S. Ahern | s->pending_int_mask |= int_mask; |
888 | 54f254f9 | aliguori | |
889 | 8e65b7c0 | David S. Ahern | /* update the status bits of the TD */
|
890 | 8e65b7c0 | David S. Ahern | val = cpu_to_le32(td.ctrl); |
891 | fff23ee9 | David Gibson | pci_dma_write(&s->dev, (link & ~0xf) + 4, |
892 | fff23ee9 | David Gibson | (const uint8_t *)&val, sizeof(val)); |
893 | 8e65b7c0 | David S. Ahern | uhci_async_free(s, async); |
894 | 8e65b7c0 | David S. Ahern | } else {
|
895 | 8e65b7c0 | David S. Ahern | async->done = 1;
|
896 | 8e65b7c0 | David S. Ahern | uhci_process_frame(s); |
897 | 8e65b7c0 | David S. Ahern | } |
898 | 54f254f9 | aliguori | } |
899 | 54f254f9 | aliguori | |
900 | 54f254f9 | aliguori | static int is_valid(uint32_t link) |
901 | 54f254f9 | aliguori | { |
902 | 54f254f9 | aliguori | return (link & 1) == 0; |
903 | 54f254f9 | aliguori | } |
904 | 54f254f9 | aliguori | |
905 | 54f254f9 | aliguori | static int is_qh(uint32_t link) |
906 | 54f254f9 | aliguori | { |
907 | 54f254f9 | aliguori | return (link & 2) != 0; |
908 | 54f254f9 | aliguori | } |
909 | 54f254f9 | aliguori | |
910 | 54f254f9 | aliguori | static int depth_first(uint32_t link) |
911 | 54f254f9 | aliguori | { |
912 | 54f254f9 | aliguori | return (link & 4) != 0; |
913 | 54f254f9 | aliguori | } |
914 | 54f254f9 | aliguori | |
915 | 54f254f9 | aliguori | /* QH DB used for detecting QH loops */
|
916 | 54f254f9 | aliguori | #define UHCI_MAX_QUEUES 128 |
917 | 54f254f9 | aliguori | typedef struct { |
918 | 54f254f9 | aliguori | uint32_t addr[UHCI_MAX_QUEUES]; |
919 | 54f254f9 | aliguori | int count;
|
920 | 54f254f9 | aliguori | } QhDb; |
921 | 54f254f9 | aliguori | |
922 | 54f254f9 | aliguori | static void qhdb_reset(QhDb *db) |
923 | 54f254f9 | aliguori | { |
924 | 54f254f9 | aliguori | db->count = 0;
|
925 | 54f254f9 | aliguori | } |
926 | 54f254f9 | aliguori | |
927 | 54f254f9 | aliguori | /* Add QH to DB. Returns 1 if already present or DB is full. */
|
928 | 54f254f9 | aliguori | static int qhdb_insert(QhDb *db, uint32_t addr) |
929 | 54f254f9 | aliguori | { |
930 | 54f254f9 | aliguori | int i;
|
931 | 54f254f9 | aliguori | for (i = 0; i < db->count; i++) |
932 | 54f254f9 | aliguori | if (db->addr[i] == addr)
|
933 | 54f254f9 | aliguori | return 1; |
934 | 54f254f9 | aliguori | |
935 | 54f254f9 | aliguori | if (db->count >= UHCI_MAX_QUEUES)
|
936 | 54f254f9 | aliguori | return 1; |
937 | 54f254f9 | aliguori | |
938 | 54f254f9 | aliguori | db->addr[db->count++] = addr; |
939 | 54f254f9 | aliguori | return 0; |
940 | 54f254f9 | aliguori | } |
941 | 54f254f9 | aliguori | |
942 | 54f254f9 | aliguori | static void uhci_process_frame(UHCIState *s) |
943 | 54f254f9 | aliguori | { |
944 | 54f254f9 | aliguori | uint32_t frame_addr, link, old_td_ctrl, val, int_mask; |
945 | 54f254f9 | aliguori | uint32_t curr_qh; |
946 | 54f254f9 | aliguori | int cnt, ret;
|
947 | 4d611c9a | pbrook | UHCI_TD td; |
948 | 54f254f9 | aliguori | UHCI_QH qh; |
949 | 54f254f9 | aliguori | QhDb qhdb; |
950 | 4d611c9a | pbrook | |
951 | 54f254f9 | aliguori | frame_addr = s->fl_base_addr + ((s->frnum & 0x3ff) << 2); |
952 | 54f254f9 | aliguori | |
953 | d0f2c4c6 | malc | DPRINTF("uhci: processing frame %d addr 0x%x\n" , s->frnum, frame_addr);
|
954 | 54f254f9 | aliguori | |
955 | fff23ee9 | David Gibson | pci_dma_read(&s->dev, frame_addr, (uint8_t *)&link, 4);
|
956 | 54f254f9 | aliguori | le32_to_cpus(&link); |
957 | b9dc033c | balrog | |
958 | 54f254f9 | aliguori | int_mask = 0;
|
959 | 54f254f9 | aliguori | curr_qh = 0;
|
960 | 54f254f9 | aliguori | |
961 | 54f254f9 | aliguori | qhdb_reset(&qhdb); |
962 | 54f254f9 | aliguori | |
963 | 54f254f9 | aliguori | for (cnt = FRAME_MAX_LOOPS; is_valid(link) && cnt; cnt--) {
|
964 | 54f254f9 | aliguori | if (is_qh(link)) {
|
965 | 54f254f9 | aliguori | /* QH */
|
966 | 54f254f9 | aliguori | |
967 | 54f254f9 | aliguori | if (qhdb_insert(&qhdb, link)) {
|
968 | 54f254f9 | aliguori | /*
|
969 | 54f254f9 | aliguori | * We're going in circles. Which is not a bug because
|
970 | 54f254f9 | aliguori | * HCD is allowed to do that as part of the BW management.
|
971 | 54f254f9 | aliguori | * In our case though it makes no sense to spin here. Sync transations
|
972 | 54f254f9 | aliguori | * are already done, and async completion handler will re-process
|
973 | 54f254f9 | aliguori | * the frame when something is ready.
|
974 | 54f254f9 | aliguori | */
|
975 | d0f2c4c6 | malc | DPRINTF("uhci: detected loop. qh 0x%x\n", link);
|
976 | 54f254f9 | aliguori | break;
|
977 | 54f254f9 | aliguori | } |
978 | 54f254f9 | aliguori | |
979 | fff23ee9 | David Gibson | pci_dma_read(&s->dev, link & ~0xf, (uint8_t *) &qh, sizeof(qh)); |
980 | 54f254f9 | aliguori | le32_to_cpus(&qh.link); |
981 | 54f254f9 | aliguori | le32_to_cpus(&qh.el_link); |
982 | 54f254f9 | aliguori | |
983 | d0f2c4c6 | malc | DPRINTF("uhci: QH 0x%x load. link 0x%x elink 0x%x\n",
|
984 | 54f254f9 | aliguori | link, qh.link, qh.el_link); |
985 | 54f254f9 | aliguori | |
986 | 54f254f9 | aliguori | if (!is_valid(qh.el_link)) {
|
987 | 54f254f9 | aliguori | /* QH w/o elements */
|
988 | 54f254f9 | aliguori | curr_qh = 0;
|
989 | 54f254f9 | aliguori | link = qh.link; |
990 | 54f254f9 | aliguori | } else {
|
991 | 54f254f9 | aliguori | /* QH with elements */
|
992 | 54f254f9 | aliguori | curr_qh = link; |
993 | 54f254f9 | aliguori | link = qh.el_link; |
994 | 54f254f9 | aliguori | } |
995 | 54f254f9 | aliguori | continue;
|
996 | 54f254f9 | aliguori | } |
997 | 54f254f9 | aliguori | |
998 | 54f254f9 | aliguori | /* TD */
|
999 | fff23ee9 | David Gibson | pci_dma_read(&s->dev, link & ~0xf, (uint8_t *) &td, sizeof(td)); |
1000 | b9dc033c | balrog | le32_to_cpus(&td.link); |
1001 | b9dc033c | balrog | le32_to_cpus(&td.ctrl); |
1002 | b9dc033c | balrog | le32_to_cpus(&td.token); |
1003 | b9dc033c | balrog | le32_to_cpus(&td.buffer); |
1004 | b9dc033c | balrog | |
1005 | d0f2c4c6 | malc | DPRINTF("uhci: TD 0x%x load. link 0x%x ctrl 0x%x token 0x%x qh 0x%x\n",
|
1006 | 54f254f9 | aliguori | link, td.link, td.ctrl, td.token, curr_qh); |
1007 | 54f254f9 | aliguori | |
1008 | 54f254f9 | aliguori | old_td_ctrl = td.ctrl; |
1009 | 54f254f9 | aliguori | ret = uhci_handle_td(s, link, &td, &int_mask); |
1010 | b9dc033c | balrog | if (old_td_ctrl != td.ctrl) {
|
1011 | 54f254f9 | aliguori | /* update the status bits of the TD */
|
1012 | b9dc033c | balrog | val = cpu_to_le32(td.ctrl); |
1013 | fff23ee9 | David Gibson | pci_dma_write(&s->dev, (link & ~0xf) + 4, |
1014 | fff23ee9 | David Gibson | (const uint8_t *)&val, sizeof(val)); |
1015 | b9dc033c | balrog | } |
1016 | 54f254f9 | aliguori | |
1017 | 54f254f9 | aliguori | if (ret < 0) { |
1018 | 54f254f9 | aliguori | /* interrupted frame */
|
1019 | 54f254f9 | aliguori | break;
|
1020 | b9dc033c | balrog | } |
1021 | b9dc033c | balrog | |
1022 | 54f254f9 | aliguori | if (ret == 2 || ret == 1) { |
1023 | d0f2c4c6 | malc | DPRINTF("uhci: TD 0x%x %s. link 0x%x ctrl 0x%x token 0x%x qh 0x%x\n",
|
1024 | 54f254f9 | aliguori | link, ret == 2 ? "pend" : "skip", |
1025 | 54f254f9 | aliguori | td.link, td.ctrl, td.token, curr_qh); |
1026 | b9dc033c | balrog | |
1027 | 54f254f9 | aliguori | link = curr_qh ? qh.link : td.link; |
1028 | 54f254f9 | aliguori | continue;
|
1029 | 4d611c9a | pbrook | } |
1030 | 54f254f9 | aliguori | |
1031 | 54f254f9 | aliguori | /* completed TD */
|
1032 | 54f254f9 | aliguori | |
1033 | d0f2c4c6 | malc | DPRINTF("uhci: TD 0x%x done. link 0x%x ctrl 0x%x token 0x%x qh 0x%x\n",
|
1034 | 54f254f9 | aliguori | link, td.link, td.ctrl, td.token, curr_qh); |
1035 | 54f254f9 | aliguori | |
1036 | 54f254f9 | aliguori | link = td.link; |
1037 | 54f254f9 | aliguori | |
1038 | 54f254f9 | aliguori | if (curr_qh) {
|
1039 | 54f254f9 | aliguori | /* update QH element link */
|
1040 | 54f254f9 | aliguori | qh.el_link = link; |
1041 | 4d611c9a | pbrook | val = cpu_to_le32(qh.el_link); |
1042 | fff23ee9 | David Gibson | pci_dma_write(&s->dev, (curr_qh & ~0xf) + 4, |
1043 | fff23ee9 | David Gibson | (const uint8_t *)&val, sizeof(val)); |
1044 | 54f254f9 | aliguori | |
1045 | 54f254f9 | aliguori | if (!depth_first(link)) {
|
1046 | 54f254f9 | aliguori | /* done with this QH */
|
1047 | 54f254f9 | aliguori | |
1048 | d0f2c4c6 | malc | DPRINTF("uhci: QH 0x%x done. link 0x%x elink 0x%x\n",
|
1049 | 54f254f9 | aliguori | curr_qh, qh.link, qh.el_link); |
1050 | 54f254f9 | aliguori | |
1051 | 54f254f9 | aliguori | curr_qh = 0;
|
1052 | 54f254f9 | aliguori | link = qh.link; |
1053 | 54f254f9 | aliguori | } |
1054 | 4d611c9a | pbrook | } |
1055 | 54f254f9 | aliguori | |
1056 | 54f254f9 | aliguori | /* go to the next entry */
|
1057 | 4d611c9a | pbrook | } |
1058 | 54f254f9 | aliguori | |
1059 | 8e65b7c0 | David S. Ahern | s->pending_int_mask |= int_mask; |
1060 | 4d611c9a | pbrook | } |
1061 | 4d611c9a | pbrook | |
1062 | bb36d470 | bellard | static void uhci_frame_timer(void *opaque) |
1063 | bb36d470 | bellard | { |
1064 | bb36d470 | bellard | UHCIState *s = opaque; |
1065 | 8e65b7c0 | David S. Ahern | |
1066 | 8e65b7c0 | David S. Ahern | /* prepare the timer for the next frame */
|
1067 | 8e65b7c0 | David S. Ahern | s->expire_time += (get_ticks_per_sec() / FRAME_TIMER_FREQ); |
1068 | bb36d470 | bellard | |
1069 | bb36d470 | bellard | if (!(s->cmd & UHCI_CMD_RS)) {
|
1070 | 54f254f9 | aliguori | /* Full stop */
|
1071 | bb36d470 | bellard | qemu_del_timer(s->frame_timer); |
1072 | 52328140 | bellard | /* set hchalted bit in status - UHCI11D 2.1.2 */
|
1073 | 52328140 | bellard | s->status |= UHCI_STS_HCHALTED; |
1074 | 6f382b5e | aliguori | |
1075 | d0f2c4c6 | malc | DPRINTF("uhci: halted\n");
|
1076 | bb36d470 | bellard | return;
|
1077 | bb36d470 | bellard | } |
1078 | 54f254f9 | aliguori | |
1079 | 54f254f9 | aliguori | /* Complete the previous frame */
|
1080 | 4d611c9a | pbrook | if (s->pending_int_mask) {
|
1081 | 4d611c9a | pbrook | s->status2 |= s->pending_int_mask; |
1082 | 54f254f9 | aliguori | s->status |= UHCI_STS_USBINT; |
1083 | 4d611c9a | pbrook | uhci_update_irq(s); |
1084 | 4d611c9a | pbrook | } |
1085 | 8e65b7c0 | David S. Ahern | s->pending_int_mask = 0;
|
1086 | b9dc033c | balrog | |
1087 | 54f254f9 | aliguori | /* Start new frame */
|
1088 | 54f254f9 | aliguori | s->frnum = (s->frnum + 1) & 0x7ff; |
1089 | 54f254f9 | aliguori | |
1090 | d0f2c4c6 | malc | DPRINTF("uhci: new frame #%u\n" , s->frnum);
|
1091 | 54f254f9 | aliguori | |
1092 | 54f254f9 | aliguori | uhci_async_validate_begin(s); |
1093 | 54f254f9 | aliguori | |
1094 | 54f254f9 | aliguori | uhci_process_frame(s); |
1095 | 54f254f9 | aliguori | |
1096 | 54f254f9 | aliguori | uhci_async_validate_end(s); |
1097 | b9dc033c | balrog | |
1098 | 8e65b7c0 | David S. Ahern | qemu_mod_timer(s->frame_timer, s->expire_time); |
1099 | bb36d470 | bellard | } |
1100 | bb36d470 | bellard | |
1101 | a03f66e4 | Avi Kivity | static const MemoryRegionPortio uhci_portio[] = { |
1102 | a03f66e4 | Avi Kivity | { 0, 32, 2, .write = uhci_ioport_writew, }, |
1103 | a03f66e4 | Avi Kivity | { 0, 32, 2, .read = uhci_ioport_readw, }, |
1104 | a03f66e4 | Avi Kivity | { 0, 32, 4, .write = uhci_ioport_writel, }, |
1105 | a03f66e4 | Avi Kivity | { 0, 32, 4, .read = uhci_ioport_readl, }, |
1106 | a03f66e4 | Avi Kivity | { 0, 32, 1, .write = uhci_ioport_writeb, }, |
1107 | a03f66e4 | Avi Kivity | { 0, 32, 1, .read = uhci_ioport_readb, }, |
1108 | a03f66e4 | Avi Kivity | PORTIO_END_OF_LIST() |
1109 | a03f66e4 | Avi Kivity | }; |
1110 | a03f66e4 | Avi Kivity | |
1111 | a03f66e4 | Avi Kivity | static const MemoryRegionOps uhci_ioport_ops = { |
1112 | a03f66e4 | Avi Kivity | .old_portio = uhci_portio, |
1113 | a03f66e4 | Avi Kivity | }; |
1114 | bb36d470 | bellard | |
1115 | 0d86d2be | Gerd Hoffmann | static USBPortOps uhci_port_ops = {
|
1116 | 0d86d2be | Gerd Hoffmann | .attach = uhci_attach, |
1117 | 618c169b | Gerd Hoffmann | .detach = uhci_detach, |
1118 | 4706ab6c | Hans de Goede | .child_detach = uhci_child_detach, |
1119 | 9159f679 | Gerd Hoffmann | .wakeup = uhci_wakeup, |
1120 | 13a9a0d3 | Gerd Hoffmann | .complete = uhci_async_complete, |
1121 | 0d86d2be | Gerd Hoffmann | }; |
1122 | 0d86d2be | Gerd Hoffmann | |
1123 | 07771f6f | Gerd Hoffmann | static USBBusOps uhci_bus_ops = {
|
1124 | 07771f6f | Gerd Hoffmann | }; |
1125 | 07771f6f | Gerd Hoffmann | |
1126 | dc638fad | Isaku Yamahata | static int usb_uhci_common_initfn(PCIDevice *dev) |
1127 | bb36d470 | bellard | { |
1128 | dc638fad | Isaku Yamahata | UHCIState *s = DO_UPCAST(UHCIState, dev, dev); |
1129 | 6cf9b6f1 | Gerd Hoffmann | uint8_t *pci_conf = s->dev.config; |
1130 | bb36d470 | bellard | int i;
|
1131 | bb36d470 | bellard | |
1132 | db579e9e | Michael S. Tsirkin | pci_conf[PCI_CLASS_PROG] = 0x00;
|
1133 | db579e9e | Michael S. Tsirkin | /* TODO: reset value should be 0. */
|
1134 | 817e0b6f | Michael S. Tsirkin | pci_conf[PCI_INTERRUPT_PIN] = 4; /* interrupt pin D */ |
1135 | e59d33a7 | Brad Hards | pci_conf[USB_SBRN] = USB_RELEASE_1; // release number
|
1136 | 3b46e624 | ths | |
1137 | 35e4977f | Hans de Goede | if (s->masterbus) {
|
1138 | 35e4977f | Hans de Goede | USBPort *ports[NB_PORTS]; |
1139 | 35e4977f | Hans de Goede | for(i = 0; i < NB_PORTS; i++) { |
1140 | 35e4977f | Hans de Goede | ports[i] = &s->ports[i].port; |
1141 | 35e4977f | Hans de Goede | } |
1142 | 35e4977f | Hans de Goede | if (usb_register_companion(s->masterbus, ports, NB_PORTS,
|
1143 | 35e4977f | Hans de Goede | s->firstport, s, &uhci_port_ops, |
1144 | 35e4977f | Hans de Goede | USB_SPEED_MASK_LOW | USB_SPEED_MASK_FULL) != 0) {
|
1145 | 35e4977f | Hans de Goede | return -1; |
1146 | 35e4977f | Hans de Goede | } |
1147 | 35e4977f | Hans de Goede | } else {
|
1148 | 35e4977f | Hans de Goede | usb_bus_new(&s->bus, &uhci_bus_ops, &s->dev.qdev); |
1149 | 35e4977f | Hans de Goede | for (i = 0; i < NB_PORTS; i++) { |
1150 | 35e4977f | Hans de Goede | usb_register_port(&s->bus, &s->ports[i].port, s, i, &uhci_port_ops, |
1151 | 35e4977f | Hans de Goede | USB_SPEED_MASK_LOW | USB_SPEED_MASK_FULL); |
1152 | 35e4977f | Hans de Goede | } |
1153 | bb36d470 | bellard | } |
1154 | 74475455 | Paolo Bonzini | s->frame_timer = qemu_new_timer_ns(vm_clock, uhci_frame_timer, s); |
1155 | 64e58fe5 | Juan Quintela | s->num_ports_vmstate = NB_PORTS; |
1156 | ddf6583f | Gerd Hoffmann | QTAILQ_INIT(&s->async_pending); |
1157 | bb36d470 | bellard | |
1158 | a08d4367 | Jan Kiszka | qemu_register_reset(uhci_reset, s); |
1159 | bb36d470 | bellard | |
1160 | a03f66e4 | Avi Kivity | memory_region_init_io(&s->io_bar, &uhci_ioport_ops, s, "uhci", 0x20); |
1161 | 38ca0f6d | pbrook | /* Use region 4 for consistency with real hardware. BSD guests seem
|
1162 | 38ca0f6d | pbrook | to rely on this. */
|
1163 | e824b2cc | Avi Kivity | pci_register_bar(&s->dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &s->io_bar);
|
1164 | 6f382b5e | aliguori | |
1165 | 6cf9b6f1 | Gerd Hoffmann | return 0; |
1166 | bb36d470 | bellard | } |
1167 | afcc3cdf | ths | |
1168 | 30235a54 | Huacai Chen | static int usb_uhci_vt82c686b_initfn(PCIDevice *dev) |
1169 | 30235a54 | Huacai Chen | { |
1170 | 30235a54 | Huacai Chen | UHCIState *s = DO_UPCAST(UHCIState, dev, dev); |
1171 | 30235a54 | Huacai Chen | uint8_t *pci_conf = s->dev.config; |
1172 | 30235a54 | Huacai Chen | |
1173 | 30235a54 | Huacai Chen | /* USB misc control 1/2 */
|
1174 | 30235a54 | Huacai Chen | pci_set_long(pci_conf + 0x40,0x00001000); |
1175 | 30235a54 | Huacai Chen | /* PM capability */
|
1176 | 30235a54 | Huacai Chen | pci_set_long(pci_conf + 0x80,0x00020001); |
1177 | 30235a54 | Huacai Chen | /* USB legacy support */
|
1178 | 30235a54 | Huacai Chen | pci_set_long(pci_conf + 0xc0,0x00002000); |
1179 | 30235a54 | Huacai Chen | |
1180 | dc638fad | Isaku Yamahata | return usb_uhci_common_initfn(dev);
|
1181 | 30235a54 | Huacai Chen | } |
1182 | 30235a54 | Huacai Chen | |
1183 | a03f66e4 | Avi Kivity | static int usb_uhci_exit(PCIDevice *dev) |
1184 | a03f66e4 | Avi Kivity | { |
1185 | a03f66e4 | Avi Kivity | UHCIState *s = DO_UPCAST(UHCIState, dev, dev); |
1186 | a03f66e4 | Avi Kivity | |
1187 | a03f66e4 | Avi Kivity | memory_region_destroy(&s->io_bar); |
1188 | a03f66e4 | Avi Kivity | return 0; |
1189 | a03f66e4 | Avi Kivity | } |
1190 | a03f66e4 | Avi Kivity | |
1191 | 1b5a7570 | Gerd Hoffmann | static Property uhci_properties[] = {
|
1192 | 1b5a7570 | Gerd Hoffmann | DEFINE_PROP_STRING("masterbus", UHCIState, masterbus),
|
1193 | 1b5a7570 | Gerd Hoffmann | DEFINE_PROP_UINT32("firstport", UHCIState, firstport, 0), |
1194 | 1b5a7570 | Gerd Hoffmann | DEFINE_PROP_END_OF_LIST(), |
1195 | 1b5a7570 | Gerd Hoffmann | }; |
1196 | 1b5a7570 | Gerd Hoffmann | |
1197 | 6cf9b6f1 | Gerd Hoffmann | static PCIDeviceInfo uhci_info[] = {
|
1198 | 6cf9b6f1 | Gerd Hoffmann | { |
1199 | 556cd098 | Markus Armbruster | .qdev.name = "piix3-usb-uhci",
|
1200 | 6cf9b6f1 | Gerd Hoffmann | .qdev.size = sizeof(UHCIState),
|
1201 | be73cfe2 | Juan Quintela | .qdev.vmsd = &vmstate_uhci, |
1202 | dc638fad | Isaku Yamahata | .init = usb_uhci_common_initfn, |
1203 | a03f66e4 | Avi Kivity | .exit = usb_uhci_exit, |
1204 | dc638fad | Isaku Yamahata | .vendor_id = PCI_VENDOR_ID_INTEL, |
1205 | dc638fad | Isaku Yamahata | .device_id = PCI_DEVICE_ID_INTEL_82371SB_2, |
1206 | dc638fad | Isaku Yamahata | .revision = 0x01,
|
1207 | dc638fad | Isaku Yamahata | .class_id = PCI_CLASS_SERIAL_USB, |
1208 | 1b5a7570 | Gerd Hoffmann | .qdev.props = uhci_properties, |
1209 | 6cf9b6f1 | Gerd Hoffmann | },{ |
1210 | 556cd098 | Markus Armbruster | .qdev.name = "piix4-usb-uhci",
|
1211 | 6cf9b6f1 | Gerd Hoffmann | .qdev.size = sizeof(UHCIState),
|
1212 | be73cfe2 | Juan Quintela | .qdev.vmsd = &vmstate_uhci, |
1213 | dc638fad | Isaku Yamahata | .init = usb_uhci_common_initfn, |
1214 | a03f66e4 | Avi Kivity | .exit = usb_uhci_exit, |
1215 | dc638fad | Isaku Yamahata | .vendor_id = PCI_VENDOR_ID_INTEL, |
1216 | dc638fad | Isaku Yamahata | .device_id = PCI_DEVICE_ID_INTEL_82371AB_2, |
1217 | dc638fad | Isaku Yamahata | .revision = 0x01,
|
1218 | dc638fad | Isaku Yamahata | .class_id = PCI_CLASS_SERIAL_USB, |
1219 | 1b5a7570 | Gerd Hoffmann | .qdev.props = uhci_properties, |
1220 | 6cf9b6f1 | Gerd Hoffmann | },{ |
1221 | 30235a54 | Huacai Chen | .qdev.name = "vt82c686b-usb-uhci",
|
1222 | 30235a54 | Huacai Chen | .qdev.size = sizeof(UHCIState),
|
1223 | 30235a54 | Huacai Chen | .qdev.vmsd = &vmstate_uhci, |
1224 | 30235a54 | Huacai Chen | .init = usb_uhci_vt82c686b_initfn, |
1225 | a03f66e4 | Avi Kivity | .exit = usb_uhci_exit, |
1226 | dc638fad | Isaku Yamahata | .vendor_id = PCI_VENDOR_ID_VIA, |
1227 | dc638fad | Isaku Yamahata | .device_id = PCI_DEVICE_ID_VIA_UHCI, |
1228 | dc638fad | Isaku Yamahata | .revision = 0x01,
|
1229 | dc638fad | Isaku Yamahata | .class_id = PCI_CLASS_SERIAL_USB, |
1230 | 1b5a7570 | Gerd Hoffmann | .qdev.props = uhci_properties, |
1231 | 1b5a7570 | Gerd Hoffmann | },{ |
1232 | 1b5a7570 | Gerd Hoffmann | .qdev.name = "ich9-usb-uhci1",
|
1233 | 1b5a7570 | Gerd Hoffmann | .qdev.size = sizeof(UHCIState),
|
1234 | 1b5a7570 | Gerd Hoffmann | .qdev.vmsd = &vmstate_uhci, |
1235 | 1b5a7570 | Gerd Hoffmann | .init = usb_uhci_common_initfn, |
1236 | 1b5a7570 | Gerd Hoffmann | .vendor_id = PCI_VENDOR_ID_INTEL, |
1237 | 1b5a7570 | Gerd Hoffmann | .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI1, |
1238 | 1b5a7570 | Gerd Hoffmann | .revision = 0x03,
|
1239 | 1b5a7570 | Gerd Hoffmann | .class_id = PCI_CLASS_SERIAL_USB, |
1240 | 1b5a7570 | Gerd Hoffmann | .qdev.props = uhci_properties, |
1241 | 1b5a7570 | Gerd Hoffmann | },{ |
1242 | 1b5a7570 | Gerd Hoffmann | .qdev.name = "ich9-usb-uhci2",
|
1243 | 1b5a7570 | Gerd Hoffmann | .qdev.size = sizeof(UHCIState),
|
1244 | 1b5a7570 | Gerd Hoffmann | .qdev.vmsd = &vmstate_uhci, |
1245 | 1b5a7570 | Gerd Hoffmann | .init = usb_uhci_common_initfn, |
1246 | 1b5a7570 | Gerd Hoffmann | .vendor_id = PCI_VENDOR_ID_INTEL, |
1247 | 1b5a7570 | Gerd Hoffmann | .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI2, |
1248 | 1b5a7570 | Gerd Hoffmann | .revision = 0x03,
|
1249 | 1b5a7570 | Gerd Hoffmann | .class_id = PCI_CLASS_SERIAL_USB, |
1250 | 1b5a7570 | Gerd Hoffmann | .qdev.props = uhci_properties, |
1251 | 1b5a7570 | Gerd Hoffmann | },{ |
1252 | 1b5a7570 | Gerd Hoffmann | .qdev.name = "ich9-usb-uhci3",
|
1253 | 1b5a7570 | Gerd Hoffmann | .qdev.size = sizeof(UHCIState),
|
1254 | 1b5a7570 | Gerd Hoffmann | .qdev.vmsd = &vmstate_uhci, |
1255 | 1b5a7570 | Gerd Hoffmann | .init = usb_uhci_common_initfn, |
1256 | 1b5a7570 | Gerd Hoffmann | .vendor_id = PCI_VENDOR_ID_INTEL, |
1257 | 1b5a7570 | Gerd Hoffmann | .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI3, |
1258 | 1b5a7570 | Gerd Hoffmann | .revision = 0x03,
|
1259 | 1b5a7570 | Gerd Hoffmann | .class_id = PCI_CLASS_SERIAL_USB, |
1260 | 1b5a7570 | Gerd Hoffmann | .qdev.props = uhci_properties, |
1261 | 30235a54 | Huacai Chen | },{ |
1262 | 6cf9b6f1 | Gerd Hoffmann | /* end of list */
|
1263 | afcc3cdf | ths | } |
1264 | 6cf9b6f1 | Gerd Hoffmann | }; |
1265 | afcc3cdf | ths | |
1266 | 6cf9b6f1 | Gerd Hoffmann | static void uhci_register(void) |
1267 | 6cf9b6f1 | Gerd Hoffmann | { |
1268 | 6cf9b6f1 | Gerd Hoffmann | pci_qdev_register_many(uhci_info); |
1269 | 6cf9b6f1 | Gerd Hoffmann | } |
1270 | 6cf9b6f1 | Gerd Hoffmann | device_init(uhci_register); |
1271 | afcc3cdf | ths | |
1272 | 6cf9b6f1 | Gerd Hoffmann | void usb_uhci_piix3_init(PCIBus *bus, int devfn) |
1273 | 6cf9b6f1 | Gerd Hoffmann | { |
1274 | 556cd098 | Markus Armbruster | pci_create_simple(bus, devfn, "piix3-usb-uhci");
|
1275 | 6cf9b6f1 | Gerd Hoffmann | } |
1276 | 54f254f9 | aliguori | |
1277 | 6cf9b6f1 | Gerd Hoffmann | void usb_uhci_piix4_init(PCIBus *bus, int devfn) |
1278 | 6cf9b6f1 | Gerd Hoffmann | { |
1279 | 556cd098 | Markus Armbruster | pci_create_simple(bus, devfn, "piix4-usb-uhci");
|
1280 | afcc3cdf | ths | } |
1281 | 30235a54 | Huacai Chen | |
1282 | 30235a54 | Huacai Chen | void usb_uhci_vt82c686b_init(PCIBus *bus, int devfn) |
1283 | 30235a54 | Huacai Chen | { |
1284 | 30235a54 | Huacai Chen | pci_create_simple(bus, devfn, "vt82c686b-usb-uhci");
|
1285 | 30235a54 | Huacai Chen | } |