root / dyngen-exec.h @ e00c1e71
History | View | Annotate | Download (9.1 kB)
1 | 79638566 | bellard | /*
|
---|---|---|---|
2 | 79638566 | bellard | * dyngen defines for micro operation code
|
3 | 79638566 | bellard | *
|
4 | 79638566 | bellard | * Copyright (c) 2003 Fabrice Bellard
|
5 | 79638566 | bellard | *
|
6 | 79638566 | bellard | * This library is free software; you can redistribute it and/or
|
7 | 79638566 | bellard | * modify it under the terms of the GNU Lesser General Public
|
8 | 79638566 | bellard | * License as published by the Free Software Foundation; either
|
9 | 79638566 | bellard | * version 2 of the License, or (at your option) any later version.
|
10 | 79638566 | bellard | *
|
11 | 79638566 | bellard | * This library is distributed in the hope that it will be useful,
|
12 | 79638566 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
13 | 79638566 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
14 | 79638566 | bellard | * Lesser General Public License for more details.
|
15 | 79638566 | bellard | *
|
16 | 79638566 | bellard | * You should have received a copy of the GNU Lesser General Public
|
17 | 79638566 | bellard | * License along with this library; if not, write to the Free Software
|
18 | 79638566 | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
19 | 79638566 | bellard | */
|
20 | 67867308 | bellard | #if !defined(__DYNGEN_EXEC_H__)
|
21 | 67867308 | bellard | #define __DYNGEN_EXEC_H__
|
22 | 67867308 | bellard | |
23 | ec530c81 | bellard | /* prevent Solaris from trying to typedef FILE in gcc's
|
24 | ec530c81 | bellard | include/floatingpoint.h which will conflict with the
|
25 | ec530c81 | bellard | definition down below */
|
26 | ec530c81 | bellard | #ifdef __sun__
|
27 | ec530c81 | bellard | #define _FILEDEFED
|
28 | ec530c81 | bellard | #endif
|
29 | ec530c81 | bellard | |
30 | 1e6cae95 | bellard | /* NOTE: standard headers should be used with special care at this
|
31 | 1e6cae95 | bellard | point because host CPU registers are used as global variables. Some
|
32 | 1e6cae95 | bellard | host headers do not allow that. */
|
33 | 513b500f | bellard | #include <stddef.h> |
34 | 513b500f | bellard | |
35 | 79638566 | bellard | typedef unsigned char uint8_t; |
36 | 79638566 | bellard | typedef unsigned short uint16_t; |
37 | 79638566 | bellard | typedef unsigned int uint32_t; |
38 | 74ccb34e | bellard | // Linux/Sparc64 defines uint64_t
|
39 | 74ccb34e | bellard | #if !(defined (__sparc_v9__) && defined(__linux__))
|
40 | 4f2ac237 | bellard | /* XXX may be done for all 64 bits targets ? */
|
41 | cbd669da | ths | #if defined (__x86_64__) || defined(__ia64) || defined(__s390x__) || defined(__alpha__)
|
42 | 4f2ac237 | bellard | typedef unsigned long uint64_t; |
43 | 4f2ac237 | bellard | #else
|
44 | 79638566 | bellard | typedef unsigned long long uint64_t; |
45 | 4f2ac237 | bellard | #endif
|
46 | 74ccb34e | bellard | #endif
|
47 | 79638566 | bellard | |
48 | ec530c81 | bellard | /* if Solaris/__sun__, don't typedef int8_t, as it will be typedef'd
|
49 | ec530c81 | bellard | prior to this and will cause an error in compliation, conflicting
|
50 | ec530c81 | bellard | with /usr/include/sys/int_types.h, line 75 */
|
51 | ec530c81 | bellard | #ifndef __sun__
|
52 | 79638566 | bellard | typedef signed char int8_t; |
53 | ec530c81 | bellard | #endif
|
54 | 79638566 | bellard | typedef signed short int16_t; |
55 | 79638566 | bellard | typedef signed int int32_t; |
56 | 74ccb34e | bellard | // Linux/Sparc64 defines int64_t
|
57 | 74ccb34e | bellard | #if !(defined (__sparc_v9__) && defined(__linux__))
|
58 | cbd669da | ths | #if defined (__x86_64__) || defined(__ia64) || defined(__s390x__) || defined(__alpha__)
|
59 | 4f2ac237 | bellard | typedef signed long int64_t; |
60 | 4f2ac237 | bellard | #else
|
61 | 79638566 | bellard | typedef signed long long int64_t; |
62 | 4f2ac237 | bellard | #endif
|
63 | 74ccb34e | bellard | #endif
|
64 | 79638566 | bellard | |
65 | 1057eaa7 | pbrook | /* XXX: This may be wrong for 64-bit ILP32 hosts. */
|
66 | 1057eaa7 | pbrook | typedef void * host_reg_t; |
67 | 1057eaa7 | pbrook | |
68 | 67867308 | bellard | #define INT8_MIN (-128) |
69 | 67867308 | bellard | #define INT16_MIN (-32767-1) |
70 | 67867308 | bellard | #define INT32_MIN (-2147483647-1) |
71 | 67867308 | bellard | #define INT64_MIN (-(int64_t)(9223372036854775807)-1) |
72 | 67867308 | bellard | #define INT8_MAX (127) |
73 | 67867308 | bellard | #define INT16_MAX (32767) |
74 | 67867308 | bellard | #define INT32_MAX (2147483647) |
75 | 67867308 | bellard | #define INT64_MAX ((int64_t)(9223372036854775807)) |
76 | 67867308 | bellard | #define UINT8_MAX (255) |
77 | 67867308 | bellard | #define UINT16_MAX (65535) |
78 | 67867308 | bellard | #define UINT32_MAX (4294967295U) |
79 | 67867308 | bellard | #define UINT64_MAX ((uint64_t)(18446744073709551615)) |
80 | 67867308 | bellard | |
81 | cce1075c | ths | #ifdef _BSD
|
82 | cce1075c | ths | typedef struct __sFILE FILE; |
83 | cce1075c | ths | #else
|
84 | 79638566 | bellard | typedef struct FILE FILE; |
85 | cce1075c | ths | #endif
|
86 | 79638566 | bellard | extern int fprintf(FILE *, const char *, ...); |
87 | 24c7b0e3 | ths | extern int fputs(const char *, FILE *); |
88 | 79638566 | bellard | extern int printf(const char *, ...); |
89 | 513b500f | bellard | #undef NULL |
90 | 79638566 | bellard | #define NULL 0 |
91 | 79638566 | bellard | |
92 | 522777bb | ths | #if defined(__i386__)
|
93 | 79638566 | bellard | #define AREG0 "ebp" |
94 | 79638566 | bellard | #define AREG1 "ebx" |
95 | 79638566 | bellard | #define AREG2 "esi" |
96 | 79638566 | bellard | #define AREG3 "edi" |
97 | 522777bb | ths | #elif defined(__x86_64__)
|
98 | 43024c6a | ths | #define AREG0 "r14" |
99 | 43024c6a | ths | #define AREG1 "r15" |
100 | bc51c5c9 | bellard | #define AREG2 "r12" |
101 | bc51c5c9 | bellard | #define AREG3 "r13" |
102 | 43024c6a | ths | //#define AREG4 "rbp"
|
103 | 43024c6a | ths | //#define AREG5 "rbx"
|
104 | 522777bb | ths | #elif defined(__powerpc__)
|
105 | 79638566 | bellard | #define AREG0 "r27" |
106 | 79638566 | bellard | #define AREG1 "r24" |
107 | 79638566 | bellard | #define AREG2 "r25" |
108 | 79638566 | bellard | #define AREG3 "r26" |
109 | bf71c9d9 | bellard | /* XXX: suppress this hack */
|
110 | bf71c9d9 | bellard | #if defined(CONFIG_USER_ONLY)
|
111 | 79638566 | bellard | #define AREG4 "r16" |
112 | 79638566 | bellard | #define AREG5 "r17" |
113 | 79638566 | bellard | #define AREG6 "r18" |
114 | 79638566 | bellard | #define AREG7 "r19" |
115 | 79638566 | bellard | #define AREG8 "r20" |
116 | 79638566 | bellard | #define AREG9 "r21" |
117 | 79638566 | bellard | #define AREG10 "r22" |
118 | 79638566 | bellard | #define AREG11 "r23" |
119 | bf71c9d9 | bellard | #endif
|
120 | 522777bb | ths | #elif defined(__arm__)
|
121 | 79638566 | bellard | #define AREG0 "r7" |
122 | 79638566 | bellard | #define AREG1 "r4" |
123 | 79638566 | bellard | #define AREG2 "r5" |
124 | 79638566 | bellard | #define AREG3 "r6" |
125 | f54b3f92 | aurel32 | #elif defined(__hppa__)
|
126 | f54b3f92 | aurel32 | #define AREG0 "r17" |
127 | f54b3f92 | aurel32 | #define AREG1 "r14" |
128 | f54b3f92 | aurel32 | #define AREG2 "r15" |
129 | f54b3f92 | aurel32 | #define AREG3 "r16" |
130 | 522777bb | ths | #elif defined(__mips__)
|
131 | c4b89d18 | ths | #define AREG0 "fp" |
132 | 79638566 | bellard | #define AREG1 "s0" |
133 | 79638566 | bellard | #define AREG2 "s1" |
134 | 79638566 | bellard | #define AREG3 "s2" |
135 | c4b89d18 | ths | #define AREG4 "s3" |
136 | c4b89d18 | ths | #define AREG5 "s4" |
137 | c4b89d18 | ths | #define AREG6 "s5" |
138 | c4b89d18 | ths | #define AREG7 "s6" |
139 | c4b89d18 | ths | #define AREG8 "s7" |
140 | 522777bb | ths | #elif defined(__sparc__)
|
141 | fdbb4691 | bellard | #ifdef HOST_SOLARIS
|
142 | fdbb4691 | bellard | #define AREG0 "g2" |
143 | fdbb4691 | bellard | #define AREG1 "g3" |
144 | fdbb4691 | bellard | #define AREG2 "g4" |
145 | fdbb4691 | bellard | #define AREG3 "g5" |
146 | fdbb4691 | bellard | #define AREG4 "g6" |
147 | fdbb4691 | bellard | #else
|
148 | 74ccb34e | bellard | #ifdef __sparc_v9__
|
149 | 74ccb34e | bellard | #define AREG0 "g1" |
150 | 74ccb34e | bellard | #define AREG1 "g4" |
151 | 74ccb34e | bellard | #define AREG2 "g5" |
152 | 74ccb34e | bellard | #define AREG3 "g7" |
153 | 74ccb34e | bellard | #else
|
154 | 79638566 | bellard | #define AREG0 "g6" |
155 | 79638566 | bellard | #define AREG1 "g1" |
156 | 79638566 | bellard | #define AREG2 "g2" |
157 | 79638566 | bellard | #define AREG3 "g3" |
158 | 79638566 | bellard | #define AREG4 "l0" |
159 | 79638566 | bellard | #define AREG5 "l1" |
160 | 79638566 | bellard | #define AREG6 "l2" |
161 | 79638566 | bellard | #define AREG7 "l3" |
162 | 79638566 | bellard | #define AREG8 "l4" |
163 | 79638566 | bellard | #define AREG9 "l5" |
164 | 79638566 | bellard | #define AREG10 "l6" |
165 | 79638566 | bellard | #define AREG11 "l7" |
166 | fdbb4691 | bellard | #endif
|
167 | 74ccb34e | bellard | #endif
|
168 | 522777bb | ths | #elif defined(__s390__)
|
169 | 79638566 | bellard | #define AREG0 "r10" |
170 | 79638566 | bellard | #define AREG1 "r7" |
171 | 79638566 | bellard | #define AREG2 "r8" |
172 | 79638566 | bellard | #define AREG3 "r9" |
173 | 522777bb | ths | #elif defined(__alpha__)
|
174 | 79638566 | bellard | /* Note $15 is the frame pointer, so anything in op-i386.c that would
|
175 | 79638566 | bellard | require a frame pointer, like alloca, would probably loose. */
|
176 | 79638566 | bellard | #define AREG0 "$15" |
177 | 79638566 | bellard | #define AREG1 "$9" |
178 | 79638566 | bellard | #define AREG2 "$10" |
179 | 79638566 | bellard | #define AREG3 "$11" |
180 | 79638566 | bellard | #define AREG4 "$12" |
181 | 79638566 | bellard | #define AREG5 "$13" |
182 | 79638566 | bellard | #define AREG6 "$14" |
183 | 522777bb | ths | #elif defined(__mc68000)
|
184 | 38e584a0 | bellard | #define AREG0 "%a5" |
185 | 38e584a0 | bellard | #define AREG1 "%a4" |
186 | 38e584a0 | bellard | #define AREG2 "%d7" |
187 | 38e584a0 | bellard | #define AREG3 "%d6" |
188 | 38e584a0 | bellard | #define AREG4 "%d5" |
189 | 522777bb | ths | #elif defined(__ia64__)
|
190 | b8076a74 | bellard | #define AREG0 "r7" |
191 | b8076a74 | bellard | #define AREG1 "r4" |
192 | b8076a74 | bellard | #define AREG2 "r5" |
193 | b8076a74 | bellard | #define AREG3 "r6" |
194 | 522777bb | ths | #else
|
195 | 522777bb | ths | #error unsupported CPU
|
196 | 79638566 | bellard | #endif
|
197 | 79638566 | bellard | |
198 | 79638566 | bellard | /* force GCC to generate only one epilog at the end of the function */
|
199 | 70ead434 | ths | #define FORCE_RET() __asm__ __volatile__("" : : : "memory"); |
200 | 79638566 | bellard | |
201 | 79638566 | bellard | #ifndef OPPROTO
|
202 | 79638566 | bellard | #define OPPROTO
|
203 | 79638566 | bellard | #endif
|
204 | 79638566 | bellard | |
205 | 79638566 | bellard | #define xglue(x, y) x ## y |
206 | 79638566 | bellard | #define glue(x, y) xglue(x, y)
|
207 | 9621339d | bellard | #define stringify(s) tostring(s)
|
208 | 9621339d | bellard | #define tostring(s) #s |
209 | 79638566 | bellard | |
210 | 76d83bde | ths | #if defined(__alpha__) || defined(__s390__)
|
211 | 79638566 | bellard | /* the symbols are considered non exported so a br immediate is generated */
|
212 | 79638566 | bellard | #define __hidden __attribute__((visibility("hidden"))) |
213 | 79638566 | bellard | #else
|
214 | 5fafdf24 | ths | #define __hidden
|
215 | 79638566 | bellard | #endif
|
216 | 79638566 | bellard | |
217 | cab84d98 | bellard | #if defined(__alpha__)
|
218 | 79638566 | bellard | /* Suggested by Richard Henderson. This will result in code like
|
219 | 79638566 | bellard | ldah $0,__op_param1($29) !gprelhigh
|
220 | 79638566 | bellard | lda $0,__op_param1($0) !gprellow
|
221 | 79638566 | bellard | We can then conveniently change $29 to $31 and adapt the offsets to
|
222 | 79638566 | bellard | emit the appropriate constant. */
|
223 | 79638566 | bellard | extern int __op_param1 __hidden; |
224 | 79638566 | bellard | extern int __op_param2 __hidden; |
225 | 79638566 | bellard | extern int __op_param3 __hidden; |
226 | 79638566 | bellard | #define PARAM1 ({ int _r; asm("" : "=r"(_r) : "0" (&__op_param1)); _r; }) |
227 | 79638566 | bellard | #define PARAM2 ({ int _r; asm("" : "=r"(_r) : "0" (&__op_param2)); _r; }) |
228 | 79638566 | bellard | #define PARAM3 ({ int _r; asm("" : "=r"(_r) : "0" (&__op_param3)); _r; }) |
229 | 76d83bde | ths | #elif defined(__s390__)
|
230 | 76d83bde | ths | extern int __op_param1 __hidden; |
231 | 76d83bde | ths | extern int __op_param2 __hidden; |
232 | 76d83bde | ths | extern int __op_param3 __hidden; |
233 | 76d83bde | ths | #define PARAM1 ({ int _r; asm("bras %0,8; .long " ASM_NAME(__op_param1) "; l %0,0(%0)" : "=r"(_r) : ); _r; }) |
234 | 76d83bde | ths | #define PARAM2 ({ int _r; asm("bras %0,8; .long " ASM_NAME(__op_param2) "; l %0,0(%0)" : "=r"(_r) : ); _r; }) |
235 | 76d83bde | ths | #define PARAM3 ({ int _r; asm("bras %0,8; .long " ASM_NAME(__op_param3) "; l %0,0(%0)" : "=r"(_r) : ); _r; }) |
236 | 79638566 | bellard | #else
|
237 | cab84d98 | bellard | #if defined(__APPLE__)
|
238 | cab84d98 | bellard | static int __op_param1, __op_param2, __op_param3; |
239 | cab84d98 | bellard | #else
|
240 | 79638566 | bellard | extern int __op_param1, __op_param2, __op_param3; |
241 | cab84d98 | bellard | #endif
|
242 | 79638566 | bellard | #define PARAM1 ((long)(&__op_param1)) |
243 | 79638566 | bellard | #define PARAM2 ((long)(&__op_param2)) |
244 | 79638566 | bellard | #define PARAM3 ((long)(&__op_param3)) |
245 | cab84d98 | bellard | #endif /* !defined(__alpha__) */ |
246 | 79638566 | bellard | |
247 | c106152d | bellard | extern int __op_jmp0, __op_jmp1, __op_jmp2, __op_jmp3; |
248 | 9621339d | bellard | |
249 | 9191d4d1 | bellard | #if defined(_WIN32) || defined(__APPLE__)
|
250 | 9df8aa4a | bellard | #define ASM_NAME(x) "_" #x |
251 | 9df8aa4a | bellard | #else
|
252 | 9df8aa4a | bellard | #define ASM_NAME(x) #x |
253 | 9df8aa4a | bellard | #endif
|
254 | 9df8aa4a | bellard | |
255 | 522777bb | ths | #if defined(__i386__)
|
256 | 9621339d | bellard | #define EXIT_TB() asm volatile ("ret") |
257 | 9df8aa4a | bellard | #define GOTO_LABEL_PARAM(n) asm volatile ("jmp " ASM_NAME(__op_gen_label) #n) |
258 | 522777bb | ths | #elif defined(__x86_64__)
|
259 | bc51c5c9 | bellard | #define EXIT_TB() asm volatile ("ret") |
260 | d785e6be | bellard | #define GOTO_LABEL_PARAM(n) asm volatile ("jmp " ASM_NAME(__op_gen_label) #n) |
261 | 522777bb | ths | #elif defined(__powerpc__)
|
262 | 9621339d | bellard | #define EXIT_TB() asm volatile ("blr") |
263 | 9df8aa4a | bellard | #define GOTO_LABEL_PARAM(n) asm volatile ("b " ASM_NAME(__op_gen_label) #n) |
264 | 522777bb | ths | #elif defined(__s390__)
|
265 | 9621339d | bellard | #define EXIT_TB() asm volatile ("br %r14") |
266 | 76d83bde | ths | #define GOTO_LABEL_PARAM(n) asm volatile ("larl %r7,12; l %r7,0(%r7); br %r7; .long " ASM_NAME(__op_gen_label) #n) |
267 | 522777bb | ths | #elif defined(__alpha__)
|
268 | 9621339d | bellard | #define EXIT_TB() asm volatile ("ret") |
269 | 522777bb | ths | #elif defined(__ia64__)
|
270 | 9621339d | bellard | #define EXIT_TB() asm volatile ("br.ret.sptk.many b0;;") |
271 | b8076a74 | bellard | #define GOTO_LABEL_PARAM(n) asm volatile ("br.sptk.many " \ |
272 | b8076a74 | bellard | ASM_NAME(__op_gen_label) #n)
|
273 | 522777bb | ths | #elif defined(__sparc__)
|
274 | fdbb4691 | bellard | #define EXIT_TB() asm volatile ("jmpl %i0 + 8, %g0; nop") |
275 | fdbb4691 | bellard | #define GOTO_LABEL_PARAM(n) asm volatile ("ba " ASM_NAME(__op_gen_label) #n ";nop") |
276 | 522777bb | ths | #elif defined(__arm__)
|
277 | 9621339d | bellard | #define EXIT_TB() asm volatile ("b exec_loop") |
278 | ae200d10 | bellard | #define GOTO_LABEL_PARAM(n) asm volatile ("b " ASM_NAME(__op_gen_label) #n) |
279 | 522777bb | ths | #elif defined(__mc68000)
|
280 | 38e584a0 | bellard | #define EXIT_TB() asm volatile ("rts") |
281 | 522777bb | ths | #elif defined(__mips__)
|
282 | c4b89d18 | ths | #define EXIT_TB() asm volatile ("jr $ra") |
283 | c4b89d18 | ths | #define GOTO_LABEL_PARAM(n) asm volatile (".set noat; la $1, " ASM_NAME(__op_gen_label) #n "; jr $1; .set at") |
284 | f54b3f92 | aurel32 | #elif defined(__hppa__)
|
285 | f54b3f92 | aurel32 | #define GOTO_LABEL_PARAM(n) asm volatile ("b,n " ASM_NAME(__op_gen_label) #n) |
286 | 522777bb | ths | #else
|
287 | 522777bb | ths | #error unsupported CPU
|
288 | c4b89d18 | ths | #endif
|
289 | 67867308 | bellard | |
290 | 9b7b85d2 | pbrook | /* The return address may point to the start of the next instruction.
|
291 | 9b7b85d2 | pbrook | Subtracting one gets us the call instruction itself. */
|
292 | 9b7b85d2 | pbrook | #if defined(__s390__)
|
293 | 9b7b85d2 | pbrook | # define GETPC() ((void*)(((unsigned long)__builtin_return_address(0) & 0x7fffffffUL) - 1)) |
294 | 9b7b85d2 | pbrook | #elif defined(__arm__)
|
295 | 9b7b85d2 | pbrook | /* Thumb return addresses have the low bit set, so we need to subtract two.
|
296 | 9b7b85d2 | pbrook | This is still safe in ARM mode because instructions are 4 bytes. */
|
297 | 9b7b85d2 | pbrook | # define GETPC() ((void *)((unsigned long)__builtin_return_address(0) - 2)) |
298 | 9b7b85d2 | pbrook | #else
|
299 | 9b7b85d2 | pbrook | # define GETPC() ((void *)((unsigned long)__builtin_return_address(0) - 1)) |
300 | 9b7b85d2 | pbrook | #endif
|
301 | 9b7b85d2 | pbrook | |
302 | 67867308 | bellard | #endif /* !defined(__DYNGEN_EXEC_H__) */ |