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Revision e03c902c

IDe03c902cb617414dae49d77a810f6957ff7affac

Added by David Gibson almost 11 years ago

pseries: Fix some small errors in XICS logic

Under certain circumstances the emulation for the pseries "XICS" interrupt
controller was clearing a pending interrupt from the XISR register, without
also clearing the corresponding priority variable. This will cause
problems later when can trigger sanity checks in the under-development
in-kernel XICS implementation.

Signed-off-by: David Gibson <>
Signed-off-by: Alexander Graf <>

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