root / tcg / sparc / tcg-target.h @ e0ca7b94
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1 | 8289b279 | blueswir1 | /*
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2 | 8289b279 | blueswir1 | * Tiny Code Generator for QEMU
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3 | 8289b279 | blueswir1 | *
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4 | 8289b279 | blueswir1 | * Copyright (c) 2008 Fabrice Bellard
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5 | 8289b279 | blueswir1 | *
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6 | 8289b279 | blueswir1 | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 8289b279 | blueswir1 | * of this software and associated documentation files (the "Software"), to deal
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8 | 8289b279 | blueswir1 | * in the Software without restriction, including without limitation the rights
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9 | 8289b279 | blueswir1 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 8289b279 | blueswir1 | * copies of the Software, and to permit persons to whom the Software is
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11 | 8289b279 | blueswir1 | * furnished to do so, subject to the following conditions:
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12 | 8289b279 | blueswir1 | *
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13 | 8289b279 | blueswir1 | * The above copyright notice and this permission notice shall be included in
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14 | 8289b279 | blueswir1 | * all copies or substantial portions of the Software.
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15 | 8289b279 | blueswir1 | *
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16 | 8289b279 | blueswir1 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 8289b279 | blueswir1 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 8289b279 | blueswir1 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 8289b279 | blueswir1 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 8289b279 | blueswir1 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 8289b279 | blueswir1 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 8289b279 | blueswir1 | * THE SOFTWARE.
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23 | 8289b279 | blueswir1 | */
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24 | 8289b279 | blueswir1 | #define TCG_TARGET_SPARC 1 |
25 | 8289b279 | blueswir1 | |
26 | 8289b279 | blueswir1 | #if defined(__sparc_v9__) && !defined(__sparc_v8plus__)
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27 | 8289b279 | blueswir1 | #define TCG_TARGET_REG_BITS 64 |
28 | 8289b279 | blueswir1 | #else
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29 | 8289b279 | blueswir1 | #define TCG_TARGET_REG_BITS 32 |
30 | 8289b279 | blueswir1 | #endif
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31 | 8289b279 | blueswir1 | |
32 | 8289b279 | blueswir1 | #define TCG_TARGET_WORDS_BIGENDIAN
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33 | 8289b279 | blueswir1 | |
34 | 8289b279 | blueswir1 | #define TCG_TARGET_NB_REGS 32 |
35 | 8289b279 | blueswir1 | |
36 | 8289b279 | blueswir1 | enum {
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37 | 8289b279 | blueswir1 | TCG_REG_G0 = 0,
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38 | 8289b279 | blueswir1 | TCG_REG_G1, |
39 | 8289b279 | blueswir1 | TCG_REG_G2, |
40 | 8289b279 | blueswir1 | TCG_REG_G3, |
41 | 8289b279 | blueswir1 | TCG_REG_G4, |
42 | 8289b279 | blueswir1 | TCG_REG_G5, |
43 | 8289b279 | blueswir1 | TCG_REG_G6, |
44 | 8289b279 | blueswir1 | TCG_REG_G7, |
45 | 8289b279 | blueswir1 | TCG_REG_O0, |
46 | 8289b279 | blueswir1 | TCG_REG_O1, |
47 | 8289b279 | blueswir1 | TCG_REG_O2, |
48 | 8289b279 | blueswir1 | TCG_REG_O3, |
49 | 8289b279 | blueswir1 | TCG_REG_O4, |
50 | 8289b279 | blueswir1 | TCG_REG_O5, |
51 | 8289b279 | blueswir1 | TCG_REG_O6, |
52 | 8289b279 | blueswir1 | TCG_REG_O7, |
53 | 8289b279 | blueswir1 | TCG_REG_L0, |
54 | 8289b279 | blueswir1 | TCG_REG_L1, |
55 | 8289b279 | blueswir1 | TCG_REG_L2, |
56 | 8289b279 | blueswir1 | TCG_REG_L3, |
57 | 8289b279 | blueswir1 | TCG_REG_L4, |
58 | 8289b279 | blueswir1 | TCG_REG_L5, |
59 | 8289b279 | blueswir1 | TCG_REG_L6, |
60 | 8289b279 | blueswir1 | TCG_REG_L7, |
61 | 8289b279 | blueswir1 | TCG_REG_I0, |
62 | 8289b279 | blueswir1 | TCG_REG_I1, |
63 | 8289b279 | blueswir1 | TCG_REG_I2, |
64 | 8289b279 | blueswir1 | TCG_REG_I3, |
65 | 8289b279 | blueswir1 | TCG_REG_I4, |
66 | 8289b279 | blueswir1 | TCG_REG_I5, |
67 | 8289b279 | blueswir1 | TCG_REG_I6, |
68 | 8289b279 | blueswir1 | TCG_REG_I7, |
69 | 8289b279 | blueswir1 | }; |
70 | 8289b279 | blueswir1 | |
71 | 8289b279 | blueswir1 | #define TCG_CT_CONST_S11 0x100 |
72 | 8289b279 | blueswir1 | #define TCG_CT_CONST_S13 0x200 |
73 | 8289b279 | blueswir1 | |
74 | 8289b279 | blueswir1 | /* used for function call generation */
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75 | e97b640d | blueswir1 | #define TCG_REG_CALL_STACK TCG_REG_I6
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76 | 64e3257c | blueswir1 | #ifdef __arch64__
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77 | e97b640d | blueswir1 | // Reserve space for AREG0
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78 | f843e528 | blueswir1 | #define TCG_TARGET_STACK_MINFRAME (176 + 4 * (int)sizeof(long) + \ |
79 | f843e528 | blueswir1 | TCG_STATIC_CALL_ARGS_SIZE) |
80 | f843e528 | blueswir1 | #define TCG_TARGET_CALL_STACK_OFFSET (2047 - 16) |
81 | 77fcd093 | blueswir1 | #define TCG_TARGET_STACK_ALIGN 16 |
82 | b3db8758 | blueswir1 | #else
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83 | baf8cc52 | blueswir1 | // AREG0 + one word for alignment
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84 | f843e528 | blueswir1 | #define TCG_TARGET_STACK_MINFRAME (92 + (2 + 1) * (int)sizeof(long) + \ |
85 | f843e528 | blueswir1 | TCG_STATIC_CALL_ARGS_SIZE) |
86 | e97b640d | blueswir1 | #define TCG_TARGET_CALL_STACK_OFFSET TCG_TARGET_STACK_MINFRAME
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87 | 77fcd093 | blueswir1 | #define TCG_TARGET_STACK_ALIGN 8 |
88 | b3db8758 | blueswir1 | #endif
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89 | b3db8758 | blueswir1 | |
90 | 8289b279 | blueswir1 | /* optional instructions */
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91 | 66896cb8 | aurel32 | //#define TCG_TARGET_HAS_bswap32_i32
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92 | 66896cb8 | aurel32 | //#define TCG_TARGET_HAS_bswap64_i64
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93 | 7d551702 | blueswir1 | //#define TCG_TARGET_HAS_neg_i32
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94 | 7d551702 | blueswir1 | //#define TCG_TARGET_HAS_neg_i64
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95 | 8289b279 | blueswir1 | |
96 | b3db8758 | blueswir1 | |
97 | e97b640d | blueswir1 | /* Note: must be synced with dyngen-exec.h and Makefile.target */
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98 | dfe5fff3 | Juan Quintela | #ifdef CONFIG_SOLARIS
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99 | 8289b279 | blueswir1 | #define TCG_AREG0 TCG_REG_G2
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100 | 8289b279 | blueswir1 | #define TCG_AREG1 TCG_REG_G3
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101 | 8289b279 | blueswir1 | #define TCG_AREG2 TCG_REG_G4
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102 | 8289b279 | blueswir1 | #elif defined(__sparc_v9__)
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103 | e97b640d | blueswir1 | #define TCG_AREG0 TCG_REG_G5
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104 | e97b640d | blueswir1 | #define TCG_AREG1 TCG_REG_G6
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105 | e97b640d | blueswir1 | #define TCG_AREG2 TCG_REG_G7
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106 | 8289b279 | blueswir1 | #else
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107 | 8289b279 | blueswir1 | #define TCG_AREG0 TCG_REG_G6
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108 | 8289b279 | blueswir1 | #define TCG_AREG1 TCG_REG_G1
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109 | 8289b279 | blueswir1 | #define TCG_AREG2 TCG_REG_G2
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110 | 8289b279 | blueswir1 | #endif
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111 | 8289b279 | blueswir1 | |
112 | 8289b279 | blueswir1 | static inline void flush_icache_range(unsigned long start, unsigned long stop) |
113 | 8289b279 | blueswir1 | { |
114 | 8289b279 | blueswir1 | unsigned long p; |
115 | 8289b279 | blueswir1 | |
116 | 8289b279 | blueswir1 | p = start & ~(8UL - 1UL); |
117 | 8289b279 | blueswir1 | stop = (stop + (8UL - 1UL)) & ~(8UL - 1UL); |
118 | 8289b279 | blueswir1 | |
119 | 8289b279 | blueswir1 | for (; p < stop; p += 8) |
120 | 8289b279 | blueswir1 | __asm__ __volatile__("flush\t%0" : : "r" (p)); |
121 | 8289b279 | blueswir1 | } |