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/*
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* PowerPC emulation micro-operations for qemu.
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*
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* Copyright (c) 2003-2007 Jocelyn Mayer
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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static inline uint16_t glue(ld16r, MEMSUFFIX) (target_ulong EA) |
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{ |
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uint16_t tmp = glue(lduw, MEMSUFFIX)(EA); |
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return ((tmp & 0xFF00) >> 8) | ((tmp & 0x00FF) << 8); |
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} |
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static inline int32_t glue(ld16rs, MEMSUFFIX) (target_ulong EA) |
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{ |
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int16_t tmp = glue(lduw, MEMSUFFIX)(EA); |
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return (int16_t)((tmp & 0xFF00) >> 8) | ((tmp & 0x00FF) << 8); |
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} |
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static inline uint32_t glue(ld32r, MEMSUFFIX) (target_ulong EA) |
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{ |
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uint32_t tmp = glue(ldl, MEMSUFFIX)(EA); |
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return ((tmp & 0xFF000000) >> 24) | ((tmp & 0x00FF0000) >> 8) | |
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((tmp & 0x0000FF00) << 8) | ((tmp & 0x000000FF) << 24); |
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} |
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#if defined(TARGET_PPC64) || defined(TARGET_PPCEMB)
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static inline uint64_t glue(ld64r, MEMSUFFIX) (target_ulong EA) |
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{ |
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uint64_t tmp = glue(ldq, MEMSUFFIX)(EA); |
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return ((tmp & 0xFF00000000000000ULL) >> 56) | |
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((tmp & 0x00FF000000000000ULL) >> 40) | |
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((tmp & 0x0000FF0000000000ULL) >> 24) | |
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((tmp & 0x000000FF00000000ULL) >> 8) | |
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((tmp & 0x00000000FF000000ULL) << 8) | |
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((tmp & 0x0000000000FF0000ULL) << 24) | |
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((tmp & 0x000000000000FF00ULL) << 40) | |
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((tmp & 0x00000000000000FFULL) << 54); |
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} |
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#endif
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#if defined(TARGET_PPC64)
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static inline int64_t glue(ldsl, MEMSUFFIX) (target_ulong EA) |
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{ |
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return (int32_t)glue(ldl, MEMSUFFIX)(EA);
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} |
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static inline int64_t glue(ld32rs, MEMSUFFIX) (target_ulong EA) |
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{ |
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uint32_t tmp = glue(ldl, MEMSUFFIX)(EA); |
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return (int32_t)((tmp & 0xFF000000) >> 24) | ((tmp & 0x00FF0000) >> 8) | |
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((tmp & 0x0000FF00) << 8) | ((tmp & 0x000000FF) << 24); |
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} |
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#endif
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static inline void glue(st16r, MEMSUFFIX) (target_ulong EA, uint16_t data) |
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{ |
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uint16_t tmp = ((data & 0xFF00) >> 8) | ((data & 0x00FF) << 8); |
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glue(stw, MEMSUFFIX)(EA, tmp); |
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} |
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static inline void glue(st32r, MEMSUFFIX) (target_ulong EA, uint32_t data) |
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{ |
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uint32_t tmp = ((data & 0xFF000000) >> 24) | ((data & 0x00FF0000) >> 8) | |
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((data & 0x0000FF00) << 8) | ((data & 0x000000FF) << 24); |
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glue(stl, MEMSUFFIX)(EA, tmp); |
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} |
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#if defined(TARGET_PPC64) || defined(TARGET_PPCEMB)
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static inline void glue(st64r, MEMSUFFIX) (target_ulong EA, uint64_t data) |
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{ |
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uint64_t tmp = ((data & 0xFF00000000000000ULL) >> 56) | |
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((data & 0x00FF000000000000ULL) >> 40) | |
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((data & 0x0000FF0000000000ULL) >> 24) | |
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((data & 0x000000FF00000000ULL) >> 8) | |
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((data & 0x00000000FF000000ULL) << 8) | |
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((data & 0x0000000000FF0000ULL) << 24) | |
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((data & 0x000000000000FF00ULL) << 40) | |
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((data & 0x00000000000000FFULL) << 56); |
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glue(stq, MEMSUFFIX)(EA, tmp); |
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} |
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#endif
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/*** Integer load ***/
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#define PPC_LD_OP(name, op) \
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void OPPROTO glue(glue(op_l, name), MEMSUFFIX) (void) \ |
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{ \ |
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T1 = glue(op, MEMSUFFIX)((uint32_t)T0); \ |
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RETURN(); \ |
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} |
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#if defined(TARGET_PPC64)
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#define PPC_LD_OP_64(name, op) \
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void OPPROTO glue(glue(glue(op_l, name), _64), MEMSUFFIX) (void) \ |
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{ \ |
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T1 = glue(op, MEMSUFFIX)((uint64_t)T0); \ |
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RETURN(); \ |
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} |
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#endif
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#define PPC_ST_OP(name, op) \
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void OPPROTO glue(glue(op_st, name), MEMSUFFIX) (void) \ |
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{ \ |
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glue(op, MEMSUFFIX)((uint32_t)T0, T1); \ |
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RETURN(); \ |
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} |
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#if defined(TARGET_PPC64)
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#define PPC_ST_OP_64(name, op) \
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void OPPROTO glue(glue(glue(op_st, name), _64), MEMSUFFIX) (void) \ |
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{ \ |
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glue(op, MEMSUFFIX)((uint64_t)T0, T1); \ |
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RETURN(); \ |
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} |
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#endif
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PPC_LD_OP(bz, ldub); |
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PPC_LD_OP(ha, ldsw); |
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PPC_LD_OP(hz, lduw); |
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PPC_LD_OP(wz, ldl); |
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#if defined(TARGET_PPC64)
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PPC_LD_OP(d, ldq); |
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PPC_LD_OP(wa, ldsl); |
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PPC_LD_OP_64(d, ldq); |
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PPC_LD_OP_64(wa, ldsl); |
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PPC_LD_OP_64(bz, ldub); |
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PPC_LD_OP_64(ha, ldsw); |
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PPC_LD_OP_64(hz, lduw); |
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PPC_LD_OP_64(wz, ldl); |
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#endif
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PPC_LD_OP(ha_le, ld16rs); |
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PPC_LD_OP(hz_le, ld16r); |
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PPC_LD_OP(wz_le, ld32r); |
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#if defined(TARGET_PPC64)
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PPC_LD_OP(d_le, ld64r); |
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PPC_LD_OP(wa_le, ld32rs); |
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PPC_LD_OP_64(d_le, ld64r); |
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PPC_LD_OP_64(wa_le, ld32rs); |
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PPC_LD_OP_64(ha_le, ld16rs); |
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PPC_LD_OP_64(hz_le, ld16r); |
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PPC_LD_OP_64(wz_le, ld32r); |
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#endif
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/*** Integer store ***/
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PPC_ST_OP(b, stb); |
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PPC_ST_OP(h, stw); |
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PPC_ST_OP(w, stl); |
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#if defined(TARGET_PPC64)
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PPC_ST_OP(d, stq); |
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PPC_ST_OP_64(d, stq); |
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PPC_ST_OP_64(b, stb); |
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PPC_ST_OP_64(h, stw); |
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PPC_ST_OP_64(w, stl); |
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#endif
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PPC_ST_OP(h_le, st16r); |
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PPC_ST_OP(w_le, st32r); |
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#if defined(TARGET_PPC64)
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PPC_ST_OP(d_le, st64r); |
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PPC_ST_OP_64(d_le, st64r); |
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PPC_ST_OP_64(h_le, st16r); |
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PPC_ST_OP_64(w_le, st32r); |
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#endif
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/*** Integer load and store with byte reverse ***/
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PPC_LD_OP(hbr, ld16r); |
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PPC_LD_OP(wbr, ld32r); |
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PPC_ST_OP(hbr, st16r); |
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PPC_ST_OP(wbr, st32r); |
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#if defined(TARGET_PPC64)
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PPC_LD_OP_64(hbr, ld16r); |
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PPC_LD_OP_64(wbr, ld32r); |
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PPC_ST_OP_64(hbr, st16r); |
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PPC_ST_OP_64(wbr, st32r); |
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#endif
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PPC_LD_OP(hbr_le, lduw); |
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PPC_LD_OP(wbr_le, ldl); |
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PPC_ST_OP(hbr_le, stw); |
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PPC_ST_OP(wbr_le, stl); |
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#if defined(TARGET_PPC64)
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PPC_LD_OP_64(hbr_le, lduw); |
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PPC_LD_OP_64(wbr_le, ldl); |
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PPC_ST_OP_64(hbr_le, stw); |
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PPC_ST_OP_64(wbr_le, stl); |
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#endif
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/*** Integer load and store multiple ***/
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void OPPROTO glue(op_lmw, MEMSUFFIX) (void) |
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{ |
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glue(do_lmw, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#if defined(TARGET_PPC64)
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void OPPROTO glue(op_lmw_64, MEMSUFFIX) (void) |
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{ |
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glue(do_lmw_64, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#endif
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void OPPROTO glue(op_lmw_le, MEMSUFFIX) (void) |
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{ |
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glue(do_lmw_le, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#if defined(TARGET_PPC64)
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void OPPROTO glue(op_lmw_le_64, MEMSUFFIX) (void) |
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{ |
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glue(do_lmw_le_64, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#endif
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void OPPROTO glue(op_stmw, MEMSUFFIX) (void) |
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{ |
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glue(do_stmw, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#if defined(TARGET_PPC64)
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void OPPROTO glue(op_stmw_64, MEMSUFFIX) (void) |
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{ |
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glue(do_stmw_64, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#endif
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void OPPROTO glue(op_stmw_le, MEMSUFFIX) (void) |
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{ |
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glue(do_stmw_le, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#if defined(TARGET_PPC64)
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void OPPROTO glue(op_stmw_le_64, MEMSUFFIX) (void) |
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{ |
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glue(do_stmw_le_64, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#endif
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/*** Integer load and store strings ***/
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void OPPROTO glue(op_lswi, MEMSUFFIX) (void) |
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{ |
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glue(do_lsw, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#if defined(TARGET_PPC64)
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void OPPROTO glue(op_lswi_64, MEMSUFFIX) (void) |
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{ |
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glue(do_lsw_64, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#endif
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void OPPROTO glue(op_lswi_le, MEMSUFFIX) (void) |
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{ |
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glue(do_lsw_le, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#if defined(TARGET_PPC64)
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void OPPROTO glue(op_lswi_le_64, MEMSUFFIX) (void) |
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{ |
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glue(do_lsw_le_64, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#endif
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/* PPC32 specification says we must generate an exception if
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* rA is in the range of registers to be loaded.
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* In an other hand, IBM says this is valid, but rA won't be loaded.
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* For now, I'll follow the spec...
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*/
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void OPPROTO glue(op_lswx, MEMSUFFIX) (void) |
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{ |
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/* Note: T1 comes from xer_bc then no cast is needed */
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if (likely(T1 != 0)) { |
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if (unlikely((PARAM1 < PARAM2 && (PARAM1 + T1) > PARAM2) ||
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(PARAM1 < PARAM3 && (PARAM1 + T1) > PARAM3))) { |
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do_raise_exception_err(POWERPC_EXCP_PROGRAM, |
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POWERPC_EXCP_INVAL | |
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POWERPC_EXCP_INVAL_LSWX); |
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} else {
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glue(do_lsw, MEMSUFFIX)(PARAM1); |
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} |
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} |
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RETURN(); |
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} |
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#if defined(TARGET_PPC64)
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void OPPROTO glue(op_lswx_64, MEMSUFFIX) (void) |
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{ |
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/* Note: T1 comes from xer_bc then no cast is needed */
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if (likely(T1 != 0)) { |
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if (unlikely((PARAM1 < PARAM2 && (PARAM1 + T1) > PARAM2) ||
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(PARAM1 < PARAM3 && (PARAM1 + T1) > PARAM3))) { |
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do_raise_exception_err(POWERPC_EXCP_PROGRAM, |
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POWERPC_EXCP_INVAL | |
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POWERPC_EXCP_INVAL_LSWX); |
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} else {
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glue(do_lsw_64, MEMSUFFIX)(PARAM1); |
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} |
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} |
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RETURN(); |
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} |
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#endif
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void OPPROTO glue(op_lswx_le, MEMSUFFIX) (void) |
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{ |
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/* Note: T1 comes from xer_bc then no cast is needed */
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if (likely(T1 != 0)) { |
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if (unlikely((PARAM1 < PARAM2 && (PARAM1 + T1) > PARAM2) ||
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(PARAM1 < PARAM3 && (PARAM1 + T1) > PARAM3))) { |
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do_raise_exception_err(POWERPC_EXCP_PROGRAM, |
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POWERPC_EXCP_INVAL | |
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POWERPC_EXCP_INVAL_LSWX); |
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} else {
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glue(do_lsw_le, MEMSUFFIX)(PARAM1); |
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} |
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} |
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RETURN(); |
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} |
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#if defined(TARGET_PPC64)
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void OPPROTO glue(op_lswx_le_64, MEMSUFFIX) (void) |
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{ |
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/* Note: T1 comes from xer_bc then no cast is needed */
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if (likely(T1 != 0)) { |
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if (unlikely((PARAM1 < PARAM2 && (PARAM1 + T1) > PARAM2) ||
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(PARAM1 < PARAM3 && (PARAM1 + T1) > PARAM3))) { |
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do_raise_exception_err(POWERPC_EXCP_PROGRAM, |
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POWERPC_EXCP_INVAL | |
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POWERPC_EXCP_INVAL_LSWX); |
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} else {
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glue(do_lsw_le_64, MEMSUFFIX)(PARAM1); |
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} |
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} |
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RETURN(); |
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} |
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#endif
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void OPPROTO glue(op_stsw, MEMSUFFIX) (void) |
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{ |
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glue(do_stsw, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#if defined(TARGET_PPC64)
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void OPPROTO glue(op_stsw_64, MEMSUFFIX) (void) |
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{ |
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glue(do_stsw_64, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#endif
|
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void OPPROTO glue(op_stsw_le, MEMSUFFIX) (void) |
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{ |
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glue(do_stsw_le, MEMSUFFIX)(PARAM1); |
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RETURN(); |
379 |
} |
380 |
|
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#if defined(TARGET_PPC64)
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void OPPROTO glue(op_stsw_le_64, MEMSUFFIX) (void) |
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{ |
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glue(do_stsw_le_64, MEMSUFFIX)(PARAM1); |
385 |
RETURN(); |
386 |
} |
387 |
#endif
|
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|
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/*** Floating-point store ***/
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#define PPC_STF_OP(name, op) \
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void OPPROTO glue(glue(op_st, name), MEMSUFFIX) (void) \ |
392 |
{ \ |
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glue(op, MEMSUFFIX)((uint32_t)T0, FT0); \ |
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RETURN(); \ |
395 |
} |
396 |
|
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#if defined(TARGET_PPC64)
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#define PPC_STF_OP_64(name, op) \
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void OPPROTO glue(glue(glue(op_st, name), _64), MEMSUFFIX) (void) \ |
400 |
{ \ |
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glue(op, MEMSUFFIX)((uint64_t)T0, FT0); \ |
402 |
RETURN(); \ |
403 |
} |
404 |
#endif
|
405 |
|
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PPC_STF_OP(fd, stfq); |
407 |
PPC_STF_OP(fs, stfl); |
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#if defined(TARGET_PPC64)
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PPC_STF_OP_64(fd, stfq); |
410 |
PPC_STF_OP_64(fs, stfl); |
411 |
#endif
|
412 |
|
413 |
static inline void glue(stfqr, MEMSUFFIX) (target_ulong EA, double d) |
414 |
{ |
415 |
union {
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416 |
double d;
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417 |
uint64_t u; |
418 |
} u; |
419 |
|
420 |
u.d = d; |
421 |
u.u = ((u.u & 0xFF00000000000000ULL) >> 56) | |
422 |
((u.u & 0x00FF000000000000ULL) >> 40) | |
423 |
((u.u & 0x0000FF0000000000ULL) >> 24) | |
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((u.u & 0x000000FF00000000ULL) >> 8) | |
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((u.u & 0x00000000FF000000ULL) << 8) | |
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((u.u & 0x0000000000FF0000ULL) << 24) | |
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((u.u & 0x000000000000FF00ULL) << 40) | |
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((u.u & 0x00000000000000FFULL) << 56); |
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glue(stfq, MEMSUFFIX)(EA, u.d); |
430 |
} |
431 |
|
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static inline void glue(stflr, MEMSUFFIX) (target_ulong EA, float f) |
433 |
{ |
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union {
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float f;
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uint32_t u; |
437 |
} u; |
438 |
|
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u.f = f; |
440 |
u.u = ((u.u & 0xFF000000UL) >> 24) | |
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((u.u & 0x00FF0000ULL) >> 8) | |
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((u.u & 0x0000FF00UL) << 8) | |
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((u.u & 0x000000FFULL) << 24); |
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glue(stfl, MEMSUFFIX)(EA, u.f); |
445 |
} |
446 |
|
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PPC_STF_OP(fd_le, stfqr); |
448 |
PPC_STF_OP(fs_le, stflr); |
449 |
#if defined(TARGET_PPC64)
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PPC_STF_OP_64(fd_le, stfqr); |
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PPC_STF_OP_64(fs_le, stflr); |
452 |
#endif
|
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|
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/*** Floating-point load ***/
|
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#define PPC_LDF_OP(name, op) \
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void OPPROTO glue(glue(op_l, name), MEMSUFFIX) (void) \ |
457 |
{ \ |
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FT0 = glue(op, MEMSUFFIX)((uint32_t)T0); \ |
459 |
RETURN(); \ |
460 |
} |
461 |
|
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#if defined(TARGET_PPC64)
|
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#define PPC_LDF_OP_64(name, op) \
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void OPPROTO glue(glue(glue(op_l, name), _64), MEMSUFFIX) (void) \ |
465 |
{ \ |
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FT0 = glue(op, MEMSUFFIX)((uint64_t)T0); \ |
467 |
RETURN(); \ |
468 |
} |
469 |
#endif
|
470 |
|
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PPC_LDF_OP(fd, ldfq); |
472 |
PPC_LDF_OP(fs, ldfl); |
473 |
#if defined(TARGET_PPC64)
|
474 |
PPC_LDF_OP_64(fd, ldfq); |
475 |
PPC_LDF_OP_64(fs, ldfl); |
476 |
#endif
|
477 |
|
478 |
static inline double glue(ldfqr, MEMSUFFIX) (target_ulong EA) |
479 |
{ |
480 |
union {
|
481 |
double d;
|
482 |
uint64_t u; |
483 |
} u; |
484 |
|
485 |
u.d = glue(ldfq, MEMSUFFIX)(EA); |
486 |
u.u = ((u.u & 0xFF00000000000000ULL) >> 56) | |
487 |
((u.u & 0x00FF000000000000ULL) >> 40) | |
488 |
((u.u & 0x0000FF0000000000ULL) >> 24) | |
489 |
((u.u & 0x000000FF00000000ULL) >> 8) | |
490 |
((u.u & 0x00000000FF000000ULL) << 8) | |
491 |
((u.u & 0x0000000000FF0000ULL) << 24) | |
492 |
((u.u & 0x000000000000FF00ULL) << 40) | |
493 |
((u.u & 0x00000000000000FFULL) << 56); |
494 |
|
495 |
return u.d;
|
496 |
} |
497 |
|
498 |
static inline float glue(ldflr, MEMSUFFIX) (target_ulong EA) |
499 |
{ |
500 |
union {
|
501 |
float f;
|
502 |
uint32_t u; |
503 |
} u; |
504 |
|
505 |
u.f = glue(ldfl, MEMSUFFIX)(EA); |
506 |
u.u = ((u.u & 0xFF000000UL) >> 24) | |
507 |
((u.u & 0x00FF0000ULL) >> 8) | |
508 |
((u.u & 0x0000FF00UL) << 8) | |
509 |
((u.u & 0x000000FFULL) << 24); |
510 |
|
511 |
return u.f;
|
512 |
} |
513 |
|
514 |
PPC_LDF_OP(fd_le, ldfqr); |
515 |
PPC_LDF_OP(fs_le, ldflr); |
516 |
#if defined(TARGET_PPC64)
|
517 |
PPC_LDF_OP_64(fd_le, ldfqr); |
518 |
PPC_LDF_OP_64(fs_le, ldflr); |
519 |
#endif
|
520 |
|
521 |
/* Load and set reservation */
|
522 |
void OPPROTO glue(op_lwarx, MEMSUFFIX) (void) |
523 |
{ |
524 |
if (unlikely(T0 & 0x03)) { |
525 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
526 |
} else {
|
527 |
T1 = glue(ldl, MEMSUFFIX)((uint32_t)T0); |
528 |
env->reserve = (uint32_t)T0; |
529 |
} |
530 |
RETURN(); |
531 |
} |
532 |
|
533 |
#if defined(TARGET_PPC64)
|
534 |
void OPPROTO glue(op_lwarx_64, MEMSUFFIX) (void) |
535 |
{ |
536 |
if (unlikely(T0 & 0x03)) { |
537 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
538 |
} else {
|
539 |
T1 = glue(ldl, MEMSUFFIX)((uint64_t)T0); |
540 |
env->reserve = (uint64_t)T0; |
541 |
} |
542 |
RETURN(); |
543 |
} |
544 |
|
545 |
void OPPROTO glue(op_ldarx, MEMSUFFIX) (void) |
546 |
{ |
547 |
if (unlikely(T0 & 0x03)) { |
548 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
549 |
} else {
|
550 |
T1 = glue(ldq, MEMSUFFIX)((uint32_t)T0); |
551 |
env->reserve = (uint32_t)T0; |
552 |
} |
553 |
RETURN(); |
554 |
} |
555 |
|
556 |
void OPPROTO glue(op_ldarx_64, MEMSUFFIX) (void) |
557 |
{ |
558 |
if (unlikely(T0 & 0x03)) { |
559 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
560 |
} else {
|
561 |
T1 = glue(ldq, MEMSUFFIX)((uint64_t)T0); |
562 |
env->reserve = (uint64_t)T0; |
563 |
} |
564 |
RETURN(); |
565 |
} |
566 |
#endif
|
567 |
|
568 |
void OPPROTO glue(op_lwarx_le, MEMSUFFIX) (void) |
569 |
{ |
570 |
if (unlikely(T0 & 0x03)) { |
571 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
572 |
} else {
|
573 |
T1 = glue(ld32r, MEMSUFFIX)((uint32_t)T0); |
574 |
env->reserve = (uint32_t)T0; |
575 |
} |
576 |
RETURN(); |
577 |
} |
578 |
|
579 |
#if defined(TARGET_PPC64)
|
580 |
void OPPROTO glue(op_lwarx_le_64, MEMSUFFIX) (void) |
581 |
{ |
582 |
if (unlikely(T0 & 0x03)) { |
583 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
584 |
} else {
|
585 |
T1 = glue(ld32r, MEMSUFFIX)((uint64_t)T0); |
586 |
env->reserve = (uint64_t)T0; |
587 |
} |
588 |
RETURN(); |
589 |
} |
590 |
|
591 |
void OPPROTO glue(op_ldarx_le, MEMSUFFIX) (void) |
592 |
{ |
593 |
if (unlikely(T0 & 0x03)) { |
594 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
595 |
} else {
|
596 |
T1 = glue(ld64r, MEMSUFFIX)((uint32_t)T0); |
597 |
env->reserve = (uint32_t)T0; |
598 |
} |
599 |
RETURN(); |
600 |
} |
601 |
|
602 |
void OPPROTO glue(op_ldarx_le_64, MEMSUFFIX) (void) |
603 |
{ |
604 |
if (unlikely(T0 & 0x03)) { |
605 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
606 |
} else {
|
607 |
T1 = glue(ld64r, MEMSUFFIX)((uint64_t)T0); |
608 |
env->reserve = (uint64_t)T0; |
609 |
} |
610 |
RETURN(); |
611 |
} |
612 |
#endif
|
613 |
|
614 |
/* Store with reservation */
|
615 |
void OPPROTO glue(op_stwcx, MEMSUFFIX) (void) |
616 |
{ |
617 |
if (unlikely(T0 & 0x03)) { |
618 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
619 |
} else {
|
620 |
if (unlikely(env->reserve != (uint32_t)T0)) {
|
621 |
env->crf[0] = xer_so;
|
622 |
} else {
|
623 |
glue(stl, MEMSUFFIX)((uint32_t)T0, T1); |
624 |
env->crf[0] = xer_so | 0x02; |
625 |
} |
626 |
} |
627 |
env->reserve = -1;
|
628 |
RETURN(); |
629 |
} |
630 |
|
631 |
#if defined(TARGET_PPC64)
|
632 |
void OPPROTO glue(op_stwcx_64, MEMSUFFIX) (void) |
633 |
{ |
634 |
if (unlikely(T0 & 0x03)) { |
635 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
636 |
} else {
|
637 |
if (unlikely(env->reserve != (uint64_t)T0)) {
|
638 |
env->crf[0] = xer_so;
|
639 |
} else {
|
640 |
glue(stl, MEMSUFFIX)((uint64_t)T0, T1); |
641 |
env->crf[0] = xer_so | 0x02; |
642 |
} |
643 |
} |
644 |
env->reserve = -1;
|
645 |
RETURN(); |
646 |
} |
647 |
|
648 |
void OPPROTO glue(op_stdcx, MEMSUFFIX) (void) |
649 |
{ |
650 |
if (unlikely(T0 & 0x03)) { |
651 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
652 |
} else {
|
653 |
if (unlikely(env->reserve != (uint32_t)T0)) {
|
654 |
env->crf[0] = xer_so;
|
655 |
} else {
|
656 |
glue(stq, MEMSUFFIX)((uint32_t)T0, T1); |
657 |
env->crf[0] = xer_so | 0x02; |
658 |
} |
659 |
} |
660 |
env->reserve = -1;
|
661 |
RETURN(); |
662 |
} |
663 |
|
664 |
void OPPROTO glue(op_stdcx_64, MEMSUFFIX) (void) |
665 |
{ |
666 |
if (unlikely(T0 & 0x03)) { |
667 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
668 |
} else {
|
669 |
if (unlikely(env->reserve != (uint64_t)T0)) {
|
670 |
env->crf[0] = xer_so;
|
671 |
} else {
|
672 |
glue(stq, MEMSUFFIX)((uint64_t)T0, T1); |
673 |
env->crf[0] = xer_so | 0x02; |
674 |
} |
675 |
} |
676 |
env->reserve = -1;
|
677 |
RETURN(); |
678 |
} |
679 |
#endif
|
680 |
|
681 |
void OPPROTO glue(op_stwcx_le, MEMSUFFIX) (void) |
682 |
{ |
683 |
if (unlikely(T0 & 0x03)) { |
684 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
685 |
} else {
|
686 |
if (unlikely(env->reserve != (uint32_t)T0)) {
|
687 |
env->crf[0] = xer_so;
|
688 |
} else {
|
689 |
glue(st32r, MEMSUFFIX)((uint32_t)T0, T1); |
690 |
env->crf[0] = xer_so | 0x02; |
691 |
} |
692 |
} |
693 |
env->reserve = -1;
|
694 |
RETURN(); |
695 |
} |
696 |
|
697 |
#if defined(TARGET_PPC64)
|
698 |
void OPPROTO glue(op_stwcx_le_64, MEMSUFFIX) (void) |
699 |
{ |
700 |
if (unlikely(T0 & 0x03)) { |
701 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
702 |
} else {
|
703 |
if (unlikely(env->reserve != (uint64_t)T0)) {
|
704 |
env->crf[0] = xer_so;
|
705 |
} else {
|
706 |
glue(st32r, MEMSUFFIX)((uint64_t)T0, T1); |
707 |
env->crf[0] = xer_so | 0x02; |
708 |
} |
709 |
} |
710 |
env->reserve = -1;
|
711 |
RETURN(); |
712 |
} |
713 |
|
714 |
void OPPROTO glue(op_stdcx_le, MEMSUFFIX) (void) |
715 |
{ |
716 |
if (unlikely(T0 & 0x03)) { |
717 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
718 |
} else {
|
719 |
if (unlikely(env->reserve != (uint32_t)T0)) {
|
720 |
env->crf[0] = xer_so;
|
721 |
} else {
|
722 |
glue(st64r, MEMSUFFIX)((uint32_t)T0, T1); |
723 |
env->crf[0] = xer_so | 0x02; |
724 |
} |
725 |
} |
726 |
env->reserve = -1;
|
727 |
RETURN(); |
728 |
} |
729 |
|
730 |
void OPPROTO glue(op_stdcx_le_64, MEMSUFFIX) (void) |
731 |
{ |
732 |
if (unlikely(T0 & 0x03)) { |
733 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
734 |
} else {
|
735 |
if (unlikely(env->reserve != (uint64_t)T0)) {
|
736 |
env->crf[0] = xer_so;
|
737 |
} else {
|
738 |
glue(st64r, MEMSUFFIX)((uint64_t)T0, T1); |
739 |
env->crf[0] = xer_so | 0x02; |
740 |
} |
741 |
} |
742 |
env->reserve = -1;
|
743 |
RETURN(); |
744 |
} |
745 |
#endif
|
746 |
|
747 |
void OPPROTO glue(op_dcbz, MEMSUFFIX) (void) |
748 |
{ |
749 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x00), 0); |
750 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x04), 0); |
751 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x08), 0); |
752 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x0C), 0); |
753 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x10), 0); |
754 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x14), 0); |
755 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x18), 0); |
756 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x1C), 0); |
757 |
#if DCACHE_LINE_SIZE == 64 |
758 |
/* XXX: cache line size should be 64 for POWER & PowerPC 601 */
|
759 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x20UL), 0); |
760 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x24UL), 0); |
761 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x28UL), 0); |
762 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x2CUL), 0); |
763 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x30UL), 0); |
764 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x34UL), 0); |
765 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x38UL), 0); |
766 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x3CUL), 0); |
767 |
#endif
|
768 |
RETURN(); |
769 |
} |
770 |
|
771 |
#if defined(TARGET_PPC64)
|
772 |
void OPPROTO glue(op_dcbz_64, MEMSUFFIX) (void) |
773 |
{ |
774 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x00), 0); |
775 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x04), 0); |
776 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x08), 0); |
777 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x0C), 0); |
778 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x10), 0); |
779 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x14), 0); |
780 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x18), 0); |
781 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x1C), 0); |
782 |
#if DCACHE_LINE_SIZE == 64 |
783 |
/* XXX: cache line size should be 64 for POWER & PowerPC 601 */
|
784 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x20UL), 0); |
785 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x24UL), 0); |
786 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x28UL), 0); |
787 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x2CUL), 0); |
788 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x30UL), 0); |
789 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x34UL), 0); |
790 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x38UL), 0); |
791 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x3CUL), 0); |
792 |
#endif
|
793 |
RETURN(); |
794 |
} |
795 |
#endif
|
796 |
|
797 |
/* Instruction cache block invalidate */
|
798 |
void OPPROTO glue(op_icbi, MEMSUFFIX) (void) |
799 |
{ |
800 |
glue(do_icbi, MEMSUFFIX)(); |
801 |
RETURN(); |
802 |
} |
803 |
|
804 |
#if defined(TARGET_PPC64)
|
805 |
void OPPROTO glue(op_icbi_64, MEMSUFFIX) (void) |
806 |
{ |
807 |
glue(do_icbi_64, MEMSUFFIX)(); |
808 |
RETURN(); |
809 |
} |
810 |
#endif
|
811 |
|
812 |
/* External access */
|
813 |
void OPPROTO glue(op_eciwx, MEMSUFFIX) (void) |
814 |
{ |
815 |
T1 = glue(ldl, MEMSUFFIX)((uint32_t)T0); |
816 |
RETURN(); |
817 |
} |
818 |
|
819 |
#if defined(TARGET_PPC64)
|
820 |
void OPPROTO glue(op_eciwx_64, MEMSUFFIX) (void) |
821 |
{ |
822 |
T1 = glue(ldl, MEMSUFFIX)((uint64_t)T0); |
823 |
RETURN(); |
824 |
} |
825 |
#endif
|
826 |
|
827 |
void OPPROTO glue(op_ecowx, MEMSUFFIX) (void) |
828 |
{ |
829 |
glue(stl, MEMSUFFIX)((uint32_t)T0, T1); |
830 |
RETURN(); |
831 |
} |
832 |
|
833 |
#if defined(TARGET_PPC64)
|
834 |
void OPPROTO glue(op_ecowx_64, MEMSUFFIX) (void) |
835 |
{ |
836 |
glue(stl, MEMSUFFIX)((uint64_t)T0, T1); |
837 |
RETURN(); |
838 |
} |
839 |
#endif
|
840 |
|
841 |
void OPPROTO glue(op_eciwx_le, MEMSUFFIX) (void) |
842 |
{ |
843 |
T1 = glue(ld32r, MEMSUFFIX)((uint32_t)T0); |
844 |
RETURN(); |
845 |
} |
846 |
|
847 |
#if defined(TARGET_PPC64)
|
848 |
void OPPROTO glue(op_eciwx_le_64, MEMSUFFIX) (void) |
849 |
{ |
850 |
T1 = glue(ld32r, MEMSUFFIX)((uint64_t)T0); |
851 |
RETURN(); |
852 |
} |
853 |
#endif
|
854 |
|
855 |
void OPPROTO glue(op_ecowx_le, MEMSUFFIX) (void) |
856 |
{ |
857 |
glue(st32r, MEMSUFFIX)((uint32_t)T0, T1); |
858 |
RETURN(); |
859 |
} |
860 |
|
861 |
#if defined(TARGET_PPC64)
|
862 |
void OPPROTO glue(op_ecowx_le_64, MEMSUFFIX) (void) |
863 |
{ |
864 |
glue(st32r, MEMSUFFIX)((uint64_t)T0, T1); |
865 |
RETURN(); |
866 |
} |
867 |
#endif
|
868 |
|
869 |
/* XXX: those micro-ops need tests ! */
|
870 |
/* PowerPC 601 specific instructions (POWER bridge) */
|
871 |
void OPPROTO glue(op_POWER_lscbx, MEMSUFFIX) (void) |
872 |
{ |
873 |
/* When byte count is 0, do nothing */
|
874 |
if (likely(T1 != 0)) { |
875 |
glue(do_POWER_lscbx, MEMSUFFIX)(PARAM1, PARAM2, PARAM3); |
876 |
} |
877 |
RETURN(); |
878 |
} |
879 |
|
880 |
/* POWER2 quad load and store */
|
881 |
/* XXX: TAGs are not managed */
|
882 |
void OPPROTO glue(op_POWER2_lfq, MEMSUFFIX) (void) |
883 |
{ |
884 |
glue(do_POWER2_lfq, MEMSUFFIX)(); |
885 |
RETURN(); |
886 |
} |
887 |
|
888 |
void glue(op_POWER2_lfq_le, MEMSUFFIX) (void) |
889 |
{ |
890 |
glue(do_POWER2_lfq_le, MEMSUFFIX)(); |
891 |
RETURN(); |
892 |
} |
893 |
|
894 |
void OPPROTO glue(op_POWER2_stfq, MEMSUFFIX) (void) |
895 |
{ |
896 |
glue(do_POWER2_stfq, MEMSUFFIX)(); |
897 |
RETURN(); |
898 |
} |
899 |
|
900 |
void OPPROTO glue(op_POWER2_stfq_le, MEMSUFFIX) (void) |
901 |
{ |
902 |
glue(do_POWER2_stfq_le, MEMSUFFIX)(); |
903 |
RETURN(); |
904 |
} |
905 |
|
906 |
#if defined(TARGET_PPCEMB)
|
907 |
/* SPE extension */
|
908 |
#define _PPC_SPE_LD_OP(name, op) \
|
909 |
void OPPROTO glue(glue(op_spe_l, name), MEMSUFFIX) (void) \ |
910 |
{ \ |
911 |
T1_64 = glue(op, MEMSUFFIX)((uint32_t)T0); \ |
912 |
RETURN(); \ |
913 |
} |
914 |
|
915 |
#if defined(TARGET_PPC64)
|
916 |
#define _PPC_SPE_LD_OP_64(name, op) \
|
917 |
void OPPROTO glue(glue(glue(op_spe_l, name), _64), MEMSUFFIX) (void) \ |
918 |
{ \ |
919 |
T1_64 = glue(op, MEMSUFFIX)((uint64_t)T0); \ |
920 |
RETURN(); \ |
921 |
} |
922 |
#define PPC_SPE_LD_OP(name, op) \
|
923 |
_PPC_SPE_LD_OP(name, op); \ |
924 |
_PPC_SPE_LD_OP_64(name, op) |
925 |
#else
|
926 |
#define PPC_SPE_LD_OP(name, op) \
|
927 |
_PPC_SPE_LD_OP(name, op) |
928 |
#endif
|
929 |
|
930 |
|
931 |
#define _PPC_SPE_ST_OP(name, op) \
|
932 |
void OPPROTO glue(glue(op_spe_st, name), MEMSUFFIX) (void) \ |
933 |
{ \ |
934 |
glue(op, MEMSUFFIX)((uint32_t)T0, T1_64); \ |
935 |
RETURN(); \ |
936 |
} |
937 |
|
938 |
#if defined(TARGET_PPC64)
|
939 |
#define _PPC_SPE_ST_OP_64(name, op) \
|
940 |
void OPPROTO glue(glue(glue(op_spe_st, name), _64), MEMSUFFIX) (void) \ |
941 |
{ \ |
942 |
glue(op, MEMSUFFIX)((uint64_t)T0, T1_64); \ |
943 |
RETURN(); \ |
944 |
} |
945 |
#define PPC_SPE_ST_OP(name, op) \
|
946 |
_PPC_SPE_ST_OP(name, op); \ |
947 |
_PPC_SPE_ST_OP_64(name, op) |
948 |
#else
|
949 |
#define PPC_SPE_ST_OP(name, op) \
|
950 |
_PPC_SPE_ST_OP(name, op) |
951 |
#endif
|
952 |
|
953 |
#if !defined(TARGET_PPC64)
|
954 |
PPC_SPE_LD_OP(dd, ldq); |
955 |
PPC_SPE_ST_OP(dd, stq); |
956 |
PPC_SPE_LD_OP(dd_le, ld64r); |
957 |
PPC_SPE_ST_OP(dd_le, st64r); |
958 |
#endif
|
959 |
static inline uint64_t glue(spe_ldw, MEMSUFFIX) (target_ulong EA) |
960 |
{ |
961 |
uint64_t ret; |
962 |
ret = (uint64_t)glue(ldl, MEMSUFFIX)(EA) << 32;
|
963 |
ret |= (uint64_t)glue(ldl, MEMSUFFIX)(EA + 4);
|
964 |
return ret;
|
965 |
} |
966 |
PPC_SPE_LD_OP(dw, spe_ldw); |
967 |
static inline void glue(spe_stdw, MEMSUFFIX) (target_ulong EA, uint64_t data) |
968 |
{ |
969 |
glue(stl, MEMSUFFIX)(EA, data >> 32);
|
970 |
glue(stl, MEMSUFFIX)(EA + 4, data);
|
971 |
} |
972 |
PPC_SPE_ST_OP(dw, spe_stdw); |
973 |
static inline uint64_t glue(spe_ldw_le, MEMSUFFIX) (target_ulong EA) |
974 |
{ |
975 |
uint64_t ret; |
976 |
ret = (uint64_t)glue(ld32r, MEMSUFFIX)(EA) << 32;
|
977 |
ret |= (uint64_t)glue(ld32r, MEMSUFFIX)(EA + 4);
|
978 |
return ret;
|
979 |
} |
980 |
PPC_SPE_LD_OP(dw_le, spe_ldw_le); |
981 |
static inline void glue(spe_stdw_le, MEMSUFFIX) (target_ulong EA, |
982 |
uint64_t data) |
983 |
{ |
984 |
glue(st32r, MEMSUFFIX)(EA, data >> 32);
|
985 |
glue(st32r, MEMSUFFIX)(EA + 4, data);
|
986 |
} |
987 |
PPC_SPE_ST_OP(dw_le, spe_stdw_le); |
988 |
static inline uint64_t glue(spe_ldh, MEMSUFFIX) (target_ulong EA) |
989 |
{ |
990 |
uint64_t ret; |
991 |
ret = (uint64_t)glue(lduw, MEMSUFFIX)(EA) << 48;
|
992 |
ret |= (uint64_t)glue(lduw, MEMSUFFIX)(EA + 2) << 32; |
993 |
ret |= (uint64_t)glue(lduw, MEMSUFFIX)(EA + 4) << 16; |
994 |
ret |= (uint64_t)glue(lduw, MEMSUFFIX)(EA + 6);
|
995 |
return ret;
|
996 |
} |
997 |
PPC_SPE_LD_OP(dh, spe_ldh); |
998 |
static inline void glue(spe_stdh, MEMSUFFIX) (target_ulong EA, uint64_t data) |
999 |
{ |
1000 |
glue(stw, MEMSUFFIX)(EA, data >> 48);
|
1001 |
glue(stw, MEMSUFFIX)(EA + 2, data >> 32); |
1002 |
glue(stw, MEMSUFFIX)(EA + 4, data >> 16); |
1003 |
glue(stw, MEMSUFFIX)(EA + 6, data);
|
1004 |
} |
1005 |
PPC_SPE_ST_OP(dh, spe_stdh); |
1006 |
static inline uint64_t glue(spe_ldh_le, MEMSUFFIX) (target_ulong EA) |
1007 |
{ |
1008 |
uint64_t ret; |
1009 |
ret = (uint64_t)glue(ld16r, MEMSUFFIX)(EA) << 48;
|
1010 |
ret |= (uint64_t)glue(ld16r, MEMSUFFIX)(EA + 2) << 32; |
1011 |
ret |= (uint64_t)glue(ld16r, MEMSUFFIX)(EA + 4) << 16; |
1012 |
ret |= (uint64_t)glue(ld16r, MEMSUFFIX)(EA + 6);
|
1013 |
return ret;
|
1014 |
} |
1015 |
PPC_SPE_LD_OP(dh_le, spe_ldh_le); |
1016 |
static inline void glue(spe_stdh_le, MEMSUFFIX) (target_ulong EA, |
1017 |
uint64_t data) |
1018 |
{ |
1019 |
glue(st16r, MEMSUFFIX)(EA, data >> 48);
|
1020 |
glue(st16r, MEMSUFFIX)(EA + 2, data >> 32); |
1021 |
glue(st16r, MEMSUFFIX)(EA + 4, data >> 16); |
1022 |
glue(st16r, MEMSUFFIX)(EA + 6, data);
|
1023 |
} |
1024 |
PPC_SPE_ST_OP(dh_le, spe_stdh_le); |
1025 |
static inline uint64_t glue(spe_lwhe, MEMSUFFIX) (target_ulong EA) |
1026 |
{ |
1027 |
uint64_t ret; |
1028 |
ret = (uint64_t)glue(lduw, MEMSUFFIX)(EA) << 48;
|
1029 |
ret |= (uint64_t)glue(lduw, MEMSUFFIX)(EA + 2) << 16; |
1030 |
return ret;
|
1031 |
} |
1032 |
PPC_SPE_LD_OP(whe, spe_lwhe); |
1033 |
static inline void glue(spe_stwhe, MEMSUFFIX) (target_ulong EA, uint64_t data) |
1034 |
{ |
1035 |
glue(stw, MEMSUFFIX)(EA, data >> 48);
|
1036 |
glue(stw, MEMSUFFIX)(EA + 2, data >> 16); |
1037 |
} |
1038 |
PPC_SPE_ST_OP(whe, spe_stwhe); |
1039 |
static inline uint64_t glue(spe_lwhe_le, MEMSUFFIX) (target_ulong EA) |
1040 |
{ |
1041 |
uint64_t ret; |
1042 |
ret = (uint64_t)glue(ld16r, MEMSUFFIX)(EA) << 48;
|
1043 |
ret |= (uint64_t)glue(ld16r, MEMSUFFIX)(EA + 2) << 16; |
1044 |
return ret;
|
1045 |
} |
1046 |
PPC_SPE_LD_OP(whe_le, spe_lwhe_le); |
1047 |
static inline void glue(spe_stwhe_le, MEMSUFFIX) (target_ulong EA, |
1048 |
uint64_t data) |
1049 |
{ |
1050 |
glue(st16r, MEMSUFFIX)(EA, data >> 48);
|
1051 |
glue(st16r, MEMSUFFIX)(EA + 2, data >> 16); |
1052 |
} |
1053 |
PPC_SPE_ST_OP(whe_le, spe_stwhe_le); |
1054 |
static inline uint64_t glue(spe_lwhou, MEMSUFFIX) (target_ulong EA) |
1055 |
{ |
1056 |
uint64_t ret; |
1057 |
ret = (uint64_t)glue(lduw, MEMSUFFIX)(EA) << 32;
|
1058 |
ret |= (uint64_t)glue(lduw, MEMSUFFIX)(EA + 2);
|
1059 |
return ret;
|
1060 |
} |
1061 |
PPC_SPE_LD_OP(whou, spe_lwhou); |
1062 |
static inline uint64_t glue(spe_lwhos, MEMSUFFIX) (target_ulong EA) |
1063 |
{ |
1064 |
uint64_t ret; |
1065 |
ret = ((uint64_t)((int32_t)glue(ldsw, MEMSUFFIX)(EA))) << 32;
|
1066 |
ret |= (uint64_t)((int32_t)glue(ldsw, MEMSUFFIX)(EA + 2));
|
1067 |
return ret;
|
1068 |
} |
1069 |
PPC_SPE_LD_OP(whos, spe_lwhos); |
1070 |
static inline void glue(spe_stwho, MEMSUFFIX) (target_ulong EA, uint64_t data) |
1071 |
{ |
1072 |
glue(stw, MEMSUFFIX)(EA, data >> 32);
|
1073 |
glue(stw, MEMSUFFIX)(EA + 2, data);
|
1074 |
} |
1075 |
PPC_SPE_ST_OP(who, spe_stwho); |
1076 |
static inline uint64_t glue(spe_lwhou_le, MEMSUFFIX) (target_ulong EA) |
1077 |
{ |
1078 |
uint64_t ret; |
1079 |
ret = (uint64_t)glue(ld16r, MEMSUFFIX)(EA) << 32;
|
1080 |
ret |= (uint64_t)glue(ld16r, MEMSUFFIX)(EA + 2);
|
1081 |
return ret;
|
1082 |
} |
1083 |
PPC_SPE_LD_OP(whou_le, spe_lwhou_le); |
1084 |
static inline uint64_t glue(spe_lwhos_le, MEMSUFFIX) (target_ulong EA) |
1085 |
{ |
1086 |
uint64_t ret; |
1087 |
ret = ((uint64_t)((int32_t)glue(ld16rs, MEMSUFFIX)(EA))) << 32;
|
1088 |
ret |= (uint64_t)((int32_t)glue(ld16rs, MEMSUFFIX)(EA + 2));
|
1089 |
return ret;
|
1090 |
} |
1091 |
PPC_SPE_LD_OP(whos_le, spe_lwhos_le); |
1092 |
static inline void glue(spe_stwho_le, MEMSUFFIX) (target_ulong EA, |
1093 |
uint64_t data) |
1094 |
{ |
1095 |
glue(st16r, MEMSUFFIX)(EA, data >> 32);
|
1096 |
glue(st16r, MEMSUFFIX)(EA + 2, data);
|
1097 |
} |
1098 |
PPC_SPE_ST_OP(who_le, spe_stwho_le); |
1099 |
#if !defined(TARGET_PPC64)
|
1100 |
static inline void glue(spe_stwwo, MEMSUFFIX) (target_ulong EA, uint64_t data) |
1101 |
{ |
1102 |
glue(stl, MEMSUFFIX)(EA, data); |
1103 |
} |
1104 |
PPC_SPE_ST_OP(wwo, spe_stwwo); |
1105 |
static inline void glue(spe_stwwo_le, MEMSUFFIX) (target_ulong EA, |
1106 |
uint64_t data) |
1107 |
{ |
1108 |
glue(st32r, MEMSUFFIX)(EA, data); |
1109 |
} |
1110 |
PPC_SPE_ST_OP(wwo_le, spe_stwwo_le); |
1111 |
#endif
|
1112 |
static inline uint64_t glue(spe_lh, MEMSUFFIX) (target_ulong EA) |
1113 |
{ |
1114 |
uint16_t tmp; |
1115 |
tmp = glue(lduw, MEMSUFFIX)(EA); |
1116 |
return ((uint64_t)tmp << 48) | ((uint64_t)tmp << 16); |
1117 |
} |
1118 |
PPC_SPE_LD_OP(h, spe_lh); |
1119 |
static inline uint64_t glue(spe_lh_le, MEMSUFFIX) (target_ulong EA) |
1120 |
{ |
1121 |
uint16_t tmp; |
1122 |
tmp = glue(ld16r, MEMSUFFIX)(EA); |
1123 |
return ((uint64_t)tmp << 48) | ((uint64_t)tmp << 16); |
1124 |
} |
1125 |
PPC_SPE_LD_OP(h_le, spe_lh_le); |
1126 |
static inline uint64_t glue(spe_lwwsplat, MEMSUFFIX) (target_ulong EA) |
1127 |
{ |
1128 |
uint32_t tmp; |
1129 |
tmp = glue(ldl, MEMSUFFIX)(EA); |
1130 |
return ((uint64_t)tmp << 32) | (uint64_t)tmp; |
1131 |
} |
1132 |
PPC_SPE_LD_OP(wwsplat, spe_lwwsplat); |
1133 |
static inline uint64_t glue(spe_lwwsplat_le, MEMSUFFIX) (target_ulong EA) |
1134 |
{ |
1135 |
uint32_t tmp; |
1136 |
tmp = glue(ld32r, MEMSUFFIX)(EA); |
1137 |
return ((uint64_t)tmp << 32) | (uint64_t)tmp; |
1138 |
} |
1139 |
PPC_SPE_LD_OP(wwsplat_le, spe_lwwsplat_le); |
1140 |
static inline uint64_t glue(spe_lwhsplat, MEMSUFFIX) (target_ulong EA) |
1141 |
{ |
1142 |
uint64_t ret; |
1143 |
uint16_t tmp; |
1144 |
tmp = glue(lduw, MEMSUFFIX)(EA); |
1145 |
ret = ((uint64_t)tmp << 48) | ((uint64_t)tmp << 32); |
1146 |
tmp = glue(lduw, MEMSUFFIX)(EA + 2);
|
1147 |
ret |= ((uint64_t)tmp << 16) | (uint64_t)tmp;
|
1148 |
return ret;
|
1149 |
} |
1150 |
PPC_SPE_LD_OP(whsplat, spe_lwhsplat); |
1151 |
static inline uint64_t glue(spe_lwhsplat_le, MEMSUFFIX) (target_ulong EA) |
1152 |
{ |
1153 |
uint64_t ret; |
1154 |
uint16_t tmp; |
1155 |
tmp = glue(ld16r, MEMSUFFIX)(EA); |
1156 |
ret = ((uint64_t)tmp << 48) | ((uint64_t)tmp << 32); |
1157 |
tmp = glue(ld16r, MEMSUFFIX)(EA + 2);
|
1158 |
ret |= ((uint64_t)tmp << 16) | (uint64_t)tmp;
|
1159 |
return ret;
|
1160 |
} |
1161 |
PPC_SPE_LD_OP(whsplat_le, spe_lwhsplat_le); |
1162 |
#endif /* defined(TARGET_PPCEMB) */ |
1163 |
|
1164 |
#undef MEMSUFFIX
|