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/*
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* QEMU PC System Emulator
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*
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* Copyright (c) 2003-2004 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "vl.h" |
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/* output Bochs bios info messages */
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//#define DEBUG_BIOS
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#define BIOS_FILENAME "bios.bin" |
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#define VGABIOS_FILENAME "vgabios.bin" |
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#define LINUX_BOOT_FILENAME "linux_boot.bin" |
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#define KERNEL_LOAD_ADDR 0x00100000 |
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#define INITRD_LOAD_ADDR 0x00400000 |
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#define KERNEL_PARAMS_ADDR 0x00090000 |
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#define KERNEL_CMDLINE_ADDR 0x00099000 |
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int speaker_data_on;
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int dummy_refresh_clock;
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static fdctrl_t *floppy_controller;
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static RTCState *rtc_state;
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static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) |
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{ |
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} |
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/* PC cmos mappings */
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#define REG_EQUIPMENT_BYTE 0x14 |
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#define REG_IBM_CENTURY_BYTE 0x32 |
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#define REG_IBM_PS2_CENTURY_BYTE 0x37 |
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static inline int to_bcd(RTCState *s, int a) |
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{ |
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return ((a / 10) << 4) | (a % 10); |
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} |
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static void cmos_init(int ram_size, int boot_device) |
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{ |
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RTCState *s = rtc_state; |
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int val;
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int fd0, fd1, nb;
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time_t ti; |
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struct tm *tm;
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/* set the CMOS date */
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time(&ti); |
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tm = gmtime(&ti); |
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rtc_set_date(s, tm); |
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val = to_bcd(s, (tm->tm_year / 100) + 19); |
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rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val); |
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rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val); |
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/* various important CMOS locations needed by PC/Bochs bios */
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/* memory size */
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val = (ram_size / 1024) - 1024; |
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if (val > 65535) |
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val = 65535;
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rtc_set_memory(s, 0x17, val);
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rtc_set_memory(s, 0x18, val >> 8); |
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rtc_set_memory(s, 0x30, val);
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rtc_set_memory(s, 0x31, val >> 8); |
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val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); |
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if (val > 65535) |
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val = 65535;
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rtc_set_memory(s, 0x34, val);
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rtc_set_memory(s, 0x35, val >> 8); |
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switch(boot_device) {
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case 'a': |
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case 'b': |
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rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */ |
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break;
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default:
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case 'c': |
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rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */ |
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break;
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case 'd': |
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rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */ |
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break;
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} |
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/* floppy type */
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fd0 = fdctrl_get_drive_type(floppy_controller, 0);
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fd1 = fdctrl_get_drive_type(floppy_controller, 1);
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val = 0;
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switch (fd0) {
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case 0: |
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/* 1.44 Mb 3"5 drive */
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val |= 0x40;
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break;
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case 1: |
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/* 2.88 Mb 3"5 drive */
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val |= 0x60;
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break;
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case 2: |
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/* 1.2 Mb 5"5 drive */
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val |= 0x20;
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break;
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} |
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switch (fd1) {
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case 0: |
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/* 1.44 Mb 3"5 drive */
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val |= 0x04;
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break;
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case 1: |
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/* 2.88 Mb 3"5 drive */
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val |= 0x06;
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break;
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case 2: |
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/* 1.2 Mb 5"5 drive */
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val |= 0x02;
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break;
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} |
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rtc_set_memory(s, 0x10, val);
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val = 0;
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nb = 0;
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if (fd0 < 3) |
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nb++; |
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if (fd1 < 3) |
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nb++; |
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switch (nb) {
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case 0: |
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break;
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case 1: |
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val |= 0x01; /* 1 drive, ready for boot */ |
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break;
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case 2: |
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val |= 0x41; /* 2 drives, ready for boot */ |
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break;
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} |
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val |= 0x02; /* FPU is there */ |
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val |= 0x04; /* PS/2 mouse installed */ |
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rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); |
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} |
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static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val) |
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{ |
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speaker_data_on = (val >> 1) & 1; |
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pit_set_gate(&pit_channels[2], val & 1); |
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} |
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static uint32_t speaker_ioport_read(void *opaque, uint32_t addr) |
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{ |
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int out;
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out = pit_get_out(&pit_channels[2], qemu_get_clock(vm_clock));
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dummy_refresh_clock ^= 1;
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return (speaker_data_on << 1) | pit_channels[2].gate | (out << 5) | |
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(dummy_refresh_clock << 4);
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} |
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static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) |
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{ |
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cpu_x86_set_a20(cpu_single_env, (val >> 1) & 1); |
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/* XXX: bit 0 is fast reset */
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} |
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static uint32_t ioport92_read(void *opaque, uint32_t addr) |
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{ |
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return ((cpu_single_env->a20_mask >> 20) & 1) << 1; |
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} |
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/***********************************************************/
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/* Bochs BIOS debug ports */
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void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) |
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{ |
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switch(addr) {
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/* Bochs BIOS messages */
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case 0x400: |
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case 0x401: |
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fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
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exit(1);
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case 0x402: |
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case 0x403: |
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#ifdef DEBUG_BIOS
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fprintf(stderr, "%c", val);
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#endif
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break;
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/* LGPL'ed VGA BIOS messages */
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case 0x501: |
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case 0x502: |
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fprintf(stderr, "VGA BIOS panic, line %d\n", val);
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exit(1);
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case 0x500: |
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case 0x503: |
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#ifdef DEBUG_BIOS
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fprintf(stderr, "%c", val);
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#endif
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break;
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} |
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} |
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void bochs_bios_init(void) |
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{ |
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register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL); |
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register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL); |
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register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL); |
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register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL); |
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register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL); |
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register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL); |
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register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL); |
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register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL); |
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} |
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int load_kernel(const char *filename, uint8_t *addr, |
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uint8_t *real_addr) |
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{ |
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int fd, size;
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int setup_sects;
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fd = open(filename, O_RDONLY); |
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if (fd < 0) |
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return -1; |
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/* load 16 bit code */
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if (read(fd, real_addr, 512) != 512) |
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goto fail;
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setup_sects = real_addr[0x1F1];
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if (!setup_sects)
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setup_sects = 4;
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if (read(fd, real_addr + 512, setup_sects * 512) != |
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setup_sects * 512)
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goto fail;
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/* load 32 bit code */
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size = read(fd, addr, 16 * 1024 * 1024); |
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if (size < 0) |
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goto fail;
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close(fd); |
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return size;
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fail:
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close(fd); |
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return -1; |
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} |
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static const int ide_iobase[2] = { 0x1f0, 0x170 }; |
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static const int ide_iobase2[2] = { 0x3f6, 0x376 }; |
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static const int ide_irq[2] = { 14, 15 }; |
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#define NE2000_NB_MAX 6 |
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static uint32_t ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 }; |
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static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; |
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/* PC hardware initialisation */
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void pc_init(int ram_size, int vga_ram_size, int boot_device, |
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DisplayState *ds, const char **fd_filename, int snapshot, |
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const char *kernel_filename, const char *kernel_cmdline, |
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const char *initrd_filename) |
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{ |
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char buf[1024]; |
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int ret, linux_boot, initrd_size, i, nb_nics1, fd;
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linux_boot = (kernel_filename != NULL);
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/* allocate RAM */
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cpu_register_physical_memory(0, ram_size, 0); |
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/* BIOS load */
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snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME); |
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ret = load_image(buf, phys_ram_base + 0x000f0000);
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if (ret != 0x10000) { |
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fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
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exit(1);
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} |
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/* VGA BIOS load */
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snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); |
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ret = load_image(buf, phys_ram_base + 0x000c0000);
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/* setup basic memory access */
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cpu_register_physical_memory(0xc0000, 0x10000, 0xc0000 | IO_MEM_ROM); |
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cpu_register_physical_memory(0xf0000, 0x10000, 0xf0000 | IO_MEM_ROM); |
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bochs_bios_init(); |
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if (linux_boot) {
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uint8_t bootsect[512];
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if (bs_table[0] == NULL) { |
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fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
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exit(1);
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} |
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snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME); |
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ret = load_image(buf, bootsect); |
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if (ret != sizeof(bootsect)) { |
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fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
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buf); |
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exit(1);
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} |
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bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect)); |
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/* now we can load the kernel */
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ret = load_kernel(kernel_filename, |
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phys_ram_base + KERNEL_LOAD_ADDR, |
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phys_ram_base + KERNEL_PARAMS_ADDR); |
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if (ret < 0) { |
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fprintf(stderr, "qemu: could not load kernel '%s'\n",
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kernel_filename); |
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exit(1);
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} |
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/* load initrd */
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initrd_size = 0;
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if (initrd_filename) {
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initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR); |
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if (initrd_size < 0) { |
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fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
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initrd_filename); |
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exit(1);
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} |
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} |
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if (initrd_size > 0) { |
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stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
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stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
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} |
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pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
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kernel_cmdline); |
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stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F); |
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stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
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KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR); |
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/* loader type */
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stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01); |
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} |
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/* init basic PC hardware */
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register_ioport_write(0x80, 1, 1, ioport80_write, NULL); |
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vga_initialize(ds, phys_ram_base + ram_size, ram_size, |
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vga_ram_size); |
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rtc_state = rtc_init(0x70, 8); |
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register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL); |
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register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL); |
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register_ioport_read(0x92, 1, 1, ioport92_read, NULL); |
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register_ioport_write(0x92, 1, 1, ioport92_write, NULL); |
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pic_init(); |
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pit_init(0x40, 0); |
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fd = serial_open_device(); |
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serial_init(0x3f8, 4, fd); |
377 |
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nb_nics1 = nb_nics; |
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if (nb_nics1 > NE2000_NB_MAX)
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nb_nics1 = NE2000_NB_MAX; |
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for(i = 0; i < nb_nics1; i++) { |
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ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]); |
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} |
384 |
|
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for(i = 0; i < 2; i++) { |
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ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i], |
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bs_table[2 * i], bs_table[2 * i + 1]); |
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} |
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kbd_init(); |
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DMA_init(); |
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|
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#ifndef _WIN32
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/* no audio supported yet for win32 */
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AUD_init(); |
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SB16_init(); |
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#endif
|
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|
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floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table); |
399 |
|
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cmos_init(ram_size, boot_device); |
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} |