Revision e1bf387e
| b/target-mips/cpu.h | ||
|---|---|---|
| 142 | 142 |
target_ulong PC[MIPS_TC_MAX]; |
| 143 | 143 |
#if TARGET_LONG_BITS > HOST_LONG_BITS |
| 144 | 144 |
target_ulong t0; |
| 145 |
target_ulong t1; |
|
| 146 | 145 |
#endif |
| 147 | 146 |
/* temporary hack for FP globals */ |
| 148 | 147 |
#ifndef USE_HOST_FLOAT_REGS |
| b/target-mips/exec.h | ||
|---|---|---|
| 12 | 12 |
|
| 13 | 13 |
#if TARGET_LONG_BITS > HOST_LONG_BITS |
| 14 | 14 |
#define T0 (env->t0) |
| 15 |
#define T1 (env->t1) |
|
| 16 | 15 |
#else |
| 17 | 16 |
register target_ulong T0 asm(AREG1); |
| 18 |
register target_ulong T1 asm(AREG2); |
|
| 19 | 17 |
#endif |
| 20 | 18 |
|
| 21 | 19 |
#if defined (USE_HOST_FLOAT_REGS) |
| b/target-mips/translate.c | ||
|---|---|---|
| 423 | 423 |
}; |
| 424 | 424 |
|
| 425 | 425 |
/* global register indices */ |
| 426 |
static TCGv cpu_env, current_tc_gprs, current_tc_hi, current_fpu, cpu_T[2];
|
|
| 426 |
static TCGv cpu_env, current_tc_gprs, current_tc_hi, current_fpu, cpu_T[1];
|
|
| 427 | 427 |
|
| 428 | 428 |
/* FPU TNs, global for now. */ |
| 429 | 429 |
static TCGv fpu32_T[3], fpu64_T[3], fpu32h_T[3]; |
| ... | ... | |
| 8072 | 8072 |
#if TARGET_LONG_BITS > HOST_LONG_BITS |
| 8073 | 8073 |
cpu_T[0] = tcg_global_mem_new(TCG_TYPE_TL, |
| 8074 | 8074 |
TCG_AREG0, offsetof(CPUState, t0), "T0"); |
| 8075 |
cpu_T[1] = tcg_global_mem_new(TCG_TYPE_TL, |
|
| 8076 |
TCG_AREG0, offsetof(CPUState, t1), "T1"); |
|
| 8077 | 8075 |
#else |
| 8078 | 8076 |
cpu_T[0] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG1, "T0"); |
| 8079 |
cpu_T[1] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG2, "T1"); |
|
| 8080 | 8077 |
#endif |
| 8081 | 8078 |
|
| 8082 | 8079 |
/* register helpers */ |
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