Archipelago » qemu

endif

ifeq ($(ARCH),mips)

LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld

else

LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH)el.ld

endif

ifeq ($(ARCH),mips64)

LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld

else

LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH)el.ld

endif

ifeq ($(ARCH),mips)

LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld

else

LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH)el.ld

endif

ifeq ($(ARCH),mips64)

LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld

else

LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH)el.ld

    AUD_FMT_S32

} audfmt_e;

#define AUDIO_HOST_ENDIANNESS 1

#else

#define AUDIO_HOST_ENDIANNESS 0

    *s = bswap64(*s);

}

#define be_bswap(v, size) (v)

#define le_bswap(v, size) bswap ## size(v)

#define be_bswaps(v, size)

#endif

#define cpu_to_32wu cpu_to_be32wu

#else

#define cpu_to_32wu cpu_to_le32wu

  echo "STRIP_OPT=-s" >> $config_host_mak

fi

if test "$bigendian" = "yes" ; then

fi

echo "#define HOST_LONG_BITS $hostlongbits" >> $config_host_h

if test "$mingw32" = "yes" ; then

		(((uint32_t)(__x) & (uint32_t)0x00ff0000UL) >>  8) | \

		(((uint32_t)(__x) & (uint32_t)0xff000000UL) >> 24) ))

#define PAT(x) x

#else

#define PAT(x) cbswap_32(x)

    surface->height = height;

    surface->linesize = width * 4;

    surface->pf = qemu_default_pixelformat(32);

    surface->flags = QEMU_ALLOCATED_FLAG | QEMU_BIG_ENDIAN_FLAG;

#else

    surface->flags = QEMU_ALLOCATED_FLAG;

        surface->data = (uint8_t*) qemu_realloc(surface->data, surface->linesize * surface->height);

    else

        surface->data = (uint8_t*) qemu_malloc(surface->linesize * surface->height);

    surface->flags = QEMU_ALLOCATED_FLAG | QEMU_BIG_ENDIAN_FLAG;

#else

    surface->flags = QEMU_ALLOCATED_FLAG;

    surface->height = height;

    surface->linesize = linesize;

    surface->pf = qemu_default_pixelformat(bpp);

    surface->flags = QEMU_BIG_ENDIAN_FLAG;

#endif

    surface->data = data;

 * WORDS_ALIGNED : if defined, the host cpu can only make word aligned

 * memory accesses.

 *

 * otherwise little endian.

 *

 * (TARGET_WORDS_ALIGNED : same for target cpu (not supported yet))

#include "softfloat.h"

#define BSWAP_NEEDED

#endif

   endian ! */

typedef union {

    float64 d;

    || (defined(__arm__) && !defined(__VFP_FP__) && !defined(CONFIG_SOFTFLOAT))

    struct {

        uint32_t upper;

#ifdef TARGET_SPARC

typedef union {

    float128 q;

    || (defined(__arm__) && !defined(__VFP_FP__) && !defined(CONFIG_SOFTFLOAT))

    struct {

        uint32_t upmost;

/* NOTE: on arm, putting 2 in /proc/sys/debug/alignment so that the

   kernel handles unaligned load/stores may give better results, but

   it is a system wide setting : bad */

/* conservative code for little endian unaligned accesses */

static inline int lduw_le_p(const void *ptr)

}

#endif

static inline int lduw_be_p(const void *ptr)

{

                   sizeof(target_phys_addr_t))];

} CPUTLBEntry;

typedef struct icount_decr_u16 {

    uint16_t high;

    uint16_t low;

    disasm_info.buffer_vma = (unsigned long)code;

    disasm_info.buffer_length = size;

    disasm_info.endian = BFD_ENDIAN_BIG;

#else

    disasm_info.endian = BFD_ENDIAN_LITTLE;

#endif

#ifdef FLOAT128

typedef struct {

    uint64_t high, low;

#else

    uint64_t low, high;

# error unknown bit depth

#endif

# define SWAP_WORDS	1

#endif

 * be continuously allocated.  We do it though, to preserve similar

 * behaviour between hosts.  Some things, like the BD_ADDR cannot be

 * preserved though (for example if a real hci is used).  */

# define HNDL(raw)	bswap16(raw)

#else

# define HNDL(raw)	(raw)

#define ldebug(...)

#endif

#define GUS_ENDIANNESS 1

#else

#define GUS_ENDIANNESS 0

static void glue(draw_line16_, DEPTH)(void *opaque,

                uint8_t *d, const uint8_t *s, int width, int deststep)

{

    memcpy(d, s, width * 2);

#else

    uint16_t v;

#if ORDER == 0

#define NAME glue(glue(lblp_, BORDER), BITS)

#define SWAP_WORDS 1

#endif

#elif ORDER == 1

#define NAME glue(glue(bbbp_, BORDER), BITS)

#define SWAP_WORDS 1

#endif

#else

#define SWAP_PIXELS 1

#define NAME glue(glue(lbbp_, BORDER), BITS)

#define SWAP_WORDS 1

#endif

#endif

# error unknown bit depth

#endif

# define SWAP_WORDS	1

#endif

		(((uint32_t)(__x) & (uint32_t)0x00ff0000UL) >>  8) | \

		(((uint32_t)(__x) & (uint32_t)0xff000000UL) >> 24) ))

#define PAT(x) cbswap_32(x)

#else

#define PAT(x) (x)

#endif

#define BIG 1

#else

#define BIG 0

#endif

#define GET_PLANE(data, p) (((data) >> (24 - (p) * 8)) & 0xff)

#else

#define GET_PLANE(data, p) (((data) >> ((p) * 8)) & 0xff)

#undef PAT

#define PAT(x) (x)

#else

#define PAT(x) cbswap_32(x)

                if (cx > cx_max)

                    cx_max = cx;

                *ch_attr_ptr = ch_attr;

                ch = ch_attr >> 8;

                cattr = ch_attr & 0xff;

#else

        disp_width != s->last_width ||

        height != s->last_height ||

        s->last_depth != depth) {

        if (depth == 16 || depth == 32) {

#else

        if (depth == 32) {

            s->ds->surface = qemu_create_displaysurface_from(disp_width, height, depth,

                    s->line_offset,

                    s->vram_ptr + (s->start_addr * 4));

            s->ds->surface->pf = qemu_different_endianness_pixelformat(depth);

#endif

            dpy_resize(s->ds);

static void glue(vga_draw_line15_, PIXEL_NAME)(VGAState *s1, uint8_t *d,

                                          const uint8_t *s, int width)

{

    memcpy(d, s, width * 2);

#else

    int w;

static void glue(vga_draw_line16_, PIXEL_NAME)(VGAState *s1, uint8_t *d,

                                          const uint8_t *s, int width)

{

    memcpy(d, s, width * 2);

#else

    int w;

static void glue(vga_draw_line32_, PIXEL_NAME)(VGAState *s1, uint8_t *d,

                                          const uint8_t *s, int width)

{

    memcpy(d, s, width * 4);

#else

    int w;

      case MNF_CODE:

      {

         unsigned int *p = (unsigned int*)&rFm;

         p[0] ^= 0x80000000;

#else

         p[1] ^= 0x80000000;

      case ABS_CODE:

      {

         unsigned int *p = (unsigned int*)&rFm;

         p[0] &= 0x7fffffff;

#else

         p[1] &= 0x7fffffff;

   unsigned int *p;

   p = (unsigned int*)&fpa11->fpreg[Fn].fDouble;

   fpa11->fType[Fn] = typeDouble;

   /* FIXME - handle failure of get_user() */

   get_user_u32(p[0], addr); /* sign & exponent */

   get_user_u32(p[1], addr + 4);

      default: val = fpa11->fpreg[Fn].fDouble;

   }

   /* FIXME - handle put_user() failures */

   put_user_u32(p[0], addr);	/* msw */

   put_user_u32(p[1], addr + 4);	/* lsw */

#else

        e_ident[2] != ELFMAG2 ||

        e_ident[3] != ELFMAG3)

        goto fail;

    data_order = ELFDATA2MSB;

#else

    data_order = ELFDATA2LSB;

static void bswap_uboot_header(uboot_image_header_t *hdr)

{

    bswap32s(&hdr->ih_magic);

    bswap32s(&hdr->ih_hcrc);

    bswap32s(&hdr->ih_time);

            surface->linesize = width * host_format.BytesPerPixel;

            surface->pf = sdl_to_qemu_pixelformat(&host_format);

        }

        surface->flags = QEMU_ALLOCATED_FLAG | QEMU_BIG_ENDIAN_FLAG;

#else

        surface->flags = QEMU_ALLOCATED_FLAG;

    surface->linesize = real_screen->pitch;

    surface->data = real_screen->pixels;

    surface->flags = QEMU_REALPIXELS_FLAG | QEMU_BIG_ENDIAN_FLAG;

#else

    surface->flags = QEMU_REALPIXELS_FLAG;

#ifndef _IP_H_

#define _IP_H_

# ifndef NTOHL

#  define NTOHL(d)

# endif

 * Structure of an internet header, naked of options.

 */

struct ip {

	u_int ip_v:4,			/* version */

		ip_hl:4;		/* header length */

#else

	u_int8_t	ipt_code;		/* IPOPT_TS */

	u_int8_t	ipt_len;		/* size of structure (variable) */

	u_int8_t	ipt_ptr;		/* index of current entry */

	u_int	ipt_oflw:4,		/* overflow counter */

		ipt_flg:4;		/* flags, see below */

#else

#undef HAVE_SYS_BITYPES_H

/* Define if the machine is big endian */

/* Define if your sprintf returns char * instead of int */

#undef BAD_SPRINTF

	u_int16_t	th_dport;		/* destination port */

	tcp_seq	th_seq;			/* sequence number */

	tcp_seq	th_ack;			/* acknowledgement number */

	u_int	th_off:4,		/* data offset */

		th_x2:4;		/* (unused) */

#else

{ \

    type v1; \

} neon_##name;

#define NEON_TYPE2(name, type) \

typedef struct \

{ \

    uint64_t q;

} MMXReg;

#define XMM_B(n) _b[15 - (n)]

#define XMM_W(n) _w[7 - (n)]

#define XMM_L(n) _l[3 - (n)]

/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */

typedef union {

    double d;

    struct {

        uint32_t lower;

        int32_t upper;

#endif /* !TARGET_X86_64 */

#define REG_B_OFFSET (sizeof(target_ulong) - 1)

#define REG_H_OFFSET (sizeof(target_ulong) - 2)

#define REG_W_OFFSET (sizeof(target_ulong) - 2)

            break;

        case 4: /* smsw */

            gen_svm_check_intercept(s, pc_start, SVM_EXIT_READ_CR0);

            tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,cr[0]) + 4);

#else

            tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,cr[0]));

/* define FP_ENDIAN_IDX to access the same location

 * in the fpr_t union regardless of the host endianess

 */

#  define FP_ENDIAN_IDX 1

#else

#  define FP_ENDIAN_IDX 0

/*****************************************************************************/

/* Altivec extension helpers */

#define HI_IDX 0

#define LO_IDX 1

#else

#define LO_IDX 0

#endif

#define VECTOR_FOR_INORDER_I(index, element)            \

    for (index = 0; index < ARRAY_SIZE(r->element); index++)

#else

void helper_mtvscr (ppc_avr_t *r)

{

    env->vscr = r->u32[3];

#else

    env->vscr = r->u32[0];

        }                                                               \

        *r = result;                                                    \

    }

#define MRGHI 0

#define MRGLO 1

#else

    int i;

    VECTOR_FOR_INORDER_I (i, u8) {

        int s = c->u8[i] & 0x1f;

        int index = s & 0xf;

#else

        int index = 15 - (s & 0xf);

    *r = result;

}

#define PKBIG 1

#else

#define PKBIG 0

{

    int i, j;

    ppc_avr_t result;

    const ppc_avr_t *x[2] = { a, b };

#else

    const ppc_avr_t *x[2] = { b, a };

    }

}

#define LEFT 0

#define RIGHT 1

#else

    int i;

    ppc_avr_t result;

    for (i = 0; i < ARRAY_SIZE(r->u8); i++) {

        int index = sh + i;

        if (index > 0xf) {

{

  int sh = (b->u8[LO_IDX*0xf] >> 3) & 0xf;

  memmove (&r->u8[0], &a->u8[sh], 16-sh);

  memset (&r->u8[16-sh], 0, sh);

#else

/* Experimental testing shows that hardware masks the immediate.  */

#define _SPLAT_MASKED(element) (splat & (ARRAY_SIZE(r->element) - 1))

#define SPLAT_ELEMENT(element) _SPLAT_MASKED(element)

#else

#define SPLAT_ELEMENT(element) (ARRAY_SIZE(r->element)-1 - _SPLAT_MASKED(element))

{

  int sh = (b->u8[LO_IDX*0xf] >> 3) & 0xf;

  memmove (&r->u8[sh], &a->u8[0], 16-sh);

  memset (&r->u8[0], 0, sh);

#else

    ppc_avr_t result;

    int sat = 0;

    upper = ARRAY_SIZE(r->s32)-1;

#else

    upper = 0;

    ppc_avr_t result;

    int sat = 0;

    upper = 1;

#else

    upper = 0;

    }

}

#define UPKHI 1

#define UPKLO 0

#else

        cpu_reg_names_size -= (i < 10) ? 4 : 5;

        snprintf(p, cpu_reg_names_size, "avr%dH", i);

        cpu_avrh[i] = tcg_global_mem_new_i64(TCG_AREG0,

                                             offsetof(CPUState, avr[i].u64[0]), p);

#else

        cpu_reg_names_size -= (i < 10) ? 6 : 7;

        snprintf(p, cpu_reg_names_size, "avr%dL", i);

        cpu_avrl[i] = tcg_global_mem_new_i64(TCG_AREG0,

                                             offsetof(CPUState, avr[i].u64[1]), p);

#else

static int gdb_get_avr_reg(CPUState *env, uint8_t *mem_buf, int n)

{

    if (n < 32) {

        stq_p(mem_buf, env->avr[n].u64[0]);

        stq_p(mem_buf+8, env->avr[n].u64[1]);

#else

static int gdb_set_avr_reg(CPUState *env, uint8_t *mem_buf, int n)

{

    if (n < 32) {

        env->avr[n].u64[0] = ldq_p(mem_buf);

        env->avr[n].u64[1] = ldq_p(mem_buf+8);

#else

    *((uint64_t *)&DT0) = tmp;

}

#define VIS_B64(n) b[7 - (n)]

#define VIS_W64(n) w[3 - (n)]

#define VIS_SW64(n) sw[3 - (n)]

static inline void tcg_out_b_noaddr(TCGContext *s, int cond)

{

    tcg_out8(s, (cond << 4) | 0x0a);

    s->code_ptr += 3;

#else

    union {

        uint64_t ll;

        struct {

            uint32_t high, low;

#else

            uint32_t low, high;

    vnc_write_u8(vs, vs->ds->surface->pf.bits_per_pixel); /* bits-per-pixel */

    vnc_write_u8(vs, vs->ds->surface->pf.depth); /* depth */

    vnc_write_u8(vs, 1);             /* big-endian-flag */

#else

    vnc_write_u8(vs, 0);             /* big-endian-flag */