Revision e25c3887
| b/include/exec/softmmu_defs.h | ||
|---|---|---|
| 9 | 9 |
#ifndef SOFTMMU_DEFS_H |
| 10 | 10 |
#define SOFTMMU_DEFS_H |
| 11 | 11 |
|
| 12 |
uint8_t helper_ret_ldb_mmu(CPUArchState *env, target_ulong addr, |
|
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int mmu_idx, uintptr_t retaddr); |
|
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uint16_t helper_ret_ldw_mmu(CPUArchState *env, target_ulong addr, |
|
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int mmu_idx, uintptr_t retaddr); |
|
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uint32_t helper_ret_ldl_mmu(CPUArchState *env, target_ulong addr, |
|
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int mmu_idx, uintptr_t retaddr); |
|
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uint64_t helper_ret_ldq_mmu(CPUArchState *env, target_ulong addr, |
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int mmu_idx, uintptr_t retaddr); |
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|
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void helper_ret_stb_mmu(CPUArchState *env, target_ulong addr, uint8_t val, |
|
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int mmu_idx, uintptr_t retaddr); |
|
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void helper_ret_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val, |
|
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int mmu_idx, uintptr_t retaddr); |
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void helper_ret_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val, |
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int mmu_idx, uintptr_t retaddr); |
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void helper_ret_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val, |
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int mmu_idx, uintptr_t retaddr); |
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|
|
| 12 | 30 |
uint8_t helper_ldb_mmu(CPUArchState *env, target_ulong addr, int mmu_idx); |
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void helper_stb_mmu(CPUArchState *env, target_ulong addr, uint8_t val, |
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int mmu_idx); |
|
| 15 | 31 |
uint16_t helper_ldw_mmu(CPUArchState *env, target_ulong addr, int mmu_idx); |
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void helper_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val, |
|
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int mmu_idx); |
|
| 18 | 32 |
uint32_t helper_ldl_mmu(CPUArchState *env, target_ulong addr, int mmu_idx); |
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void helper_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val, |
|
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int mmu_idx); |
|
| 21 | 33 |
uint64_t helper_ldq_mmu(CPUArchState *env, target_ulong addr, int mmu_idx); |
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void helper_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val, |
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int mmu_idx); |
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|
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void helper_stb_mmu(CPUArchState *env, target_ulong addr, |
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uint8_t val, int mmu_idx); |
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void helper_stw_mmu(CPUArchState *env, target_ulong addr, |
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uint16_t val, int mmu_idx); |
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void helper_stl_mmu(CPUArchState *env, target_ulong addr, |
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uint32_t val, int mmu_idx); |
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void helper_stq_mmu(CPUArchState *env, target_ulong addr, |
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uint64_t val, int mmu_idx); |
|
| 24 | 43 |
|
| 25 | 44 |
uint8_t helper_ldb_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx); |
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void helper_stb_cmmu(CPUArchState *env, target_ulong addr, uint8_t val, |
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int mmu_idx); |
|
| 28 | 45 |
uint16_t helper_ldw_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx); |
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void helper_stw_cmmu(CPUArchState *env, target_ulong addr, uint16_t val, |
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int mmu_idx); |
|
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uint32_t helper_ldl_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx); |
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void helper_stl_cmmu(CPUArchState *env, target_ulong addr, uint32_t val, |
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int mmu_idx); |
|
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uint64_t helper_ldq_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx); |
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void helper_stq_cmmu(CPUArchState *env, target_ulong addr, uint64_t val, |
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int mmu_idx); |
|
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#endif |
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|
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#endif /* SOFTMMU_DEFS_H */ |
|
| b/include/exec/softmmu_template.h | ||
|---|---|---|
| 78 | 78 |
} |
| 79 | 79 |
|
| 80 | 80 |
/* handle all cases except unaligned access which span two pages */ |
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#ifdef SOFTMMU_CODE_ACCESS |
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static |
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#endif |
|
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DATA_TYPE |
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glue(glue(helper_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env, target_ulong addr, |
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int mmu_idx) |
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glue(glue(helper_ret_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env, |
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target_ulong addr, int mmu_idx, |
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uintptr_t retaddr) |
|
| 84 | 88 |
{
|
| 85 | 89 |
DATA_TYPE res; |
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int index; |
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target_ulong tlb_addr; |
| 88 | 92 |
hwaddr ioaddr; |
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uintptr_t retaddr; |
|
| 90 | 93 |
|
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/* test if there is match for unaligned or IO access */ |
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/* XXX: could done more in memory macro in a non portable way */ |
| ... | ... | |
| 98 | 101 |
/* IO access */ |
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if ((addr & (DATA_SIZE - 1)) != 0) |
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goto do_unaligned_access; |
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retaddr = GETPC_EXT(); |
|
| 102 | 104 |
ioaddr = env->iotlb[mmu_idx][index]; |
| 103 | 105 |
res = glue(io_read, SUFFIX)(env, ioaddr, addr, retaddr); |
| 104 | 106 |
} else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
|
| 105 | 107 |
/* slow unaligned access (it spans two pages or IO) */ |
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do_unaligned_access: |
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retaddr = GETPC_EXT(); |
|
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#ifdef ALIGNED_ONLY |
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do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
| 110 | 111 |
#endif |
| ... | ... | |
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uintptr_t addend; |
| 116 | 117 |
#ifdef ALIGNED_ONLY |
| 117 | 118 |
if ((addr & (DATA_SIZE - 1)) != 0) {
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retaddr = GETPC_EXT(); |
|
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do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
| 120 | 120 |
} |
| 121 | 121 |
#endif |
| ... | ... | |
| 124 | 124 |
(addr + addend)); |
| 125 | 125 |
} |
| 126 | 126 |
} else {
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/* the page is not in the TLB : fill it */ |
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retaddr = GETPC_EXT(); |
|
| 129 | 127 |
#ifdef ALIGNED_ONLY |
| 130 | 128 |
if ((addr & (DATA_SIZE - 1)) != 0) |
| 131 | 129 |
do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
| ... | ... | |
| 136 | 134 |
return res; |
| 137 | 135 |
} |
| 138 | 136 |
|
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DATA_TYPE |
|
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glue(glue(helper_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env, target_ulong addr, |
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int mmu_idx) |
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{
|
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return glue(glue(helper_ret_ld, SUFFIX), MMUSUFFIX)(env, addr, mmu_idx, |
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GETPC_EXT()); |
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} |
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|
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| 139 | 145 |
/* handle all unaligned cases */ |
| 140 | 146 |
static DATA_TYPE |
| 141 | 147 |
glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env, |
| ... | ... | |
| 214 | 220 |
io_mem_write(mr, physaddr, val, 1 << SHIFT); |
| 215 | 221 |
} |
| 216 | 222 |
|
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void glue(glue(helper_st, SUFFIX), MMUSUFFIX)(CPUArchState *env, |
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target_ulong addr, DATA_TYPE val, |
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int mmu_idx) |
|
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void |
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glue(glue(helper_ret_st, SUFFIX), MMUSUFFIX)(CPUArchState *env, |
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target_ulong addr, DATA_TYPE val, |
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int mmu_idx, uintptr_t retaddr) |
|
| 220 | 227 |
{
|
| 221 | 228 |
hwaddr ioaddr; |
| 222 | 229 |
target_ulong tlb_addr; |
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uintptr_t retaddr; |
|
| 224 | 230 |
int index; |
| 225 | 231 |
|
| 226 | 232 |
index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| ... | ... | |
| 231 | 237 |
/* IO access */ |
| 232 | 238 |
if ((addr & (DATA_SIZE - 1)) != 0) |
| 233 | 239 |
goto do_unaligned_access; |
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retaddr = GETPC_EXT(); |
|
| 235 | 240 |
ioaddr = env->iotlb[mmu_idx][index]; |
| 236 | 241 |
glue(io_write, SUFFIX)(env, ioaddr, val, addr, retaddr); |
| 237 | 242 |
} else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
|
| 238 | 243 |
do_unaligned_access: |
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retaddr = GETPC_EXT(); |
|
| 240 | 244 |
#ifdef ALIGNED_ONLY |
| 241 | 245 |
do_unaligned_access(env, addr, 1, mmu_idx, retaddr); |
| 242 | 246 |
#endif |
| ... | ... | |
| 247 | 251 |
uintptr_t addend; |
| 248 | 252 |
#ifdef ALIGNED_ONLY |
| 249 | 253 |
if ((addr & (DATA_SIZE - 1)) != 0) {
|
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retaddr = GETPC_EXT(); |
|
| 251 | 254 |
do_unaligned_access(env, addr, 1, mmu_idx, retaddr); |
| 252 | 255 |
} |
| 253 | 256 |
#endif |
| ... | ... | |
| 257 | 260 |
} |
| 258 | 261 |
} else {
|
| 259 | 262 |
/* the page is not in the TLB : fill it */ |
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retaddr = GETPC_EXT(); |
|
| 261 | 263 |
#ifdef ALIGNED_ONLY |
| 262 | 264 |
if ((addr & (DATA_SIZE - 1)) != 0) |
| 263 | 265 |
do_unaligned_access(env, addr, 1, mmu_idx, retaddr); |
| ... | ... | |
| 267 | 269 |
} |
| 268 | 270 |
} |
| 269 | 271 |
|
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void |
|
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glue(glue(helper_st, SUFFIX), MMUSUFFIX)(CPUArchState *env, target_ulong addr, |
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DATA_TYPE val, int mmu_idx) |
|
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{
|
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glue(glue(helper_ret_st, SUFFIX), MMUSUFFIX)(env, addr, val, mmu_idx, |
|
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GETPC_EXT()); |
|
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} |
|
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|
|
| 270 | 280 |
/* handles all unaligned cases */ |
| 271 | 281 |
static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(CPUArchState *env, |
| 272 | 282 |
target_ulong addr, |
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