Revision e3b60f1d
b/target-mips/op_helper.c | ||
---|---|---|
783 | 783 |
{ |
784 | 784 |
set_float_rounding_mode(float_round_nearest_even, &env->fp_status); |
785 | 785 |
DT2 = float64_round_to_int(FDT0, &env->fp_status); |
786 |
DT2 = float64_to_int64(DT2, &env->fp_status); |
|
786 | 787 |
RESTORE_ROUNDING_MODE; |
787 | 788 |
update_fcr31(); |
788 | 789 |
if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID)) |
... | ... | |
791 | 792 |
FLOAT_OP(roundl, s) |
792 | 793 |
{ |
793 | 794 |
set_float_rounding_mode(float_round_nearest_even, &env->fp_status); |
794 |
DT2 = float32_round_to_int(FST0, &env->fp_status); |
|
795 |
WT2 = float32_round_to_int(FST0, &env->fp_status); |
|
796 |
DT2 = float32_to_int64(WT2, &env->fp_status); |
|
795 | 797 |
RESTORE_ROUNDING_MODE; |
796 | 798 |
update_fcr31(); |
797 | 799 |
if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID)) |
... | ... | |
800 | 802 |
FLOAT_OP(roundw, d) |
801 | 803 |
{ |
802 | 804 |
set_float_rounding_mode(float_round_nearest_even, &env->fp_status); |
803 |
WT2 = float64_round_to_int(FDT0, &env->fp_status); |
|
805 |
DT2 = float64_round_to_int(FDT0, &env->fp_status); |
|
806 |
// ??? |
|
807 |
env->fp_status.float_exception_flags &= ~float_flag_inexact; |
|
808 |
WT2 = float64_to_int32(DT2, &env->fp_status); |
|
804 | 809 |
RESTORE_ROUNDING_MODE; |
805 | 810 |
update_fcr31(); |
806 | 811 |
if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID)) |
... | ... | |
810 | 815 |
{ |
811 | 816 |
set_float_rounding_mode(float_round_nearest_even, &env->fp_status); |
812 | 817 |
WT2 = float32_round_to_int(FST0, &env->fp_status); |
818 |
WT2 = float32_to_int32(WT2, &env->fp_status); |
|
813 | 819 |
RESTORE_ROUNDING_MODE; |
814 | 820 |
update_fcr31(); |
815 | 821 |
if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID)) |
... | ... | |
849 | 855 |
{ |
850 | 856 |
set_float_rounding_mode(float_round_up, &env->fp_status); |
851 | 857 |
DT2 = float64_round_to_int(FDT0, &env->fp_status); |
858 |
DT2 = float64_to_int64(DT2, &env->fp_status); |
|
852 | 859 |
RESTORE_ROUNDING_MODE; |
853 | 860 |
update_fcr31(); |
854 | 861 |
if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID)) |
... | ... | |
857 | 864 |
FLOAT_OP(ceill, s) |
858 | 865 |
{ |
859 | 866 |
set_float_rounding_mode(float_round_up, &env->fp_status); |
860 |
DT2 = float32_round_to_int(FST0, &env->fp_status); |
|
867 |
WT2 = float32_round_to_int(FST0, &env->fp_status); |
|
868 |
DT2 = float32_to_int64(WT2, &env->fp_status); |
|
861 | 869 |
RESTORE_ROUNDING_MODE; |
862 | 870 |
update_fcr31(); |
863 | 871 |
if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID)) |
... | ... | |
866 | 874 |
FLOAT_OP(ceilw, d) |
867 | 875 |
{ |
868 | 876 |
set_float_rounding_mode(float_round_up, &env->fp_status); |
869 |
WT2 = float64_round_to_int(FDT0, &env->fp_status); |
|
877 |
DT2 = float64_round_to_int(FDT0, &env->fp_status); |
|
878 |
// ??? |
|
879 |
env->fp_status.float_exception_flags &= ~float_flag_inexact; |
|
880 |
WT2 = float64_to_int32(DT2, &env->fp_status); |
|
870 | 881 |
RESTORE_ROUNDING_MODE; |
871 | 882 |
update_fcr31(); |
872 | 883 |
if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID)) |
... | ... | |
876 | 887 |
{ |
877 | 888 |
set_float_rounding_mode(float_round_up, &env->fp_status); |
878 | 889 |
WT2 = float32_round_to_int(FST0, &env->fp_status); |
890 |
WT2 = float32_to_int32(WT2, &env->fp_status); |
|
879 | 891 |
RESTORE_ROUNDING_MODE; |
880 | 892 |
update_fcr31(); |
881 | 893 |
if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID)) |
... | ... | |
886 | 898 |
{ |
887 | 899 |
set_float_rounding_mode(float_round_down, &env->fp_status); |
888 | 900 |
DT2 = float64_round_to_int(FDT0, &env->fp_status); |
901 |
DT2 = float64_to_int64(DT2, &env->fp_status); |
|
889 | 902 |
RESTORE_ROUNDING_MODE; |
890 | 903 |
update_fcr31(); |
891 | 904 |
if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID)) |
... | ... | |
894 | 907 |
FLOAT_OP(floorl, s) |
895 | 908 |
{ |
896 | 909 |
set_float_rounding_mode(float_round_down, &env->fp_status); |
897 |
DT2 = float32_round_to_int(FST0, &env->fp_status); |
|
910 |
WT2 = float32_round_to_int(FST0, &env->fp_status); |
|
911 |
DT2 = float32_to_int64(WT2, &env->fp_status); |
|
898 | 912 |
RESTORE_ROUNDING_MODE; |
899 | 913 |
update_fcr31(); |
900 | 914 |
if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID)) |
... | ... | |
903 | 917 |
FLOAT_OP(floorw, d) |
904 | 918 |
{ |
905 | 919 |
set_float_rounding_mode(float_round_down, &env->fp_status); |
906 |
WT2 = float64_round_to_int(FDT0, &env->fp_status); |
|
920 |
DT2 = float64_round_to_int(FDT0, &env->fp_status); |
|
921 |
// ??? |
|
922 |
env->fp_status.float_exception_flags &= ~float_flag_inexact; |
|
923 |
WT2 = float64_to_int32(DT2, &env->fp_status); |
|
907 | 924 |
RESTORE_ROUNDING_MODE; |
908 | 925 |
update_fcr31(); |
909 | 926 |
if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID)) |
... | ... | |
913 | 930 |
{ |
914 | 931 |
set_float_rounding_mode(float_round_down, &env->fp_status); |
915 | 932 |
WT2 = float32_round_to_int(FST0, &env->fp_status); |
933 |
WT2 = float32_to_int32(WT2, &env->fp_status); |
|
916 | 934 |
RESTORE_ROUNDING_MODE; |
917 | 935 |
update_fcr31(); |
918 | 936 |
if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID)) |
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