root / hw / pc.c @ e4bcb14c
History | View | Annotate | Download (29.1 kB)
1 | 80cabfad | bellard | /*
|
---|---|---|---|
2 | 80cabfad | bellard | * QEMU PC System Emulator
|
3 | 5fafdf24 | ths | *
|
4 | 80cabfad | bellard | * Copyright (c) 2003-2004 Fabrice Bellard
|
5 | 5fafdf24 | ths | *
|
6 | 80cabfad | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
|
7 | 80cabfad | bellard | * of this software and associated documentation files (the "Software"), to deal
|
8 | 80cabfad | bellard | * in the Software without restriction, including without limitation the rights
|
9 | 80cabfad | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
10 | 80cabfad | bellard | * copies of the Software, and to permit persons to whom the Software is
|
11 | 80cabfad | bellard | * furnished to do so, subject to the following conditions:
|
12 | 80cabfad | bellard | *
|
13 | 80cabfad | bellard | * The above copyright notice and this permission notice shall be included in
|
14 | 80cabfad | bellard | * all copies or substantial portions of the Software.
|
15 | 80cabfad | bellard | *
|
16 | 80cabfad | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
17 | 80cabfad | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
18 | 80cabfad | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
19 | 80cabfad | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
20 | 80cabfad | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
21 | 80cabfad | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
22 | 80cabfad | bellard | * THE SOFTWARE.
|
23 | 80cabfad | bellard | */
|
24 | 87ecb68b | pbrook | #include "hw.h" |
25 | 87ecb68b | pbrook | #include "pc.h" |
26 | 87ecb68b | pbrook | #include "fdc.h" |
27 | 87ecb68b | pbrook | #include "pci.h" |
28 | 87ecb68b | pbrook | #include "block.h" |
29 | 87ecb68b | pbrook | #include "sysemu.h" |
30 | 87ecb68b | pbrook | #include "audio/audio.h" |
31 | 87ecb68b | pbrook | #include "net.h" |
32 | 87ecb68b | pbrook | #include "smbus.h" |
33 | 87ecb68b | pbrook | #include "boards.h" |
34 | 80cabfad | bellard | |
35 | b41a2cd1 | bellard | /* output Bochs bios info messages */
|
36 | b41a2cd1 | bellard | //#define DEBUG_BIOS
|
37 | b41a2cd1 | bellard | |
38 | 80cabfad | bellard | #define BIOS_FILENAME "bios.bin" |
39 | 80cabfad | bellard | #define VGABIOS_FILENAME "vgabios.bin" |
40 | de9258a8 | bellard | #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin" |
41 | 80cabfad | bellard | |
42 | a80274c3 | pbrook | /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
|
43 | a80274c3 | pbrook | #define ACPI_DATA_SIZE 0x10000 |
44 | 80cabfad | bellard | |
45 | e4bcb14c | ths | #define MAX_IDE_BUS 2 |
46 | e4bcb14c | ths | |
47 | baca51fa | bellard | static fdctrl_t *floppy_controller;
|
48 | b0a21b53 | bellard | static RTCState *rtc_state;
|
49 | ec844b96 | bellard | static PITState *pit;
|
50 | d592d303 | bellard | static IOAPICState *ioapic;
|
51 | a5954d5c | bellard | static PCIDevice *i440fx_state;
|
52 | 80cabfad | bellard | |
53 | b41a2cd1 | bellard | static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) |
54 | 80cabfad | bellard | { |
55 | 80cabfad | bellard | } |
56 | 80cabfad | bellard | |
57 | f929aad6 | bellard | /* MSDOS compatibility mode FPU exception support */
|
58 | d537cf6c | pbrook | static qemu_irq ferr_irq;
|
59 | f929aad6 | bellard | /* XXX: add IGNNE support */
|
60 | f929aad6 | bellard | void cpu_set_ferr(CPUX86State *s)
|
61 | f929aad6 | bellard | { |
62 | d537cf6c | pbrook | qemu_irq_raise(ferr_irq); |
63 | f929aad6 | bellard | } |
64 | f929aad6 | bellard | |
65 | f929aad6 | bellard | static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data) |
66 | f929aad6 | bellard | { |
67 | d537cf6c | pbrook | qemu_irq_lower(ferr_irq); |
68 | f929aad6 | bellard | } |
69 | f929aad6 | bellard | |
70 | 28ab0e2e | bellard | /* TSC handling */
|
71 | 28ab0e2e | bellard | uint64_t cpu_get_tsc(CPUX86State *env) |
72 | 28ab0e2e | bellard | { |
73 | 1dce7c3c | bellard | /* Note: when using kqemu, it is more logical to return the host TSC
|
74 | 1dce7c3c | bellard | because kqemu does not trap the RDTSC instruction for
|
75 | 1dce7c3c | bellard | performance reasons */
|
76 | 1dce7c3c | bellard | #if USE_KQEMU
|
77 | 1dce7c3c | bellard | if (env->kqemu_enabled) {
|
78 | 1dce7c3c | bellard | return cpu_get_real_ticks();
|
79 | 5fafdf24 | ths | } else
|
80 | 1dce7c3c | bellard | #endif
|
81 | 1dce7c3c | bellard | { |
82 | 1dce7c3c | bellard | return cpu_get_ticks();
|
83 | 1dce7c3c | bellard | } |
84 | 28ab0e2e | bellard | } |
85 | 28ab0e2e | bellard | |
86 | a5954d5c | bellard | /* SMM support */
|
87 | a5954d5c | bellard | void cpu_smm_update(CPUState *env)
|
88 | a5954d5c | bellard | { |
89 | a5954d5c | bellard | if (i440fx_state && env == first_cpu)
|
90 | a5954d5c | bellard | i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
|
91 | a5954d5c | bellard | } |
92 | a5954d5c | bellard | |
93 | a5954d5c | bellard | |
94 | 3de388f6 | bellard | /* IRQ handling */
|
95 | 3de388f6 | bellard | int cpu_get_pic_interrupt(CPUState *env)
|
96 | 3de388f6 | bellard | { |
97 | 3de388f6 | bellard | int intno;
|
98 | 3de388f6 | bellard | |
99 | 3de388f6 | bellard | intno = apic_get_interrupt(env); |
100 | 3de388f6 | bellard | if (intno >= 0) { |
101 | 3de388f6 | bellard | /* set irq request if a PIC irq is still pending */
|
102 | 3de388f6 | bellard | /* XXX: improve that */
|
103 | 5fafdf24 | ths | pic_update_irq(isa_pic); |
104 | 3de388f6 | bellard | return intno;
|
105 | 3de388f6 | bellard | } |
106 | 3de388f6 | bellard | /* read the irq from the PIC */
|
107 | 0e21e12b | ths | if (!apic_accept_pic_intr(env))
|
108 | 0e21e12b | ths | return -1; |
109 | 0e21e12b | ths | |
110 | 3de388f6 | bellard | intno = pic_read_irq(isa_pic); |
111 | 3de388f6 | bellard | return intno;
|
112 | 3de388f6 | bellard | } |
113 | 3de388f6 | bellard | |
114 | d537cf6c | pbrook | static void pic_irq_request(void *opaque, int irq, int level) |
115 | 3de388f6 | bellard | { |
116 | 59b8ad81 | bellard | CPUState *env = opaque; |
117 | 0e21e12b | ths | if (level && apic_accept_pic_intr(env))
|
118 | 59b8ad81 | bellard | cpu_interrupt(env, CPU_INTERRUPT_HARD); |
119 | 3de388f6 | bellard | } |
120 | 3de388f6 | bellard | |
121 | b0a21b53 | bellard | /* PC cmos mappings */
|
122 | b0a21b53 | bellard | |
123 | 80cabfad | bellard | #define REG_EQUIPMENT_BYTE 0x14 |
124 | 80cabfad | bellard | |
125 | 777428f2 | bellard | static int cmos_get_fd_drive_type(int fd0) |
126 | 777428f2 | bellard | { |
127 | 777428f2 | bellard | int val;
|
128 | 777428f2 | bellard | |
129 | 777428f2 | bellard | switch (fd0) {
|
130 | 777428f2 | bellard | case 0: |
131 | 777428f2 | bellard | /* 1.44 Mb 3"5 drive */
|
132 | 777428f2 | bellard | val = 4;
|
133 | 777428f2 | bellard | break;
|
134 | 777428f2 | bellard | case 1: |
135 | 777428f2 | bellard | /* 2.88 Mb 3"5 drive */
|
136 | 777428f2 | bellard | val = 5;
|
137 | 777428f2 | bellard | break;
|
138 | 777428f2 | bellard | case 2: |
139 | 777428f2 | bellard | /* 1.2 Mb 5"5 drive */
|
140 | 777428f2 | bellard | val = 2;
|
141 | 777428f2 | bellard | break;
|
142 | 777428f2 | bellard | default:
|
143 | 777428f2 | bellard | val = 0;
|
144 | 777428f2 | bellard | break;
|
145 | 777428f2 | bellard | } |
146 | 777428f2 | bellard | return val;
|
147 | 777428f2 | bellard | } |
148 | 777428f2 | bellard | |
149 | 5fafdf24 | ths | static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd) |
150 | ba6c2377 | bellard | { |
151 | ba6c2377 | bellard | RTCState *s = rtc_state; |
152 | ba6c2377 | bellard | int cylinders, heads, sectors;
|
153 | ba6c2377 | bellard | bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors); |
154 | ba6c2377 | bellard | rtc_set_memory(s, type_ofs, 47);
|
155 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs, cylinders); |
156 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 1, cylinders >> 8); |
157 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 2, heads);
|
158 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 3, 0xff); |
159 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 4, 0xff); |
160 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); |
161 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 6, cylinders);
|
162 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 7, cylinders >> 8); |
163 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 8, sectors);
|
164 | ba6c2377 | bellard | } |
165 | ba6c2377 | bellard | |
166 | 6ac0e82d | balrog | /* convert boot_device letter to something recognizable by the bios */
|
167 | 6ac0e82d | balrog | static int boot_device2nibble(char boot_device) |
168 | 6ac0e82d | balrog | { |
169 | 6ac0e82d | balrog | switch(boot_device) {
|
170 | 6ac0e82d | balrog | case 'a': |
171 | 6ac0e82d | balrog | case 'b': |
172 | 6ac0e82d | balrog | return 0x01; /* floppy boot */ |
173 | 6ac0e82d | balrog | case 'c': |
174 | 6ac0e82d | balrog | return 0x02; /* hard drive boot */ |
175 | 6ac0e82d | balrog | case 'd': |
176 | 6ac0e82d | balrog | return 0x03; /* CD-ROM boot */ |
177 | 6ac0e82d | balrog | case 'n': |
178 | 6ac0e82d | balrog | return 0x04; /* Network boot */ |
179 | 6ac0e82d | balrog | } |
180 | 6ac0e82d | balrog | return 0; |
181 | 6ac0e82d | balrog | } |
182 | 6ac0e82d | balrog | |
183 | ba6c2377 | bellard | /* hd_table must contain 4 block drivers */
|
184 | 6ac0e82d | balrog | static void cmos_init(int ram_size, const char *boot_device, BlockDriverState **hd_table) |
185 | 80cabfad | bellard | { |
186 | b0a21b53 | bellard | RTCState *s = rtc_state; |
187 | 28c5af54 | j_mayer | int nbds, bds[3] = { 0, }; |
188 | 80cabfad | bellard | int val;
|
189 | b41a2cd1 | bellard | int fd0, fd1, nb;
|
190 | ba6c2377 | bellard | int i;
|
191 | b0a21b53 | bellard | |
192 | b0a21b53 | bellard | /* various important CMOS locations needed by PC/Bochs bios */
|
193 | 80cabfad | bellard | |
194 | 80cabfad | bellard | /* memory size */
|
195 | 333190eb | bellard | val = 640; /* base memory in K */ |
196 | 333190eb | bellard | rtc_set_memory(s, 0x15, val);
|
197 | 333190eb | bellard | rtc_set_memory(s, 0x16, val >> 8); |
198 | 333190eb | bellard | |
199 | 80cabfad | bellard | val = (ram_size / 1024) - 1024; |
200 | 80cabfad | bellard | if (val > 65535) |
201 | 80cabfad | bellard | val = 65535;
|
202 | b0a21b53 | bellard | rtc_set_memory(s, 0x17, val);
|
203 | b0a21b53 | bellard | rtc_set_memory(s, 0x18, val >> 8); |
204 | b0a21b53 | bellard | rtc_set_memory(s, 0x30, val);
|
205 | b0a21b53 | bellard | rtc_set_memory(s, 0x31, val >> 8); |
206 | 80cabfad | bellard | |
207 | 9da98861 | bellard | if (ram_size > (16 * 1024 * 1024)) |
208 | 9da98861 | bellard | val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); |
209 | 9da98861 | bellard | else
|
210 | 9da98861 | bellard | val = 0;
|
211 | 80cabfad | bellard | if (val > 65535) |
212 | 80cabfad | bellard | val = 65535;
|
213 | b0a21b53 | bellard | rtc_set_memory(s, 0x34, val);
|
214 | b0a21b53 | bellard | rtc_set_memory(s, 0x35, val >> 8); |
215 | 3b46e624 | ths | |
216 | 6ac0e82d | balrog | /* set boot devices, and disable floppy signature check if requested */
|
217 | 28c5af54 | j_mayer | #define PC_MAX_BOOT_DEVICES 3 |
218 | 28c5af54 | j_mayer | nbds = strlen(boot_device); |
219 | 28c5af54 | j_mayer | if (nbds > PC_MAX_BOOT_DEVICES) {
|
220 | 28c5af54 | j_mayer | fprintf(stderr, "Too many boot devices for PC\n");
|
221 | 28c5af54 | j_mayer | exit(1);
|
222 | 28c5af54 | j_mayer | } |
223 | 28c5af54 | j_mayer | for (i = 0; i < nbds; i++) { |
224 | 28c5af54 | j_mayer | bds[i] = boot_device2nibble(boot_device[i]); |
225 | 28c5af54 | j_mayer | if (bds[i] == 0) { |
226 | 28c5af54 | j_mayer | fprintf(stderr, "Invalid boot device for PC: '%c'\n",
|
227 | 28c5af54 | j_mayer | boot_device[i]); |
228 | 28c5af54 | j_mayer | exit(1);
|
229 | 28c5af54 | j_mayer | } |
230 | 28c5af54 | j_mayer | } |
231 | 28c5af54 | j_mayer | rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]); |
232 | 28c5af54 | j_mayer | rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1)); |
233 | 80cabfad | bellard | |
234 | b41a2cd1 | bellard | /* floppy type */
|
235 | b41a2cd1 | bellard | |
236 | baca51fa | bellard | fd0 = fdctrl_get_drive_type(floppy_controller, 0);
|
237 | baca51fa | bellard | fd1 = fdctrl_get_drive_type(floppy_controller, 1);
|
238 | 80cabfad | bellard | |
239 | 777428f2 | bellard | val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
|
240 | b0a21b53 | bellard | rtc_set_memory(s, 0x10, val);
|
241 | 3b46e624 | ths | |
242 | b0a21b53 | bellard | val = 0;
|
243 | b41a2cd1 | bellard | nb = 0;
|
244 | 80cabfad | bellard | if (fd0 < 3) |
245 | 80cabfad | bellard | nb++; |
246 | 80cabfad | bellard | if (fd1 < 3) |
247 | 80cabfad | bellard | nb++; |
248 | 80cabfad | bellard | switch (nb) {
|
249 | 80cabfad | bellard | case 0: |
250 | 80cabfad | bellard | break;
|
251 | 80cabfad | bellard | case 1: |
252 | b0a21b53 | bellard | val |= 0x01; /* 1 drive, ready for boot */ |
253 | 80cabfad | bellard | break;
|
254 | 80cabfad | bellard | case 2: |
255 | b0a21b53 | bellard | val |= 0x41; /* 2 drives, ready for boot */ |
256 | 80cabfad | bellard | break;
|
257 | 80cabfad | bellard | } |
258 | b0a21b53 | bellard | val |= 0x02; /* FPU is there */ |
259 | b0a21b53 | bellard | val |= 0x04; /* PS/2 mouse installed */ |
260 | b0a21b53 | bellard | rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); |
261 | b0a21b53 | bellard | |
262 | ba6c2377 | bellard | /* hard drives */
|
263 | ba6c2377 | bellard | |
264 | ba6c2377 | bellard | rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0)); |
265 | ba6c2377 | bellard | if (hd_table[0]) |
266 | ba6c2377 | bellard | cmos_init_hd(0x19, 0x1b, hd_table[0]); |
267 | 5fafdf24 | ths | if (hd_table[1]) |
268 | ba6c2377 | bellard | cmos_init_hd(0x1a, 0x24, hd_table[1]); |
269 | ba6c2377 | bellard | |
270 | ba6c2377 | bellard | val = 0;
|
271 | 40b6ecc6 | bellard | for (i = 0; i < 4; i++) { |
272 | ba6c2377 | bellard | if (hd_table[i]) {
|
273 | 46d4767d | bellard | int cylinders, heads, sectors, translation;
|
274 | 46d4767d | bellard | /* NOTE: bdrv_get_geometry_hint() returns the physical
|
275 | 46d4767d | bellard | geometry. It is always such that: 1 <= sects <= 63, 1
|
276 | 46d4767d | bellard | <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
|
277 | 46d4767d | bellard | geometry can be different if a translation is done. */
|
278 | 46d4767d | bellard | translation = bdrv_get_translation_hint(hd_table[i]); |
279 | 46d4767d | bellard | if (translation == BIOS_ATA_TRANSLATION_AUTO) {
|
280 | 46d4767d | bellard | bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, §ors); |
281 | 46d4767d | bellard | if (cylinders <= 1024 && heads <= 16 && sectors <= 63) { |
282 | 46d4767d | bellard | /* No translation. */
|
283 | 46d4767d | bellard | translation = 0;
|
284 | 46d4767d | bellard | } else {
|
285 | 46d4767d | bellard | /* LBA translation. */
|
286 | 46d4767d | bellard | translation = 1;
|
287 | 46d4767d | bellard | } |
288 | 40b6ecc6 | bellard | } else {
|
289 | 46d4767d | bellard | translation--; |
290 | ba6c2377 | bellard | } |
291 | ba6c2377 | bellard | val |= translation << (i * 2);
|
292 | ba6c2377 | bellard | } |
293 | 40b6ecc6 | bellard | } |
294 | ba6c2377 | bellard | rtc_set_memory(s, 0x39, val);
|
295 | 80cabfad | bellard | } |
296 | 80cabfad | bellard | |
297 | 59b8ad81 | bellard | void ioport_set_a20(int enable) |
298 | 59b8ad81 | bellard | { |
299 | 59b8ad81 | bellard | /* XXX: send to all CPUs ? */
|
300 | 59b8ad81 | bellard | cpu_x86_set_a20(first_cpu, enable); |
301 | 59b8ad81 | bellard | } |
302 | 59b8ad81 | bellard | |
303 | 59b8ad81 | bellard | int ioport_get_a20(void) |
304 | 59b8ad81 | bellard | { |
305 | 59b8ad81 | bellard | return ((first_cpu->a20_mask >> 20) & 1); |
306 | 59b8ad81 | bellard | } |
307 | 59b8ad81 | bellard | |
308 | e1a23744 | bellard | static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) |
309 | e1a23744 | bellard | { |
310 | 59b8ad81 | bellard | ioport_set_a20((val >> 1) & 1); |
311 | e1a23744 | bellard | /* XXX: bit 0 is fast reset */
|
312 | e1a23744 | bellard | } |
313 | e1a23744 | bellard | |
314 | e1a23744 | bellard | static uint32_t ioport92_read(void *opaque, uint32_t addr) |
315 | e1a23744 | bellard | { |
316 | 59b8ad81 | bellard | return ioport_get_a20() << 1; |
317 | e1a23744 | bellard | } |
318 | e1a23744 | bellard | |
319 | 80cabfad | bellard | /***********************************************************/
|
320 | 80cabfad | bellard | /* Bochs BIOS debug ports */
|
321 | 80cabfad | bellard | |
322 | 9596ebb7 | pbrook | static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) |
323 | 80cabfad | bellard | { |
324 | a2f659ee | bellard | static const char shutdown_str[8] = "Shutdown"; |
325 | a2f659ee | bellard | static int shutdown_index = 0; |
326 | 3b46e624 | ths | |
327 | 80cabfad | bellard | switch(addr) {
|
328 | 80cabfad | bellard | /* Bochs BIOS messages */
|
329 | 80cabfad | bellard | case 0x400: |
330 | 80cabfad | bellard | case 0x401: |
331 | 80cabfad | bellard | fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
|
332 | 80cabfad | bellard | exit(1);
|
333 | 80cabfad | bellard | case 0x402: |
334 | 80cabfad | bellard | case 0x403: |
335 | 80cabfad | bellard | #ifdef DEBUG_BIOS
|
336 | 80cabfad | bellard | fprintf(stderr, "%c", val);
|
337 | 80cabfad | bellard | #endif
|
338 | 80cabfad | bellard | break;
|
339 | a2f659ee | bellard | case 0x8900: |
340 | a2f659ee | bellard | /* same as Bochs power off */
|
341 | a2f659ee | bellard | if (val == shutdown_str[shutdown_index]) {
|
342 | a2f659ee | bellard | shutdown_index++; |
343 | a2f659ee | bellard | if (shutdown_index == 8) { |
344 | a2f659ee | bellard | shutdown_index = 0;
|
345 | a2f659ee | bellard | qemu_system_shutdown_request(); |
346 | a2f659ee | bellard | } |
347 | a2f659ee | bellard | } else {
|
348 | a2f659ee | bellard | shutdown_index = 0;
|
349 | a2f659ee | bellard | } |
350 | a2f659ee | bellard | break;
|
351 | 80cabfad | bellard | |
352 | 80cabfad | bellard | /* LGPL'ed VGA BIOS messages */
|
353 | 80cabfad | bellard | case 0x501: |
354 | 80cabfad | bellard | case 0x502: |
355 | 80cabfad | bellard | fprintf(stderr, "VGA BIOS panic, line %d\n", val);
|
356 | 80cabfad | bellard | exit(1);
|
357 | 80cabfad | bellard | case 0x500: |
358 | 80cabfad | bellard | case 0x503: |
359 | 80cabfad | bellard | #ifdef DEBUG_BIOS
|
360 | 80cabfad | bellard | fprintf(stderr, "%c", val);
|
361 | 80cabfad | bellard | #endif
|
362 | 80cabfad | bellard | break;
|
363 | 80cabfad | bellard | } |
364 | 80cabfad | bellard | } |
365 | 80cabfad | bellard | |
366 | 9596ebb7 | pbrook | static void bochs_bios_init(void) |
367 | 80cabfad | bellard | { |
368 | b41a2cd1 | bellard | register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL); |
369 | b41a2cd1 | bellard | register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL); |
370 | b41a2cd1 | bellard | register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL); |
371 | b41a2cd1 | bellard | register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL); |
372 | a2f659ee | bellard | register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL); |
373 | b41a2cd1 | bellard | |
374 | b41a2cd1 | bellard | register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL); |
375 | b41a2cd1 | bellard | register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL); |
376 | b41a2cd1 | bellard | register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL); |
377 | b41a2cd1 | bellard | register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL); |
378 | 80cabfad | bellard | } |
379 | 80cabfad | bellard | |
380 | 642a4f96 | ths | /* Generate an initial boot sector which sets state and jump to
|
381 | 642a4f96 | ths | a specified vector */
|
382 | 3f6c925f | balrog | static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip) |
383 | 642a4f96 | ths | { |
384 | 642a4f96 | ths | uint8_t bootsect[512], *p;
|
385 | 642a4f96 | ths | int i;
|
386 | e4bcb14c | ths | int hda;
|
387 | 642a4f96 | ths | |
388 | e4bcb14c | ths | hda = drive_get_index(IF_IDE, 0, 0); |
389 | e4bcb14c | ths | if (hda == -1) { |
390 | 642a4f96 | ths | fprintf(stderr, "A disk image must be given for 'hda' when booting "
|
391 | 642a4f96 | ths | "a Linux kernel\n");
|
392 | 642a4f96 | ths | exit(1);
|
393 | 642a4f96 | ths | } |
394 | 642a4f96 | ths | |
395 | 642a4f96 | ths | memset(bootsect, 0, sizeof(bootsect)); |
396 | 642a4f96 | ths | |
397 | 642a4f96 | ths | /* Copy the MSDOS partition table if possible */
|
398 | e4bcb14c | ths | bdrv_read(drives_table[hda].bdrv, 0, bootsect, 1); |
399 | 642a4f96 | ths | |
400 | 642a4f96 | ths | /* Make sure we have a partition signature */
|
401 | 642a4f96 | ths | bootsect[510] = 0x55; |
402 | 642a4f96 | ths | bootsect[511] = 0xaa; |
403 | 642a4f96 | ths | |
404 | 642a4f96 | ths | /* Actual code */
|
405 | 642a4f96 | ths | p = bootsect; |
406 | 642a4f96 | ths | *p++ = 0xfa; /* CLI */ |
407 | 642a4f96 | ths | *p++ = 0xfc; /* CLD */ |
408 | 642a4f96 | ths | |
409 | 642a4f96 | ths | for (i = 0; i < 6; i++) { |
410 | 642a4f96 | ths | if (i == 1) /* Skip CS */ |
411 | 642a4f96 | ths | continue;
|
412 | 642a4f96 | ths | |
413 | 642a4f96 | ths | *p++ = 0xb8; /* MOV AX,imm16 */ |
414 | 642a4f96 | ths | *p++ = segs[i]; |
415 | 642a4f96 | ths | *p++ = segs[i] >> 8;
|
416 | 642a4f96 | ths | *p++ = 0x8e; /* MOV <seg>,AX */ |
417 | 642a4f96 | ths | *p++ = 0xc0 + (i << 3); |
418 | 642a4f96 | ths | } |
419 | 642a4f96 | ths | |
420 | 642a4f96 | ths | for (i = 0; i < 8; i++) { |
421 | 642a4f96 | ths | *p++ = 0x66; /* 32-bit operand size */ |
422 | 642a4f96 | ths | *p++ = 0xb8 + i; /* MOV <reg>,imm32 */ |
423 | 642a4f96 | ths | *p++ = gpr[i]; |
424 | 642a4f96 | ths | *p++ = gpr[i] >> 8;
|
425 | 642a4f96 | ths | *p++ = gpr[i] >> 16;
|
426 | 642a4f96 | ths | *p++ = gpr[i] >> 24;
|
427 | 642a4f96 | ths | } |
428 | 642a4f96 | ths | |
429 | 642a4f96 | ths | *p++ = 0xea; /* JMP FAR */ |
430 | 642a4f96 | ths | *p++ = ip; /* IP */
|
431 | 642a4f96 | ths | *p++ = ip >> 8;
|
432 | 642a4f96 | ths | *p++ = segs[1]; /* CS */ |
433 | 642a4f96 | ths | *p++ = segs[1] >> 8; |
434 | 642a4f96 | ths | |
435 | e4bcb14c | ths | bdrv_set_boot_sector(drives_table[hda].bdrv, bootsect, sizeof(bootsect));
|
436 | 642a4f96 | ths | } |
437 | 80cabfad | bellard | |
438 | 9596ebb7 | pbrook | static int load_kernel(const char *filename, uint8_t *addr, |
439 | 9596ebb7 | pbrook | uint8_t *real_addr) |
440 | 80cabfad | bellard | { |
441 | 80cabfad | bellard | int fd, size;
|
442 | 80cabfad | bellard | int setup_sects;
|
443 | 80cabfad | bellard | |
444 | 096b7ea4 | bellard | fd = open(filename, O_RDONLY | O_BINARY); |
445 | 80cabfad | bellard | if (fd < 0) |
446 | 80cabfad | bellard | return -1; |
447 | 80cabfad | bellard | |
448 | 80cabfad | bellard | /* load 16 bit code */
|
449 | 80cabfad | bellard | if (read(fd, real_addr, 512) != 512) |
450 | 80cabfad | bellard | goto fail;
|
451 | 80cabfad | bellard | setup_sects = real_addr[0x1F1];
|
452 | 80cabfad | bellard | if (!setup_sects)
|
453 | 80cabfad | bellard | setup_sects = 4;
|
454 | 5fafdf24 | ths | if (read(fd, real_addr + 512, setup_sects * 512) != |
455 | 80cabfad | bellard | setup_sects * 512)
|
456 | 80cabfad | bellard | goto fail;
|
457 | 642a4f96 | ths | |
458 | 80cabfad | bellard | /* load 32 bit code */
|
459 | 80cabfad | bellard | size = read(fd, addr, 16 * 1024 * 1024); |
460 | 80cabfad | bellard | if (size < 0) |
461 | 80cabfad | bellard | goto fail;
|
462 | 80cabfad | bellard | close(fd); |
463 | 80cabfad | bellard | return size;
|
464 | 80cabfad | bellard | fail:
|
465 | 80cabfad | bellard | close(fd); |
466 | 80cabfad | bellard | return -1; |
467 | 80cabfad | bellard | } |
468 | 80cabfad | bellard | |
469 | 642a4f96 | ths | static long get_file_size(FILE *f) |
470 | 642a4f96 | ths | { |
471 | 642a4f96 | ths | long where, size;
|
472 | 642a4f96 | ths | |
473 | 642a4f96 | ths | /* XXX: on Unix systems, using fstat() probably makes more sense */
|
474 | 642a4f96 | ths | |
475 | 642a4f96 | ths | where = ftell(f); |
476 | 642a4f96 | ths | fseek(f, 0, SEEK_END);
|
477 | 642a4f96 | ths | size = ftell(f); |
478 | 642a4f96 | ths | fseek(f, where, SEEK_SET); |
479 | 642a4f96 | ths | |
480 | 642a4f96 | ths | return size;
|
481 | 642a4f96 | ths | } |
482 | 642a4f96 | ths | |
483 | 642a4f96 | ths | static void load_linux(const char *kernel_filename, |
484 | 642a4f96 | ths | const char *initrd_filename, |
485 | 642a4f96 | ths | const char *kernel_cmdline) |
486 | 642a4f96 | ths | { |
487 | 642a4f96 | ths | uint16_t protocol; |
488 | 642a4f96 | ths | uint32_t gpr[8];
|
489 | 642a4f96 | ths | uint16_t seg[6];
|
490 | 642a4f96 | ths | uint16_t real_seg; |
491 | 642a4f96 | ths | int setup_size, kernel_size, initrd_size, cmdline_size;
|
492 | 642a4f96 | ths | uint32_t initrd_max; |
493 | 642a4f96 | ths | uint8_t header[1024];
|
494 | 642a4f96 | ths | uint8_t *real_addr, *prot_addr, *cmdline_addr, *initrd_addr; |
495 | 642a4f96 | ths | FILE *f, *fi; |
496 | 642a4f96 | ths | |
497 | 642a4f96 | ths | /* Align to 16 bytes as a paranoia measure */
|
498 | 642a4f96 | ths | cmdline_size = (strlen(kernel_cmdline)+16) & ~15; |
499 | 642a4f96 | ths | |
500 | 642a4f96 | ths | /* load the kernel header */
|
501 | 642a4f96 | ths | f = fopen(kernel_filename, "rb");
|
502 | 642a4f96 | ths | if (!f || !(kernel_size = get_file_size(f)) ||
|
503 | 642a4f96 | ths | fread(header, 1, 1024, f) != 1024) { |
504 | 642a4f96 | ths | fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
505 | 642a4f96 | ths | kernel_filename); |
506 | 642a4f96 | ths | exit(1);
|
507 | 642a4f96 | ths | } |
508 | 642a4f96 | ths | |
509 | 642a4f96 | ths | /* kernel protocol version */
|
510 | bc4edd79 | bellard | #if 0
|
511 | 642a4f96 | ths | fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
|
512 | bc4edd79 | bellard | #endif
|
513 | 642a4f96 | ths | if (ldl_p(header+0x202) == 0x53726448) |
514 | 642a4f96 | ths | protocol = lduw_p(header+0x206);
|
515 | 642a4f96 | ths | else
|
516 | 642a4f96 | ths | protocol = 0;
|
517 | 642a4f96 | ths | |
518 | 642a4f96 | ths | if (protocol < 0x200 || !(header[0x211] & 0x01)) { |
519 | 642a4f96 | ths | /* Low kernel */
|
520 | 642a4f96 | ths | real_addr = phys_ram_base + 0x90000;
|
521 | 642a4f96 | ths | cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size;
|
522 | 642a4f96 | ths | prot_addr = phys_ram_base + 0x10000;
|
523 | 642a4f96 | ths | } else if (protocol < 0x202) { |
524 | 642a4f96 | ths | /* High but ancient kernel */
|
525 | 642a4f96 | ths | real_addr = phys_ram_base + 0x90000;
|
526 | 642a4f96 | ths | cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size;
|
527 | 642a4f96 | ths | prot_addr = phys_ram_base + 0x100000;
|
528 | 642a4f96 | ths | } else {
|
529 | 642a4f96 | ths | /* High and recent kernel */
|
530 | 642a4f96 | ths | real_addr = phys_ram_base + 0x10000;
|
531 | 642a4f96 | ths | cmdline_addr = phys_ram_base + 0x20000;
|
532 | 642a4f96 | ths | prot_addr = phys_ram_base + 0x100000;
|
533 | 642a4f96 | ths | } |
534 | 642a4f96 | ths | |
535 | bc4edd79 | bellard | #if 0
|
536 | 642a4f96 | ths | fprintf(stderr,
|
537 | 642a4f96 | ths | "qemu: real_addr = %#zx\n"
|
538 | 642a4f96 | ths | "qemu: cmdline_addr = %#zx\n"
|
539 | 642a4f96 | ths | "qemu: prot_addr = %#zx\n",
|
540 | 642a4f96 | ths | real_addr-phys_ram_base,
|
541 | 642a4f96 | ths | cmdline_addr-phys_ram_base,
|
542 | 642a4f96 | ths | prot_addr-phys_ram_base);
|
543 | bc4edd79 | bellard | #endif
|
544 | 642a4f96 | ths | |
545 | 642a4f96 | ths | /* highest address for loading the initrd */
|
546 | 642a4f96 | ths | if (protocol >= 0x203) |
547 | 642a4f96 | ths | initrd_max = ldl_p(header+0x22c);
|
548 | 642a4f96 | ths | else
|
549 | 642a4f96 | ths | initrd_max = 0x37ffffff;
|
550 | 642a4f96 | ths | |
551 | 642a4f96 | ths | if (initrd_max >= ram_size-ACPI_DATA_SIZE)
|
552 | 642a4f96 | ths | initrd_max = ram_size-ACPI_DATA_SIZE-1;
|
553 | 642a4f96 | ths | |
554 | 642a4f96 | ths | /* kernel command line */
|
555 | 642a4f96 | ths | pstrcpy(cmdline_addr, 4096, kernel_cmdline);
|
556 | 642a4f96 | ths | |
557 | 642a4f96 | ths | if (protocol >= 0x202) { |
558 | 642a4f96 | ths | stl_p(header+0x228, cmdline_addr-phys_ram_base);
|
559 | 642a4f96 | ths | } else {
|
560 | 642a4f96 | ths | stw_p(header+0x20, 0xA33F); |
561 | 642a4f96 | ths | stw_p(header+0x22, cmdline_addr-real_addr);
|
562 | 642a4f96 | ths | } |
563 | 642a4f96 | ths | |
564 | 642a4f96 | ths | /* loader type */
|
565 | 642a4f96 | ths | /* High nybble = B reserved for Qemu; low nybble is revision number.
|
566 | 642a4f96 | ths | If this code is substantially changed, you may want to consider
|
567 | 642a4f96 | ths | incrementing the revision. */
|
568 | 642a4f96 | ths | if (protocol >= 0x200) |
569 | 642a4f96 | ths | header[0x210] = 0xB0; |
570 | 642a4f96 | ths | |
571 | 642a4f96 | ths | /* heap */
|
572 | 642a4f96 | ths | if (protocol >= 0x201) { |
573 | 642a4f96 | ths | header[0x211] |= 0x80; /* CAN_USE_HEAP */ |
574 | 642a4f96 | ths | stw_p(header+0x224, cmdline_addr-real_addr-0x200); |
575 | 642a4f96 | ths | } |
576 | 642a4f96 | ths | |
577 | 642a4f96 | ths | /* load initrd */
|
578 | 642a4f96 | ths | if (initrd_filename) {
|
579 | 642a4f96 | ths | if (protocol < 0x200) { |
580 | 642a4f96 | ths | fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
|
581 | 642a4f96 | ths | exit(1);
|
582 | 642a4f96 | ths | } |
583 | 642a4f96 | ths | |
584 | 642a4f96 | ths | fi = fopen(initrd_filename, "rb");
|
585 | 642a4f96 | ths | if (!fi) {
|
586 | 642a4f96 | ths | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
587 | 642a4f96 | ths | initrd_filename); |
588 | 642a4f96 | ths | exit(1);
|
589 | 642a4f96 | ths | } |
590 | 642a4f96 | ths | |
591 | 642a4f96 | ths | initrd_size = get_file_size(fi); |
592 | 642a4f96 | ths | initrd_addr = phys_ram_base + ((initrd_max-initrd_size) & ~4095);
|
593 | 642a4f96 | ths | |
594 | 642a4f96 | ths | fprintf(stderr, "qemu: loading initrd (%#x bytes) at %#zx\n",
|
595 | 642a4f96 | ths | initrd_size, initrd_addr-phys_ram_base); |
596 | 642a4f96 | ths | |
597 | 642a4f96 | ths | if (fread(initrd_addr, 1, initrd_size, fi) != initrd_size) { |
598 | 642a4f96 | ths | fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
|
599 | 642a4f96 | ths | initrd_filename); |
600 | 642a4f96 | ths | exit(1);
|
601 | 642a4f96 | ths | } |
602 | 642a4f96 | ths | fclose(fi); |
603 | 642a4f96 | ths | |
604 | 642a4f96 | ths | stl_p(header+0x218, initrd_addr-phys_ram_base);
|
605 | 642a4f96 | ths | stl_p(header+0x21c, initrd_size);
|
606 | 642a4f96 | ths | } |
607 | 642a4f96 | ths | |
608 | 642a4f96 | ths | /* store the finalized header and load the rest of the kernel */
|
609 | 642a4f96 | ths | memcpy(real_addr, header, 1024);
|
610 | 642a4f96 | ths | |
611 | 642a4f96 | ths | setup_size = header[0x1f1];
|
612 | 642a4f96 | ths | if (setup_size == 0) |
613 | 642a4f96 | ths | setup_size = 4;
|
614 | 642a4f96 | ths | |
615 | 642a4f96 | ths | setup_size = (setup_size+1)*512; |
616 | 642a4f96 | ths | kernel_size -= setup_size; /* Size of protected-mode code */
|
617 | 642a4f96 | ths | |
618 | 642a4f96 | ths | if (fread(real_addr+1024, 1, setup_size-1024, f) != setup_size-1024 || |
619 | 642a4f96 | ths | fread(prot_addr, 1, kernel_size, f) != kernel_size) {
|
620 | 642a4f96 | ths | fprintf(stderr, "qemu: read error on kernel '%s'\n",
|
621 | 642a4f96 | ths | kernel_filename); |
622 | 642a4f96 | ths | exit(1);
|
623 | 642a4f96 | ths | } |
624 | 642a4f96 | ths | fclose(f); |
625 | 642a4f96 | ths | |
626 | 642a4f96 | ths | /* generate bootsector to set up the initial register state */
|
627 | 642a4f96 | ths | real_seg = (real_addr-phys_ram_base) >> 4;
|
628 | 642a4f96 | ths | seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg; |
629 | 642a4f96 | ths | seg[1] = real_seg+0x20; /* CS */ |
630 | 642a4f96 | ths | memset(gpr, 0, sizeof gpr); |
631 | 642a4f96 | ths | gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */ |
632 | 642a4f96 | ths | |
633 | 642a4f96 | ths | generate_bootsect(gpr, seg, 0);
|
634 | 642a4f96 | ths | } |
635 | 642a4f96 | ths | |
636 | 59b8ad81 | bellard | static void main_cpu_reset(void *opaque) |
637 | 59b8ad81 | bellard | { |
638 | 59b8ad81 | bellard | CPUState *env = opaque; |
639 | 59b8ad81 | bellard | cpu_reset(env); |
640 | 59b8ad81 | bellard | } |
641 | 59b8ad81 | bellard | |
642 | b41a2cd1 | bellard | static const int ide_iobase[2] = { 0x1f0, 0x170 }; |
643 | b41a2cd1 | bellard | static const int ide_iobase2[2] = { 0x3f6, 0x376 }; |
644 | b41a2cd1 | bellard | static const int ide_irq[2] = { 14, 15 }; |
645 | b41a2cd1 | bellard | |
646 | b41a2cd1 | bellard | #define NE2000_NB_MAX 6 |
647 | b41a2cd1 | bellard | |
648 | 8d11df9e | bellard | static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 }; |
649 | b41a2cd1 | bellard | static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; |
650 | b41a2cd1 | bellard | |
651 | 8d11df9e | bellard | static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; |
652 | 8d11df9e | bellard | static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 }; |
653 | 8d11df9e | bellard | |
654 | 6508fe59 | bellard | static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc }; |
655 | 6508fe59 | bellard | static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; |
656 | 6508fe59 | bellard | |
657 | 6a36d84e | bellard | #ifdef HAS_AUDIO
|
658 | d537cf6c | pbrook | static void audio_init (PCIBus *pci_bus, qemu_irq *pic) |
659 | 6a36d84e | bellard | { |
660 | 6a36d84e | bellard | struct soundhw *c;
|
661 | 6a36d84e | bellard | int audio_enabled = 0; |
662 | 6a36d84e | bellard | |
663 | 6a36d84e | bellard | for (c = soundhw; !audio_enabled && c->name; ++c) {
|
664 | 6a36d84e | bellard | audio_enabled = c->enabled; |
665 | 6a36d84e | bellard | } |
666 | 6a36d84e | bellard | |
667 | 6a36d84e | bellard | if (audio_enabled) {
|
668 | 6a36d84e | bellard | AudioState *s; |
669 | 6a36d84e | bellard | |
670 | 6a36d84e | bellard | s = AUD_init (); |
671 | 6a36d84e | bellard | if (s) {
|
672 | 6a36d84e | bellard | for (c = soundhw; c->name; ++c) {
|
673 | 6a36d84e | bellard | if (c->enabled) {
|
674 | 6a36d84e | bellard | if (c->isa) {
|
675 | d537cf6c | pbrook | c->init.init_isa (s, pic); |
676 | 6a36d84e | bellard | } |
677 | 6a36d84e | bellard | else {
|
678 | 6a36d84e | bellard | if (pci_bus) {
|
679 | 6a36d84e | bellard | c->init.init_pci (pci_bus, s); |
680 | 6a36d84e | bellard | } |
681 | 6a36d84e | bellard | } |
682 | 6a36d84e | bellard | } |
683 | 6a36d84e | bellard | } |
684 | 6a36d84e | bellard | } |
685 | 6a36d84e | bellard | } |
686 | 6a36d84e | bellard | } |
687 | 6a36d84e | bellard | #endif
|
688 | 6a36d84e | bellard | |
689 | d537cf6c | pbrook | static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic) |
690 | a41b2ff2 | pbrook | { |
691 | a41b2ff2 | pbrook | static int nb_ne2k = 0; |
692 | a41b2ff2 | pbrook | |
693 | a41b2ff2 | pbrook | if (nb_ne2k == NE2000_NB_MAX)
|
694 | a41b2ff2 | pbrook | return;
|
695 | d537cf6c | pbrook | isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd); |
696 | a41b2ff2 | pbrook | nb_ne2k++; |
697 | a41b2ff2 | pbrook | } |
698 | a41b2ff2 | pbrook | |
699 | 80cabfad | bellard | /* PC hardware initialisation */
|
700 | b881c2c6 | blueswir1 | static void pc_init1(int ram_size, int vga_ram_size, |
701 | b881c2c6 | blueswir1 | const char *boot_device, DisplayState *ds, |
702 | b5ff2d6e | bellard | const char *kernel_filename, const char *kernel_cmdline, |
703 | 3dbbdc25 | bellard | const char *initrd_filename, |
704 | a049de61 | bellard | int pci_enabled, const char *cpu_model) |
705 | 80cabfad | bellard | { |
706 | 80cabfad | bellard | char buf[1024]; |
707 | 642a4f96 | ths | int ret, linux_boot, i;
|
708 | 970ac5a3 | bellard | ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset; |
709 | 970ac5a3 | bellard | int bios_size, isa_bios_size, vga_bios_size;
|
710 | 46e50e9d | bellard | PCIBus *pci_bus; |
711 | 5c3ff3a7 | pbrook | int piix3_devfn = -1; |
712 | 59b8ad81 | bellard | CPUState *env; |
713 | a41b2ff2 | pbrook | NICInfo *nd; |
714 | d537cf6c | pbrook | qemu_irq *cpu_irq; |
715 | d537cf6c | pbrook | qemu_irq *i8259; |
716 | e4bcb14c | ths | int index;
|
717 | e4bcb14c | ths | BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
718 | e4bcb14c | ths | BlockDriverState *fd[MAX_FD]; |
719 | d592d303 | bellard | |
720 | 80cabfad | bellard | linux_boot = (kernel_filename != NULL);
|
721 | 80cabfad | bellard | |
722 | 59b8ad81 | bellard | /* init CPUs */
|
723 | a049de61 | bellard | if (cpu_model == NULL) { |
724 | a049de61 | bellard | #ifdef TARGET_X86_64
|
725 | a049de61 | bellard | cpu_model = "qemu64";
|
726 | a049de61 | bellard | #else
|
727 | a049de61 | bellard | cpu_model = "qemu32";
|
728 | a049de61 | bellard | #endif
|
729 | a049de61 | bellard | } |
730 | a049de61 | bellard | |
731 | 59b8ad81 | bellard | for(i = 0; i < smp_cpus; i++) { |
732 | aaed909a | bellard | env = cpu_init(cpu_model); |
733 | aaed909a | bellard | if (!env) {
|
734 | aaed909a | bellard | fprintf(stderr, "Unable to find x86 CPU definition\n");
|
735 | aaed909a | bellard | exit(1);
|
736 | aaed909a | bellard | } |
737 | 59b8ad81 | bellard | if (i != 0) |
738 | ad49ff9d | bellard | env->hflags |= HF_HALTED_MASK; |
739 | 59b8ad81 | bellard | if (smp_cpus > 1) { |
740 | 59b8ad81 | bellard | /* XXX: enable it in all cases */
|
741 | 59b8ad81 | bellard | env->cpuid_features |= CPUID_APIC; |
742 | 59b8ad81 | bellard | } |
743 | a5954d5c | bellard | register_savevm("cpu", i, 4, cpu_save, cpu_load, env); |
744 | 59b8ad81 | bellard | qemu_register_reset(main_cpu_reset, env); |
745 | 59b8ad81 | bellard | if (pci_enabled) {
|
746 | 59b8ad81 | bellard | apic_init(env); |
747 | 59b8ad81 | bellard | } |
748 | 93342807 | ths | vmport_init(env); |
749 | 59b8ad81 | bellard | } |
750 | 59b8ad81 | bellard | |
751 | 80cabfad | bellard | /* allocate RAM */
|
752 | 970ac5a3 | bellard | ram_addr = qemu_ram_alloc(ram_size); |
753 | 970ac5a3 | bellard | cpu_register_physical_memory(0, ram_size, ram_addr);
|
754 | 80cabfad | bellard | |
755 | 970ac5a3 | bellard | /* allocate VGA RAM */
|
756 | 970ac5a3 | bellard | vga_ram_addr = qemu_ram_alloc(vga_ram_size); |
757 | 7587cf44 | bellard | |
758 | 970ac5a3 | bellard | /* BIOS load */
|
759 | 1192dad8 | j_mayer | if (bios_name == NULL) |
760 | 1192dad8 | j_mayer | bios_name = BIOS_FILENAME; |
761 | 1192dad8 | j_mayer | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); |
762 | 7587cf44 | bellard | bios_size = get_image_size(buf); |
763 | 5fafdf24 | ths | if (bios_size <= 0 || |
764 | 970ac5a3 | bellard | (bios_size % 65536) != 0) { |
765 | 7587cf44 | bellard | goto bios_error;
|
766 | 7587cf44 | bellard | } |
767 | 970ac5a3 | bellard | bios_offset = qemu_ram_alloc(bios_size); |
768 | 7587cf44 | bellard | ret = load_image(buf, phys_ram_base + bios_offset); |
769 | 7587cf44 | bellard | if (ret != bios_size) {
|
770 | 7587cf44 | bellard | bios_error:
|
771 | 970ac5a3 | bellard | fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
|
772 | 80cabfad | bellard | exit(1);
|
773 | 80cabfad | bellard | } |
774 | 7587cf44 | bellard | |
775 | 80cabfad | bellard | /* VGA BIOS load */
|
776 | de9258a8 | bellard | if (cirrus_vga_enabled) {
|
777 | de9258a8 | bellard | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME); |
778 | de9258a8 | bellard | } else {
|
779 | de9258a8 | bellard | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); |
780 | de9258a8 | bellard | } |
781 | 970ac5a3 | bellard | vga_bios_size = get_image_size(buf); |
782 | 5fafdf24 | ths | if (vga_bios_size <= 0 || vga_bios_size > 65536) |
783 | 970ac5a3 | bellard | goto vga_bios_error;
|
784 | 970ac5a3 | bellard | vga_bios_offset = qemu_ram_alloc(65536);
|
785 | 970ac5a3 | bellard | |
786 | 7587cf44 | bellard | ret = load_image(buf, phys_ram_base + vga_bios_offset); |
787 | 970ac5a3 | bellard | if (ret != vga_bios_size) {
|
788 | 970ac5a3 | bellard | vga_bios_error:
|
789 | 970ac5a3 | bellard | fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
|
790 | 970ac5a3 | bellard | exit(1);
|
791 | 970ac5a3 | bellard | } |
792 | 970ac5a3 | bellard | |
793 | 80cabfad | bellard | /* setup basic memory access */
|
794 | 5fafdf24 | ths | cpu_register_physical_memory(0xc0000, 0x10000, |
795 | 7587cf44 | bellard | vga_bios_offset | IO_MEM_ROM); |
796 | 7587cf44 | bellard | |
797 | 7587cf44 | bellard | /* map the last 128KB of the BIOS in ISA space */
|
798 | 7587cf44 | bellard | isa_bios_size = bios_size; |
799 | 7587cf44 | bellard | if (isa_bios_size > (128 * 1024)) |
800 | 7587cf44 | bellard | isa_bios_size = 128 * 1024; |
801 | 5fafdf24 | ths | cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size, |
802 | 7587cf44 | bellard | IO_MEM_UNASSIGNED); |
803 | 5fafdf24 | ths | cpu_register_physical_memory(0x100000 - isa_bios_size,
|
804 | 5fafdf24 | ths | isa_bios_size, |
805 | 7587cf44 | bellard | (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM); |
806 | 9ae02555 | ths | |
807 | 970ac5a3 | bellard | { |
808 | 970ac5a3 | bellard | ram_addr_t option_rom_offset; |
809 | 970ac5a3 | bellard | int size, offset;
|
810 | 970ac5a3 | bellard | |
811 | 970ac5a3 | bellard | offset = 0;
|
812 | 970ac5a3 | bellard | for (i = 0; i < nb_option_roms; i++) { |
813 | 970ac5a3 | bellard | size = get_image_size(option_rom[i]); |
814 | 970ac5a3 | bellard | if (size < 0) { |
815 | 5fafdf24 | ths | fprintf(stderr, "Could not load option rom '%s'\n",
|
816 | 970ac5a3 | bellard | option_rom[i]); |
817 | 970ac5a3 | bellard | exit(1);
|
818 | 970ac5a3 | bellard | } |
819 | 970ac5a3 | bellard | if (size > (0x10000 - offset)) |
820 | 970ac5a3 | bellard | goto option_rom_error;
|
821 | 970ac5a3 | bellard | option_rom_offset = qemu_ram_alloc(size); |
822 | 970ac5a3 | bellard | ret = load_image(option_rom[i], phys_ram_base + option_rom_offset); |
823 | 970ac5a3 | bellard | if (ret != size) {
|
824 | 970ac5a3 | bellard | option_rom_error:
|
825 | 970ac5a3 | bellard | fprintf(stderr, "Too many option ROMS\n");
|
826 | 970ac5a3 | bellard | exit(1);
|
827 | 970ac5a3 | bellard | } |
828 | 970ac5a3 | bellard | size = (size + 4095) & ~4095; |
829 | 970ac5a3 | bellard | cpu_register_physical_memory(0xd0000 + offset,
|
830 | 970ac5a3 | bellard | size, option_rom_offset | IO_MEM_ROM); |
831 | 970ac5a3 | bellard | offset += size; |
832 | 970ac5a3 | bellard | } |
833 | 9ae02555 | ths | } |
834 | 9ae02555 | ths | |
835 | 7587cf44 | bellard | /* map all the bios at the top of memory */
|
836 | 5fafdf24 | ths | cpu_register_physical_memory((uint32_t)(-bios_size), |
837 | 7587cf44 | bellard | bios_size, bios_offset | IO_MEM_ROM); |
838 | 3b46e624 | ths | |
839 | 80cabfad | bellard | bochs_bios_init(); |
840 | 80cabfad | bellard | |
841 | 642a4f96 | ths | if (linux_boot)
|
842 | 642a4f96 | ths | load_linux(kernel_filename, initrd_filename, kernel_cmdline); |
843 | 80cabfad | bellard | |
844 | d537cf6c | pbrook | cpu_irq = qemu_allocate_irqs(pic_irq_request, first_cpu, 1);
|
845 | d537cf6c | pbrook | i8259 = i8259_init(cpu_irq[0]);
|
846 | d537cf6c | pbrook | ferr_irq = i8259[13];
|
847 | d537cf6c | pbrook | |
848 | 69b91039 | bellard | if (pci_enabled) {
|
849 | d537cf6c | pbrook | pci_bus = i440fx_init(&i440fx_state, i8259); |
850 | 8f1c91d8 | ths | piix3_devfn = piix3_init(pci_bus, -1);
|
851 | 46e50e9d | bellard | } else {
|
852 | 46e50e9d | bellard | pci_bus = NULL;
|
853 | 69b91039 | bellard | } |
854 | 69b91039 | bellard | |
855 | 80cabfad | bellard | /* init basic PC hardware */
|
856 | b41a2cd1 | bellard | register_ioport_write(0x80, 1, 1, ioport80_write, NULL); |
857 | 80cabfad | bellard | |
858 | f929aad6 | bellard | register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL); |
859 | f929aad6 | bellard | |
860 | 1f04275e | bellard | if (cirrus_vga_enabled) {
|
861 | 1f04275e | bellard | if (pci_enabled) {
|
862 | 5fafdf24 | ths | pci_cirrus_vga_init(pci_bus, |
863 | 5fafdf24 | ths | ds, phys_ram_base + vga_ram_addr, |
864 | 970ac5a3 | bellard | vga_ram_addr, vga_ram_size); |
865 | 1f04275e | bellard | } else {
|
866 | 5fafdf24 | ths | isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr, |
867 | 970ac5a3 | bellard | vga_ram_addr, vga_ram_size); |
868 | 1f04275e | bellard | } |
869 | d34cab9f | ths | } else if (vmsvga_enabled) { |
870 | d34cab9f | ths | if (pci_enabled)
|
871 | d34cab9f | ths | pci_vmsvga_init(pci_bus, ds, phys_ram_base + ram_size, |
872 | d34cab9f | ths | ram_size, vga_ram_size); |
873 | d34cab9f | ths | else
|
874 | d34cab9f | ths | fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
|
875 | 1f04275e | bellard | } else {
|
876 | 89b6b508 | bellard | if (pci_enabled) {
|
877 | 5fafdf24 | ths | pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr, |
878 | 970ac5a3 | bellard | vga_ram_addr, vga_ram_size, 0, 0); |
879 | 89b6b508 | bellard | } else {
|
880 | 5fafdf24 | ths | isa_vga_init(ds, phys_ram_base + vga_ram_addr, |
881 | 970ac5a3 | bellard | vga_ram_addr, vga_ram_size); |
882 | 89b6b508 | bellard | } |
883 | 1f04275e | bellard | } |
884 | 80cabfad | bellard | |
885 | d537cf6c | pbrook | rtc_state = rtc_init(0x70, i8259[8]); |
886 | 80cabfad | bellard | |
887 | e1a23744 | bellard | register_ioport_read(0x92, 1, 1, ioport92_read, NULL); |
888 | e1a23744 | bellard | register_ioport_write(0x92, 1, 1, ioport92_write, NULL); |
889 | e1a23744 | bellard | |
890 | d592d303 | bellard | if (pci_enabled) {
|
891 | d592d303 | bellard | ioapic = ioapic_init(); |
892 | d592d303 | bellard | } |
893 | d537cf6c | pbrook | pit = pit_init(0x40, i8259[0]); |
894 | fd06c375 | bellard | pcspk_init(pit); |
895 | d592d303 | bellard | if (pci_enabled) {
|
896 | d592d303 | bellard | pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic); |
897 | d592d303 | bellard | } |
898 | b41a2cd1 | bellard | |
899 | 8d11df9e | bellard | for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
900 | 8d11df9e | bellard | if (serial_hds[i]) {
|
901 | d537cf6c | pbrook | serial_init(serial_io[i], i8259[serial_irq[i]], serial_hds[i]); |
902 | 8d11df9e | bellard | } |
903 | 8d11df9e | bellard | } |
904 | b41a2cd1 | bellard | |
905 | 6508fe59 | bellard | for(i = 0; i < MAX_PARALLEL_PORTS; i++) { |
906 | 6508fe59 | bellard | if (parallel_hds[i]) {
|
907 | d537cf6c | pbrook | parallel_init(parallel_io[i], i8259[parallel_irq[i]], |
908 | d537cf6c | pbrook | parallel_hds[i]); |
909 | 6508fe59 | bellard | } |
910 | 6508fe59 | bellard | } |
911 | 6508fe59 | bellard | |
912 | a41b2ff2 | pbrook | for(i = 0; i < nb_nics; i++) { |
913 | a41b2ff2 | pbrook | nd = &nd_table[i]; |
914 | a41b2ff2 | pbrook | if (!nd->model) {
|
915 | a41b2ff2 | pbrook | if (pci_enabled) {
|
916 | a41b2ff2 | pbrook | nd->model = "ne2k_pci";
|
917 | a41b2ff2 | pbrook | } else {
|
918 | a41b2ff2 | pbrook | nd->model = "ne2k_isa";
|
919 | a41b2ff2 | pbrook | } |
920 | 69b91039 | bellard | } |
921 | a41b2ff2 | pbrook | if (strcmp(nd->model, "ne2k_isa") == 0) { |
922 | d537cf6c | pbrook | pc_init_ne2k_isa(nd, i8259); |
923 | a41b2ff2 | pbrook | } else if (pci_enabled) { |
924 | c4a7060c | blueswir1 | if (strcmp(nd->model, "?") == 0) |
925 | c4a7060c | blueswir1 | fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
|
926 | abcebc7e | ths | pci_nic_init(pci_bus, nd, -1);
|
927 | c4a7060c | blueswir1 | } else if (strcmp(nd->model, "?") == 0) { |
928 | c4a7060c | blueswir1 | fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
|
929 | c4a7060c | blueswir1 | exit(1);
|
930 | a41b2ff2 | pbrook | } else {
|
931 | a41b2ff2 | pbrook | fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
|
932 | a41b2ff2 | pbrook | exit(1);
|
933 | 69b91039 | bellard | } |
934 | a41b2ff2 | pbrook | } |
935 | b41a2cd1 | bellard | |
936 | e4bcb14c | ths | if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
|
937 | e4bcb14c | ths | fprintf(stderr, "qemu: too many IDE bus\n");
|
938 | e4bcb14c | ths | exit(1);
|
939 | e4bcb14c | ths | } |
940 | e4bcb14c | ths | |
941 | e4bcb14c | ths | for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) { |
942 | e4bcb14c | ths | index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS); |
943 | e4bcb14c | ths | if (index != -1) |
944 | e4bcb14c | ths | hd[i] = drives_table[index].bdrv; |
945 | e4bcb14c | ths | else
|
946 | e4bcb14c | ths | hd[i] = NULL;
|
947 | e4bcb14c | ths | } |
948 | e4bcb14c | ths | |
949 | a41b2ff2 | pbrook | if (pci_enabled) {
|
950 | e4bcb14c | ths | pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
|
951 | a41b2ff2 | pbrook | } else {
|
952 | e4bcb14c | ths | for(i = 0; i < MAX_IDE_BUS; i++) { |
953 | d537cf6c | pbrook | isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]], |
954 | e4bcb14c | ths | hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
|
955 | 69b91039 | bellard | } |
956 | b41a2cd1 | bellard | } |
957 | 69b91039 | bellard | |
958 | d537cf6c | pbrook | i8042_init(i8259[1], i8259[12], 0x60); |
959 | 7c29d0c0 | bellard | DMA_init(0);
|
960 | 6a36d84e | bellard | #ifdef HAS_AUDIO
|
961 | d537cf6c | pbrook | audio_init(pci_enabled ? pci_bus : NULL, i8259);
|
962 | fb065187 | bellard | #endif
|
963 | 80cabfad | bellard | |
964 | e4bcb14c | ths | for(i = 0; i < MAX_FD; i++) { |
965 | e4bcb14c | ths | index = drive_get_index(IF_FLOPPY, 0, i);
|
966 | e4bcb14c | ths | if (index != -1) |
967 | e4bcb14c | ths | fd[i] = drives_table[index].bdrv; |
968 | e4bcb14c | ths | else
|
969 | e4bcb14c | ths | fd[i] = NULL;
|
970 | e4bcb14c | ths | } |
971 | e4bcb14c | ths | floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd); |
972 | b41a2cd1 | bellard | |
973 | e4bcb14c | ths | cmos_init(ram_size, boot_device, hd); |
974 | 69b91039 | bellard | |
975 | bb36d470 | bellard | if (pci_enabled && usb_enabled) {
|
976 | afcc3cdf | ths | usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
|
977 | bb36d470 | bellard | } |
978 | bb36d470 | bellard | |
979 | 6515b203 | bellard | if (pci_enabled && acpi_enabled) {
|
980 | 3fffc223 | ths | uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */ |
981 | 0ff596d0 | pbrook | i2c_bus *smbus; |
982 | 0ff596d0 | pbrook | |
983 | 0ff596d0 | pbrook | /* TODO: Populate SPD eeprom data. */
|
984 | 7b717336 | ths | smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100); |
985 | 3fffc223 | ths | for (i = 0; i < 8; i++) { |
986 | 0ff596d0 | pbrook | smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256)); |
987 | 3fffc223 | ths | } |
988 | 6515b203 | bellard | } |
989 | 3b46e624 | ths | |
990 | a5954d5c | bellard | if (i440fx_state) {
|
991 | a5954d5c | bellard | i440fx_init_memory_mappings(i440fx_state); |
992 | a5954d5c | bellard | } |
993 | e4bcb14c | ths | |
994 | 7d8406be | pbrook | if (pci_enabled) {
|
995 | e4bcb14c | ths | int max_bus;
|
996 | e4bcb14c | ths | int bus, unit;
|
997 | 7d8406be | pbrook | void *scsi;
|
998 | 96d30e48 | ths | |
999 | e4bcb14c | ths | max_bus = drive_get_max_bus(IF_SCSI); |
1000 | e4bcb14c | ths | |
1001 | e4bcb14c | ths | for (bus = 0; bus <= max_bus; bus++) { |
1002 | e4bcb14c | ths | scsi = lsi_scsi_init(pci_bus, -1);
|
1003 | e4bcb14c | ths | for (unit = 0; unit < LSI_MAX_DEVS; unit++) { |
1004 | e4bcb14c | ths | index = drive_get_index(IF_SCSI, bus, unit); |
1005 | e4bcb14c | ths | if (index == -1) |
1006 | e4bcb14c | ths | continue;
|
1007 | e4bcb14c | ths | lsi_scsi_attach(scsi, drives_table[index].bdrv, unit); |
1008 | e4bcb14c | ths | } |
1009 | e4bcb14c | ths | } |
1010 | 7d8406be | pbrook | } |
1011 | 80cabfad | bellard | } |
1012 | b5ff2d6e | bellard | |
1013 | b881c2c6 | blueswir1 | static void pc_init_pci(int ram_size, int vga_ram_size, |
1014 | b881c2c6 | blueswir1 | const char *boot_device, DisplayState *ds, |
1015 | 5fafdf24 | ths | const char *kernel_filename, |
1016 | 3dbbdc25 | bellard | const char *kernel_cmdline, |
1017 | 94fc95cd | j_mayer | const char *initrd_filename, |
1018 | 94fc95cd | j_mayer | const char *cpu_model) |
1019 | 3dbbdc25 | bellard | { |
1020 | b881c2c6 | blueswir1 | pc_init1(ram_size, vga_ram_size, boot_device, ds, |
1021 | 3dbbdc25 | bellard | kernel_filename, kernel_cmdline, |
1022 | a049de61 | bellard | initrd_filename, 1, cpu_model);
|
1023 | 3dbbdc25 | bellard | } |
1024 | 3dbbdc25 | bellard | |
1025 | b881c2c6 | blueswir1 | static void pc_init_isa(int ram_size, int vga_ram_size, |
1026 | b881c2c6 | blueswir1 | const char *boot_device, DisplayState *ds, |
1027 | 5fafdf24 | ths | const char *kernel_filename, |
1028 | 3dbbdc25 | bellard | const char *kernel_cmdline, |
1029 | 94fc95cd | j_mayer | const char *initrd_filename, |
1030 | 94fc95cd | j_mayer | const char *cpu_model) |
1031 | 3dbbdc25 | bellard | { |
1032 | b881c2c6 | blueswir1 | pc_init1(ram_size, vga_ram_size, boot_device, ds, |
1033 | 3dbbdc25 | bellard | kernel_filename, kernel_cmdline, |
1034 | a049de61 | bellard | initrd_filename, 0, cpu_model);
|
1035 | 3dbbdc25 | bellard | } |
1036 | 3dbbdc25 | bellard | |
1037 | b5ff2d6e | bellard | QEMUMachine pc_machine = { |
1038 | b5ff2d6e | bellard | "pc",
|
1039 | b5ff2d6e | bellard | "Standard PC",
|
1040 | 3dbbdc25 | bellard | pc_init_pci, |
1041 | 3dbbdc25 | bellard | }; |
1042 | 3dbbdc25 | bellard | |
1043 | 3dbbdc25 | bellard | QEMUMachine isapc_machine = { |
1044 | 3dbbdc25 | bellard | "isapc",
|
1045 | 3dbbdc25 | bellard | "ISA-only PC",
|
1046 | 3dbbdc25 | bellard | pc_init_isa, |
1047 | b5ff2d6e | bellard | }; |